3984 Commits

Author SHA1 Message Date
Andrew Kelley
e81b21a0ea
Merge pull request #10992 from mitchellh/peer-slices
stage2: peer resolve *[N]T to []T and E![]T and [*]T, handle in-memory coercion
2022-02-26 18:49:44 -05:00
Veikka Tuominen
bf3c88b68d stage2: various fixes to get one test passing
* resolve error sets before merging them
* implement tupleFieldPtr
* make ret_ptr behave like alloc with zero sized types in llvm backend
2022-02-26 18:44:23 -05:00
Mitchell Hashimoto
156316bc7c
stage2: skip more tests for native backends 2022-02-26 13:56:50 -08:00
Joachim Schmidt
058e482247
Merge pull request #10996 from joachimschmidt557/stage2-arm
stage2 ARM: implement truncate to integers with <= 32 bits
2022-02-26 22:50:31 +01:00
Veikka Tuominen
bff7714a7c stage2: fix toAllocatedBytes on slices 2022-02-26 12:52:06 -07:00
Veikka Tuominen
ee149aaa03 stage2: actually coerce in coerce_result_ptr at comptime 2022-02-26 12:51:23 -07:00
Veikka Tuominen
315d4e8442 stage2: do not require function when evaluating typeOf
We only care about the instructions type; it will never actually be codegen'd.
2022-02-26 18:08:31 +02:00
Veikka Tuominen
ff72b8a819 stage2: evaluate TypeOf arguments in a separate scope 2022-02-26 18:08:11 +02:00
joachimschmidt557
f48f4baf67
stage2 ARM: generate correct variants of ldr instruction
When loading an i16 for example, generate ldrsh instead of ldrh
2022-02-26 13:00:01 +01:00
joachimschmidt557
8ef80cfaab
stage2 ARM: implement truncate to ints with bits <= 32 2022-02-26 12:59:57 +01:00
Mitchell Hashimoto
f0232fc07d
stage2: split up the big sentinel peer cast test to multiple
This way we can fix them one at a time.
2022-02-25 18:56:27 -08:00
Mitchell Hashimoto
943ee59bb1
stage2: *[N]T to [*]T (and vice versa) 2022-02-25 17:29:50 -08:00
Mitchell Hashimoto
e442f88b76
stage2: add other backend skips until they determine they pass 2022-02-25 17:03:49 -08:00
Mitchell Hashimoto
bcf3eb5663
stage2: another passing test 2022-02-25 13:35:36 -08:00
Mitchell Hashimoto
1019181982
stage2: *[N]T and E![]T 2022-02-25 13:33:11 -08:00
Jakub Konka
e0f5627d4a x64+aarch64: check for pointer to zero-bit type when lowering decl
Unless the pointer is a pointer to a function, if the pointee type
has zero-bits, we need to return `MCValue.none` as the `Decl` has
not been lowered to memory, and therefore, any GOT reference will be
wrong.
2022-02-25 21:59:19 +01:00
Jakub Konka
1b8ed7842c macho: redo selection of segment/section for decls and consts
* fix alignment issues for consts with natural ABI alignment not
  matching that of the `ldr` instruction in `aarch64` - solved by
  preceeding the `ldr` with an additional `add` instruction to form
  the full address before dereferencing the pointer.
* redo selection of segment/section for decls and consts based on
  combined type and value
2022-02-25 21:59:19 +01:00
Andrew Kelley
27eb42c15e Sema: implement tupleFieldVal, fix comptime elem_ptr 2022-02-24 22:28:37 -07:00
Andrew Kelley
adb746a701 stage2: improved handling of store_to_block_ptr
* AstGen: remove the setBlockBodyEliding function. This is no longer
   needed after 63788b2a511eb87974065a052e2436b0c6202544.
 * Sema: store_to_block_ptr instruction is handled as
   store_to_inferred_ptr or store, as necessary.
2022-02-24 22:28:37 -07:00
Veikka Tuominen
63788b2a51 stage2: change how stale store_to_block_ptrs are detected
Instead of explicitly setting lhs to .none,
check if the lhs instruction was analyzed.
This simpler approach also handles stores from nested blocks correctly.
2022-02-24 18:32:08 -05:00
Veikka Tuominen
b034c45b2b stage2: implement fieldParentPtr 2022-02-24 19:48:34 +02:00
Andrew Kelley
6249a24e81 stage2: integer-backed packed structs
This implements #10113 for the self-hosted compiler only. It removes the
ability to override alignment of packed struct fields, and removes the
ability to put pointers and arrays inside packed structs.

After this commit, nearly all the behavior tests pass for the stage2 llvm
backend that involve packed structs.

I didn't implement the compile errors or compile error tests yet. I'm
waiting until we have stage2 building itself and then I want to rework
the compile error test harness with inspiration from Vexu's arocc test
harness. At that point it should be a much nicer dev experience to work
on compile errors.
2022-02-23 23:59:25 -07:00
Mitchell Hashimoto
65c0475970 stage2: peer type resolution *[N]T and *[M]T to []const T 2022-02-24 08:50:26 +02:00
Jakub Konka
9d098318e2
Merge pull request #10977 from joachimschmidt557/stage2-aarch64
stage2 AArch64: more support for PIE targets (Mach-O)
2022-02-24 00:00:15 +01:00
Andrew Kelley
ecf56d85ef
Merge pull request #10969 from Vexu/stage2
stage2: fn typeinfo params
2022-02-23 16:10:17 -05:00
joachimschmidt557
f91fe9afb9
stage2 AArch64: more support for MCValue.got_load and direct_load 2022-02-23 21:58:13 +01:00
Evan Haas
9716a1c3ab translate-c: Add support for cast-to-union
Fixes #10955
2022-02-23 14:11:46 +02:00
Veikka Tuominen
ab4d693cfc re-enable @src behavior test 2022-02-23 10:40:46 +02:00
Veikka Tuominen
92beb2b490 stage2: misc fixes in Sema 2022-02-23 10:40:40 +02:00
Veikka Tuominen
923b07bac7 stage2: add parameters to fn typeInfo 2022-02-23 09:44:36 +02:00
Veikka Tuominen
f8154905e7 stage1: rename TypeInfo.FnArg to Fn.Param 2022-02-23 09:44:36 +02:00
Jakub Konka
c64d3b0a96 Skip @src for stage1 too 2022-02-22 22:33:57 +01:00
Jakub Konka
160f657156 Skip unsupported while behavior tests 2022-02-22 22:14:49 +01:00
Jakub Konka
8e4a8771f5 Skip unsupported enum behavior tests 2022-02-22 22:04:32 +01:00
Jakub Konka
d657ede324 x64: disable printing results on macos until I fix the linker
Hopefully, this will make the CI green, and in the meantime I can
fix the bugs in the MachO linker.
2022-02-22 21:57:44 +01:00
Jakub Konka
25e4b16e25 Port more behavior tests 2022-02-22 21:57:42 +01:00
Jakub Konka
1bbb886694 Port bitcast.zig tests 2022-02-22 21:56:34 +01:00
Andrew Kelley
b23f10b424 Sema: fix comptime coercion of payload to error union 2022-02-22 13:53:10 -07:00
Andrew Kelley
0d422ce342 Sema: auto-numbered enums increment from last tag value
This matches stage1 and the existing behavior tests.
2022-02-22 12:44:35 -07:00
Veikka Tuominen
df38c46bee
Merge pull request #10929 from davidmrt98/cbe
stage2: C backend: fix codegen for field_ptr/elem_ptr values
2022-02-22 15:25:50 +02:00
Andrew Kelley
c2a9a591f6 Sema: fix union auto-enum numbering 2022-02-21 23:50:20 -07:00
Andrew Kelley
9dc98fbabb Sema: fix comptime union initialization
The mechanism behind initializing a union's tag is a bit complicated,
depending on whether the union is initialized at runtime,
forced comptime, or implicit comptime.

`coerce_result_ptr` now does not force a block to be a runtime context;
instead of adding runtime instructions directly, it forwards analysis to
the respective functions for initializing optionals and error unions.

`validateUnionInit` now has logic to still emit a runtime
`set_union_tag` instruction even if the union pointer is comptime-known,
for the case of a pointer that is not comptime mutable, such as a
variable or the result of `@intToPtr`.

`validateStructInit` looks for a completely different pattern now; it
now handles the possibility of the corresponding AIR instruction for
the `field_ptr` to be missing or the corresponding `store` to be missing.
See the new comment added to the function for more details. An
equivalent change should probably be made to `validateArrayInit`.

`analyzeOptionalPayloadPtr` and `analyzeErrUnionPayloadPtr` functions now
emit a `optional_payload_ptr_set` or `errunion_payload_ptr_set`
instruction respectively if `initializing` is true and the pointer value
is not comptime-mutable.

`storePtr2` now tries the comptime pointer store before checking if the
element type has one possible value because the comptime pointer store
can have side effects of setting a union tag, setting an optional payload
non-null, or setting an error union to be non-error.

The LLVM backend `lowerParentPtr` function is improved to take into
account the differences in how the LLVM values are lowered depending on
the Zig type. It now handles unions correctly as well as additionally
handling optionals and error unions.

In the LLVM backend, the instructions `optional_payload_ptr_set` and
`errunion_payload_ptr_set` check liveness analysis and only do the side
effects in the case the result of the instruction is unused.

A few wasm and C backend test cases regressed, but they are due to TODOs
in lowering of constants, so this is progress.
2022-02-21 23:49:38 -07:00
Andrew Kelley
7f48bc3493 disable failing nvptx test case
workaround for #10968
2022-02-21 23:48:07 -07:00
Andrew Kelley
6dc5ce931c
Merge pull request #10959 from joachimschmidt557/stage2-aarch64
stage2 AArch64: misc improvements
2022-02-22 01:30:49 -05:00
joachimschmidt557
25f73224f7
stage2 AArch64: pass a few more behavior tests 2022-02-21 23:05:16 +01:00
joachimschmidt557
2ba1ef165a
stage2 AArch64: implement genSetReg for ptr_stack_offset 2022-02-21 22:54:14 +01:00
joachimschmidt557
ec62e76455
stage2 AArch64: replace genMulConstant with binOp 2022-02-21 22:54:09 +01:00
joachimschmidt557
a9154a7eaf
stage2 AArch64: implement storing to memory 2022-02-21 22:44:40 +01:00
Andrew Kelley
74303a3d95
Merge pull request #10925 from Vexu/stage2
stage2: support anon init through error unions and optionals
2022-02-21 14:18:17 -05:00
gwenzek
628e9e6d04
enable Gpu address spaces (#10884) 2022-02-21 14:05:27 -05:00