22 Commits

Author SHA1 Message Date
Alex Rønne Petersen
9ab7eec23e represent Mac Catalyst as aarch64-maccatalyst-none rather than aarch64-ios-macabi
Apple's own headers and tbd files prefer to think of Mac Catalyst as a distinct
OS target. Earlier, when DriverKit support was added to LLVM, it was represented
a distinct OS. So why Apple decided to only represent Mac Catalyst as an ABI in
the target triple is beyond me. But this isn't the first time they've ignored
established target triple norms (see: armv7k and aarch64_32) and it probably
won't be the last.

While doing this, I also audited all Darwin OS prongs throughout the codebase
and made sure they cover all the tags.
2025-11-14 11:33:35 +01:00
Jacob Young
2e31077fe0 Coff: implement threadlocal variables 2025-10-10 22:47:47 -07:00
Jacob Young
5060ab99c9 aarch64: add new from scratch self-hosted backend 2025-07-22 19:43:47 -07:00
Bingwu Zhang
e8d6ecb9ce
riscv64: skip failing tests 2025-06-28 06:47:09 +08:00
Ali Cheraghi
872f68c9cb
rename spirv backend name
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
mlugg
92c63126e8 compiler: tlv pointers are not comptime-known
Pointers to thread-local variables do not have their addresses known
until runtime, so it is nonsensical for them to be comptime-known. There
was logic in the compiler which was essentially attempting to treat them
as not being comptime-known despite the pointer being an interned value.
This was a bit of a mess, the check was frequent enough to actually show
up in compiler profiles, and it was very awkward for backends to deal
with, because they had to grapple with the fact that a "constant" they
were lowering might actually require runtime operations.

So, instead, do not consider these pointers to be comptime-known in
*any* way. Never intern such a pointer; instead, when the address of a
threadlocal is taken, emit an AIR instruction which computes the pointer
at runtime. This avoids lots of special handling for TLVs across
basically all codegen backends; of all somewhat-functional backends, the
only one which wasn't improved by this change was the LLVM backend,
because LLVM pretends this complexity around threadlocals doesn't exist.

This change simplifies Sema and codegen, avoids a potential source of
bugs, and potentially improves Sema performance very slightly by
avoiding a non-trivial check on a hot path.
2025-05-27 19:23:11 +01:00
Ali Cheraghi
aec0f9b3e7
test: skip failing tests with spirv-vulkan 2025-02-24 19:39:42 +01:00
Alex Rønne Petersen
5cb9668632 test: Re-enable a bunch of behavior tests with LLVM.
Closes #10627.
Closes #12013.
Closes #18034.
2024-09-12 07:28:37 +02:00
David Rubin
a1f6a8ef90
riscv: airAsm rewrite
with this rewrite we can call functions inside of
inline assembly, enabling us to use the default start.zig logic

all that's left is to implement lr/sc loops for atomically manipulating
1 and 2 byte values, after which we can use the segfault handler logic.
2024-07-26 04:19:55 -07:00
David Rubin
8d30fc45c4
riscv: implement more operators
we can run `std.debug.print` now, with both run-time strings and integers!
2024-07-26 04:05:39 -07:00
David Rubin
d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
David Rubin
1e42a3de89
Remove all usages of std.mem.copy and remove std.mem.set (#18143) 2023-11-29 16:03:02 -05:00
Robin Voetter
faad97edff
spirv: update failing / passing tests
Some tests are now failing due to debug info changes, some tests
now pass due to improved compiler functionality.
2023-10-15 20:08:18 +02:00
Jacob Young
7013567f8a x86_64: disable failing behavior test 2023-06-25 19:14:03 -04:00
Robin Voetter
65157d30ab
spirv: ptr_elem_val
Implements the ptr_elem_val air tag. Implementation is unified
with ptr_elem_ptr.
2023-05-20 17:30:23 +02:00
Robin Voetter
37aa343079
spirv: more passing tests 2023-05-20 17:30:22 +02:00
Ali Chraghi
ccc490ef68
setup spirv backend in behavior tests 2023-05-11 20:31:52 +02:00
Jacob Young
1e080e5056 x86_64: implement atomic loops 2023-03-25 16:23:55 -04:00
Jacob Young
c51930b060 behavior: enable passing behavior tests on stage2_x86_64 2023-03-15 01:04:21 -04:00
kcbanner
a9b68308b9 cbe: fixes for tls, support for not linking libc, and enabling tests
- cbe: Implement linksection support, to support TLS when not linking libc
- cbe: Support under-aligned variables / struct fields
- cbe: Support packed structs (in the C definition of packed)
- windows: Fix regression with x86 _tls_array
- compiler_rt: Add 128-bit atomics to compiler_rt
- tests: Re-enable threadlocal tests on cbe+windows, and llvm+x86
- tests: Re-enable f80 tests that now pass
- ci: change windows ci to run the CBE behaviour tests with -lc, to match how the compiler is bootstrapped
- update zig1.wasm
2023-01-29 15:04:13 -05:00
Koakuma
f9e9ba784f stage2: sparc64: Skip unimplemented tests 2022-12-10 21:51:46 +07:00
Andrew Kelley
1310ef7577 disable failing behavior tests with -ofmt=c -target x86_64-windows
and enable CI checks for the C backend on Windows.
2022-12-07 04:01:04 -05:00