219 Commits

Author SHA1 Message Date
Jacob Young
5433e0438c cbe: fix ub triggered by mulw overflowing the promoted type
Closes #21914
2025-02-10 17:22:16 -08:00
Jacob Young
c3d33440f0 x86_64: pass more behavior tests 2025-01-16 20:47:30 -05:00
Jacob Young
e5d5a8bc4e x86_64: implement switch jump tables 2025-01-16 20:42:08 -05:00
Jacob Young
ac1a975f9b x86_64: implement clz and not 2025-01-16 20:42:08 -05:00
Alex Rønne Petersen
c9e67e71c1
std.Target: Replace isARM() with isArmOrThumb() and rename it to isArm().
The old isARM() function was a portability trap. With the name it had, it seemed
like the obviously correct function to use, but it didn't include Thumb. In the
vast majority of cases where someone wants to ask "is the target Arm?", Thumb
*should* be included.

There are exactly 3 cases in the codebase where we do actually need to exclude
Thumb, although one of those is in Aro and mirrors a check in Clang that is
itself likely a bug. These rare cases can just add an extra isThumb() check.
2024-11-03 09:29:30 +01:00
Robin Voetter
86b88ea7da
spirv: skip range switch tests
This is not yet implemented
2024-10-13 01:58:11 +02:00
Pavel Verigo
4b89a4c7cb stage2-wasm: airRem + airMod for floats 2024-10-08 20:58:15 +02:00
mlugg
4650e5b9fc
Sema: clean up cmpNumeric
There is one minor language change here, which is that comparisons of
the form `comptime_inf < runtime_f32` have their results comptime-known.
This is consistent with comparisons against comptime NaN for instance,
which are always comptime known. A corresponding behavior test is added.

This fixes a bug with int comparison elision which my previous commit
somehow triggered. `Sema.compareIntsOnlyPossibleResult` is much cleaner
now!
2024-09-17 11:00:38 +01:00
Alex Rønne Petersen
5cb9668632 test: Re-enable a bunch of behavior tests with LLVM.
Closes #10627.
Closes #12013.
Closes #18034.
2024-09-12 07:28:37 +02:00
Alex Rønne Petersen
26119bd98d
test: Skip some floating point tests that fail on arm-linux-(gnu,musl)eabi.
https://github.com/ziglang/zig/issues/21234
2024-09-10 08:53:30 +02:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.

This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
2024-08-28 08:39:59 +01:00
David Rubin
b533e848a2
riscv: enable passing tests 2024-07-26 04:19:17 -07:00
David Rubin
93e9c7a963
riscv: implement @clz 2024-07-26 04:05:39 -07:00
David Rubin
8d30fc45c4
riscv: implement more operators
we can run `std.debug.print` now, with both run-time strings and integers!
2024-07-26 04:05:39 -07:00
Pavel Verigo
a0795f11df disable failing tests on stage2 backends 2024-07-20 14:58:41 +02:00
Pavel Verigo
f5dd6fb71a stage2-wasm: @mulWithOverflow fixes + 128 bit signed 2024-07-20 13:21:46 +02:00
Pavel Verigo
56d535dd24 stage2-wasm: improve @shlWithOverflow for <= 128 bits
Additionally fixed a bug for shr on signed big ints
2024-07-18 18:01:06 +02:00
Pavel Verigo
dc3176d628 stage2-wasm: enhance add/subWithOverflow
Added behavior tests to verify implementation
2024-07-18 17:54:44 +02:00
David Rubin
7a02878f4e
riscv: truncate airStructFieldVal result 2024-07-14 23:02:33 -07:00
Pavel Verigo
1a951b49af stage2-wasm: not op for <= 128 bits ints 2024-07-02 15:02:59 +02:00
Pavel Verigo
6026bbd0ad stage2-wasm: fix div and rem 2024-06-22 21:35:36 +02:00
David Rubin
4fd8900337
riscv: rewrite "binOp"
Reorganize how the binOp and genBinOp functions work.

I've spent quite a while here reading exactly through the spec and so many
tests are enabled because of several critical issues the old design had.

There are some regressions that will take a long time to figure out individually
so I will ignore them for now, and pray they get fixed by themselves. When
we're closer to 100% passing is when I will start diving into them one-by-one.
2024-06-13 02:24:39 -07:00
David Rubin
d69c48370a
riscv: integer + float @abs 2024-06-13 02:22:06 -07:00
David Rubin
c10d1c6a75
riscv: implement more arithmetic instructions 2024-06-13 02:22:05 -07:00
David Rubin
083b7b483e
riscv: zero registers when using register-wide operations
what was happening is that instructions like `lb` were only affecting the lower bytes of the register and leaving the top dirty. this would lead to situtations were `cmp_eq` for example was using `xor`, which was failing because of the left-over stuff in the top of the register.

with this commit, we now zero out or truncate depending on the context, to ensure instructions like xor will provide proper results.
2024-06-13 02:22:04 -07:00
David Rubin
05de6c279b
riscv: std.fmt.format running
- implements `airSlice`, `airBitAnd`, `airBitOr`, `airShr`.

- got a basic design going for the `airErrorName` but for some reason it simply returns
empty bytes. will investigate further.

- only generating `.got.zig` entries when not compiling an object or shared library

- reduced the total amount of ops a mnemonic can have to 3, simplifying the logic
2024-06-13 02:20:47 -07:00
Robin Voetter
a3b1ba82f5
spirv: new vectorization helper
The old vectorization helper (WipElementWise) was clunky and a bit
annoying to use, and it wasn't really flexible enough.

This introduces a new vectorization helper, which uses Temporary and
Operation types to deduce a Vectorization to perform the operation
in a reasonably efficient manner. It removes the outer loop
required by WipElementWise so that implementations of AIR instructions
are cleaner. This helps with sanity when we start to introduce support
for composite integers.

airShift, convertToDirect, convertToIndirect, and normalize are initially
implemented using this new method.
2024-06-10 20:32:49 +02:00
Robin Voetter
b9d738a5cf
spirv: disable tests that fail on pocl
Besides the Intel OpenCL CPU runtime, we can now run the
behavior tests using the Portable Computing Language. This
implementation is open-source, so it will be easier for us
to patch in updated versions of spirv-llvm-translator that
have bug fixes etc.
2024-06-10 20:32:34 +02:00
David Rubin
d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
Robin Voetter
ac16545895
spirv: enable passing tests 2024-04-06 13:52:48 +02:00
Ali Chraghi
436f53f55d spirv: implement @mulWithOverflow 2024-04-06 09:01:46 +03:30
Robin Voetter
12350f53bf
spirv: clz, ctz for opencl
This instruction seems common in compiler_rt.
2024-03-30 19:47:55 +01:00
Ali Chraghi
66e6d0d314 test: skip new failing tests for spirv 2024-02-15 18:44:24 +03:30
Jacob Young
6235762c09 x86_64: implement mul, div, and mod of large integers
This enables the last compiler-rt test disabled for the x86_64 backend.
2024-02-12 05:25:07 +01:00
Jakub Konka
52066bf8e4 x86_64+macho: pass more behavior tests 2024-02-06 19:01:17 +01:00
Robin Voetter
9fbba0e01a
spirv: update tests 2024-02-04 19:09:33 +01:00
Robin Voetter
76d5696434
spirv: air abs 2024-02-04 19:09:32 +01:00
Robin Voetter
2f815853dc
spirv: shlWithOverflow 2024-02-04 19:09:26 +01:00
Robin Voetter
cb9e20da00
spirv: element-wise operation helper 2024-02-04 19:09:00 +01:00
Robin Voetter
747f4ae3f5
spirv: sh[rl](_exact)? 2024-02-04 19:08:59 +01:00
dweiller
8108c9f4d2 test/behavior: replace all 'comptime expect' with 'comptime assert' 2024-01-15 20:55:01 +11:00
Veikka Tuominen
804cee3b93 categorize behavior/bugs/<issueno>.zig tests 2024-01-06 16:49:41 -08:00
Andrew Kelley
52ebba6bdf @shlExact fixups
* Add clarification in langref
* move test case to behavior tests
2024-01-04 00:44:44 -07:00
Jacob Young
bdb6546a8f x86_64: fix vector comparisions 2023-12-04 13:09:13 -05:00
mlugg
9c16b2370d
test: update behavior to silence 'var is never mutated' errors 2023-11-19 09:57:03 +00:00
Jacob Young
b55377a5ab x86_64: pass more tests
* 128-bit integer multiplication with overflow
 * more instruction encodings used by std inline asm
 * implement the `try_ptr` air instruction
 * follow correct stack frame abi
 * enable full panic handler
 * enable stack traces
2023-10-25 04:28:30 -04:00
Jacob Young
fbe8c8938b x86_64: implement @mod for floating-point types 2023-10-23 22:42:18 -04:00
Robin Voetter
8c153221b9
wasm: disable division test
Seems that bit integers are not properly supported
2023-10-15 20:08:19 +02:00
Robin Voetter
faad97edff
spirv: update failing / passing tests
Some tests are now failing due to debug info changes, some tests
now pass due to improved compiler functionality.
2023-10-15 20:08:18 +02:00
Robin Voetter
b1499df1b8
spirv: sign-extension for strange integers 2023-10-15 14:00:09 +02:00