18 Commits

Author SHA1 Message Date
Ali Cheraghi
872f68c9cb
rename spirv backend name
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
Ali Cheraghi
aec0f9b3e7
test: skip failing tests with spirv-vulkan 2025-02-24 19:39:42 +01:00
David Rubin
c457f35da5
riscv: arbitrary sized arrays 2024-06-13 02:19:40 -07:00
David Rubin
d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
dweiller
8108c9f4d2 test/behavior: replace all 'comptime expect' with 'comptime assert' 2024-01-15 20:55:01 +11:00
mlugg
9c16b2370d
test: update behavior to silence 'var is never mutated' errors 2023-11-19 09:57:03 +00:00
mlugg
1b672e41c5 InternPool,Sema,type,llvm: alignment fixes
This changeset fixes the handling of alignment in several places. The
new rules are:
* `@alignOf(T)` where `T` is a runtime zero-bit type is at least 1,
  maybe greater.
* Zero-bit fields in `extern` structs *do* force alignment, potentially
  offsetting following fields.
* Zero-bit fields *do* have addresses within structs which can be
  observed and are consistent with `@offsetOf`.

These are not necessarily all implemented correctly yet (see disabled
test), but this commit fixes all regressions compared to master, and
makes one new test pass.
2023-09-21 14:48:41 -07:00
r00ster91
413a86f7eb behavior: correct alignment for elements and slices of aligned array
Closes #11751
2023-06-27 19:57:23 -04:00
Eric Joldasov
d884d7050e
all: replace comptime try with try comptime
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
2023-06-13 23:46:58 +06:00
joachimschmidt557
d6e6162081
stage2 AArch64: unify callee-preserved regs on all targets
also enables many passing behavior tests
2022-12-27 21:17:52 +08:00
Jacob Young
525dcaecba behavior: enable stage2_c tests that are currently passing
Also fix C warnings triggered by these tests.
2022-10-25 05:11:28 -04:00
joachimschmidt557
261fec8036
stage2 ARM: amend implementation of various AIR instructions
- unwrap_errunion_err for registers
- unwrap_errunion_payload for registers
- ptr_slice_len_ptr for all MCValues
- ptr_slice_ptr_ptr for all MCValues
2022-09-09 19:17:17 +02:00
Jakub Konka
cfbc3537ef x64: pass more behavior tests 2022-02-28 23:20:05 +01:00
joachimschmidt557
22895f5616
stage2 AArch64: Enable behavior testing 2022-02-14 22:33:01 +01:00
joachimschmidt557
4468abfc42 stage2 ARM: enable a handful of passing behavior tests 2022-02-06 02:23:31 -05:00
Luuk de Gram
0682c9ac33
wasm: Implement genTypedValue for enums
This makes all union test cases succeed.
`rem` was also implemented as all we had to do is enable the instruction.
Loading and storing values based on ABI-size was simplified to a direct abiSize() call.

We also enabled all the newly passing test cases and disable them for all non-passing backends.
All of those test cases were verified to see if they perhaps already pass for the c-backend.
2022-01-25 19:29:40 +01:00
Andrew Kelley
5619ce2406 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * doc/langref.html.in
 * lib/std/enums.zig
 * lib/std/fmt.zig
 * lib/std/hash/auto_hash.zig
 * lib/std/math.zig
 * lib/std/mem.zig
 * lib/std/meta.zig
 * test/behavior/alignof.zig
 * test/behavior/bitcast.zig
 * test/behavior/bugs/1421.zig
 * test/behavior/cast.zig
 * test/behavior/ptrcast.zig
 * test/behavior/type_info.zig
 * test/behavior/vector.zig

Master branch added `try` to a bunch of testing function calls, and some
lines also had changed how to refer to the native architecture and other
`@import("builtin")` stuff.
2021-05-08 14:45:21 -07:00
Andrew Kelley
4307436b99 move behavior tests from test/stage1/ to test/
And fix test cases to make them pass. This is in preparation for
starting to pass behavior tests with self-hosted.
2021-04-29 15:54:04 -07:00