56 Commits

Author SHA1 Message Date
David Rubin
e622485df8 riscv: actually working test runner 2024-05-11 02:17:11 -07:00
David Rubin
6740c1f084 riscv: big rewrite to use latest liveness
this one is even harder to document then the last large overhaul.

TLDR;
- split apart Emit.zig into an Emit.zig and a Lower.zig
- created seperate files for the encoding, and now adding a new instruction
is as simple as just adding it to a couple of switch statements and providing the encoding.
- relocs are handled in a more sane maner, and we have a clear defining boundary between
lea_symbol and load_symbol now.
- a lot of different abstractions for things like the stack, memory, registers, and others.
- we're using x86_64's FrameIndex now, which simplifies a lot of the tougher design process.
- a lot more that I don't have the energy to document. at this point, just read the commit itself :p
2024-05-11 02:17:11 -07:00
David Rubin
8ac239ebce riscv: add enough components to get a test runner working 2024-05-11 02:17:11 -07:00
David Rubin
3ccf0fd4c2 riscv: basic struct field access
the current implementation only works when the struct is in a register. we use some shifting magic
to get the field into the LSB, and from there, given the type provenance, the generated code should
never reach into the bits beyond the bit size of the type and interact with the rest of the struct.
2024-05-11 02:17:11 -07:00
Carl Åstholm
2465c328aa Use @TypeOf instead of std.meta in test_runner.zig
This might fix a CI failure for powerpc64le-linux-musl.
2024-04-07 21:16:29 +02:00
Andrew Kelley
dfe430e9f4 move lazily compiled source files to lib/compiler/ 2024-02-26 23:43:56 -07:00