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1066 Commits

Author SHA1 Message Date
Veikka Tuominen
b5c0a797a7 Sema: inline switch capture needs to be set when switch operand is comptime known 2022-10-08 16:58:52 +03:00
Veikka Tuominen
446deb31a8 Sema: validate bitSizeOf operand type 
Closes #13080
 2022-10-06 20:09:45 +03:00
Veikka Tuominen
0b1dd845d9 stage2: add error for non-void error union payload being ignored 
See https://github.com/ziglang/zig/pull/6060#discussion_r471032912
 2022-10-06 15:39:06 +03:00
Veikka Tuominen
b626977f45 Sema: create sub block for inline loops 
Closes #13038
 2022-10-06 15:39:06 +03:00
Veikka Tuominen
ba4aa12098 Sema: use correct value when @ptrCast operand is comptime known 
Closes #13034
 2022-10-05 17:26:29 +03:00
Veikka Tuominen
40578656e8 Zir: handle ranges in getMultiProng 
Closes #12890
 2022-10-05 17:26:29 +03:00
Andrew Kelley
ff534d2267
Merge pull request #12979 from Vexu/inline-switch 
Implement inline switch cases
 2022-10-03 23:43:09 -04:00
Veikka Tuominen
2a4e89e0c9 Type: correctly handle ABI align strat for optionals and error unions 
Closes #12984
 2022-09-30 00:46:45 +03:00
Veikka Tuominen
409cf4aeb8 Sema: use correct ptr ty to check for attributes of slice field ptr 
Closes #12870
Closes #13006
 2022-09-30 00:09:24 +03:00
kkHAIKE
317cb629fb Sema: fix resolveInferredErrorSet panic when generic inline function 2022-09-29 14:44:37 +03:00
Veikka Tuominen
83fa216c8d Sema: implement inline else for ints 2022-09-27 18:33:23 +03:00
Veikka Tuominen
950a0e2405 Sema: implement inline else for errors enums and bools 2022-09-27 18:33:23 +03:00
Veikka Tuominen
0e77259f44 add inline switch union tag captures 2022-09-27 18:33:23 +03:00
Veikka Tuominen
5baaf90e3c Sema: implement non-special inline switch prongs 2022-09-27 18:33:23 +03:00
Veikka Tuominen
c4400e8aa5 AstGen: reset anon_name_strategy for sub expressions 
Closes  #12910
 2022-09-24 16:30:37 +03:00
Veikka Tuominen
8e4d0ae4f5 Sema: avoid generic parameter error in nested function type 
Related to cd1833044ab7505bc101c85f59889bd3ea3fac80
Closes #12945
 2022-09-24 15:15:36 +03:00
Veikka Tuominen
3a5148112d Sema: avoid using pointerDecl when dealing with slices 
Closes #12885
 2022-09-24 14:43:03 +03:00
Veikka Tuominen
3525b8778e Sema: properly handle generic struct as parameter type 
Closes #12907
 2022-09-24 14:43:03 +03:00
Veikka Tuominen
ede3798485 Sema: resolve struct layout in zirStructInit 
Closes #12911
 2022-09-23 17:39:21 +03:00
Veikka Tuominen
8d1fdfc8ed Sema: preserve volatileness when constructing field pointers 
Closes #12928
 2022-09-23 17:39:06 +03:00
kkHAIKE
183127733c AstGen: make loop body's ResultLoc .none 
Fixes #12555
Fixes #12551
Fixes #12455
 2022-09-21 20:20:05 +03:00
Veikka Tuominen
540130650f Sema: pass calculated offset to elemPtrType in elemPtrSlice 2022-09-20 00:50:13 +03:00
Veikka Tuominen
541b3e3a31 Sema: check pointer qualifiers before implicit cast 
Closes #12881
 2022-09-20 00:50:13 +03:00
Veikka Tuominen
e584558bd8 Sema: do not use coerceCompatiblePtr for alignCast 
Closes  #12902
 2022-09-19 18:34:52 +03:00
Veikka Tuominen
b2aedb0709
Merge pull request #12796 from Vexu/referenced-by-v2 
stage2: add referenced by trace to compile errors attempt #2 (+ some fixes)
 2022-09-16 23:49:00 +03:00
Koakuma
0910cb6fcb stage2: sparc64: Skip compile-failing tests for now 2022-09-14 16:58:12 -07:00
Koakuma
2263bba6cd stage2: sparc64: Skip Sema-failing tests for now 2022-09-14 16:57:31 -07:00
Veikka Tuominen
5e4483fff8 Sema: handle comptime fields in field call bind 
Closes #12801
 2022-09-15 00:50:18 +03:00
Veikka Tuominen
5e37da6ade Sema: check_comptime_control_flow needs to check runtime_index 2022-09-15 00:50:18 +03:00
Veikka Tuominen
bf4a3df9a9 Sema: allow runtime break from inline loop 
Closes #12787
 2022-09-15 00:48:47 +03:00
Veikka Tuominen
6f6b14621d value: hash extern functions 
Closes #12766
 2022-09-15 00:48:47 +03:00
Veikka Tuominen
930f904aaa Sema: resolve lazy align in reifyStruct 
Closes #12786
 2022-09-15 00:48:47 +03:00
Veikka Tuominen
de24cea2cf Sema: handle empty_struct_value in beginComptimePtrMutation 
Closes #12794
 2022-09-15 00:48:47 +03:00
Andrew Kelley
0a4cfb81bc Merge remote-tracking branch 'origin/master' into llvm15 2022-09-13 13:50:25 -07:00
Andrew Kelley
f16855b9d7 remove pointless discards 2022-09-12 18:13:24 -07:00
Andrew Kelley
011663eea5 Merge remote-tracking branch 'origin/master' into llvm15 2022-09-12 16:11:18 -07:00
Andrew Kelley
01e89fec71 disable LLVM 15 regressed behavior test: "vector @splat" 
See #12827
 2022-09-12 16:02:31 -07:00
Veikka Tuominen
e323cf1264 stage2: change how defers are stored in Zir 
Storing defers this way has the benefits that the defer doesn't get
analyzed multiple times in AstGen, it takes up less space, and it
makes Sema aware of defers allowing for 'unreachable else prong'
error on error sets in generic code.

The disadvantage is that it is a bit more complex and errdefers with
payloads now emit a placeholder instruction (but those are rare).

Sema.zig before:
  Total ZIR bytes:    3.7794370651245117MiB
  Instructions:       238996 (2.051319122314453MiB)
  String Table Bytes: 89.2802734375KiB
  Extra Data Items:   430144 (1.640869140625MiB)
Sema.zig after:
  Total ZIR bytes:    3.3344192504882812MiB
  Instructions:       211829 (1.8181428909301758MiB)
  String Table Bytes: 89.2802734375KiB
  Extra Data Items:   374611 (1.4290275573730469MiB)
 2022-09-12 01:52:44 -04:00
Andrew Kelley
ab3ac291ac Merge remote-tracking branch 'origin/master' into llvm15 2022-09-11 20:26:53 -07:00
Jakub Konka
4fd4c733d4 x86_64: pass more behavior tests 2022-09-10 09:23:26 +02:00
Jakub Konka
5778077f9f
Merge pull request #12799 from joachimschmidt557/stage2-arm 
stage2 ARM: introduce allocRegs mechanism and other improvements
 2022-09-10 09:13:08 +02:00
Jacob Young
5b9c5191ab type: print comptime on fn type params 
This avoids the following confusing error message:

    error: expected type 'fn(i32, i32) void', found 'fn(i32, i32) void'
 2022-09-10 01:55:52 +03:00
Evan Haas
8e631ee3e7 translate-c: Escape non-ASCII characters that appear in macros 
Macro definitions are simply a slice of bytes, which may not be
UTF-8 encoded. If they are not UTF-8 encoded, escape non-printable
and non-ASCII characters as `\xNN`.

Fixes #12784
 2022-09-10 01:50:17 +03:00
joachimschmidt557
94499898e5
stage2 ARM: implement basic array_elem_val 2022-09-09 20:26:04 +02:00
Andrew Kelley
37cdb5dbf9 Merge remote-tracking branch 'origin/master' into llvm15 2022-09-09 10:26:17 -07:00
joachimschmidt557
b976997e16
stage2 ARM: implement ptr_elem_val 2022-09-09 19:17:18 +02:00
joachimschmidt557
a0a7d15142
stage2 ARM: support larger function stacks 
This is done by introducing a new Mir pseudo-instruction
 2022-09-09 19:17:18 +02:00
joachimschmidt557
3794f2c493
stage2 ARM: implement struct_field_val for registers 2022-09-09 19:17:18 +02:00
joachimschmidt557
261fec8036
stage2 ARM: amend implementation of various AIR instructions 
- unwrap_errunion_err for registers
- unwrap_errunion_payload for registers
- ptr_slice_len_ptr for all MCValues
- ptr_slice_ptr_ptr for all MCValues
 2022-09-09 19:17:17 +02:00
joachimschmidt557
e2b029e2c8
stage2 ARM: implement field_parent_ptr 2022-09-09 19:17:17 +02:00