56 Commits

Author SHA1 Message Date
Andrew Kelley
006e7f6805 stage2: re-use ZIR for comptime and inline calls
Instead of freeing ZIR after semantic analysis, we keep it around so
that it can be used for comptime calls, inline calls, and generic
function calls. ZIR memory is now managed by the Decl arena.

Debug dump() functions are conditionally compiled; only available in
Debug builds of the compiler.

Add a test for an inline function call.
2021-01-02 19:11:55 -07:00
Andrew Kelley
9362f382ab stage2: implement function call inlining in the frontend
* remove the -Ddump-zir thing. that's handled through --verbose-ir
 * rework Fn to have an is_inline flag without requiring any more memory
   on the heap per function.
 * implement a rough first version of dumping typed zir (tzir) which is
   a lot more helpful for debugging than what we had before. We don't
   have a way to parse it though.
 * keep track of whether the inline-ness of a function changes because
   if it does we have to go update callsites.
 * add compile error for inline and export used together.

inline function calls and comptime function calls are implemented the
same way. A block instruction is set up to capture the result, and then
a scope is set up that has a flag for is_comptime and some state if the
scope is being inlined.

when analyzing `ret` instructions, zig looks for inlining state in the
scope, and if found, treats `ret` as a `break` instruction instead, with
the target block being the one set up at the inline callsite.

Follow-up items:
 * Complete out the debug TZIR dumping code.
 * Don't redundantly generate ZIR for each inline/comptime function
   call. Instead we should add a new state enum tag to Fn.
 * comptime and inlining branch quotas.
 * Add more test cases.
2021-01-02 19:11:19 -07:00
Andrew Kelley
974c008a0e convert more {} to {d} and {s} 2021-01-02 19:03:14 -07:00
LemonBoy
5b981b1be7 Remove some unwanted changes
Leftovers after a long rebase.
2021-01-02 17:12:58 -07:00
LemonBoy
1c13ca5a05 stage2: Use {s} instead of {} when formatting strings 2021-01-02 17:12:57 -07:00
joachimschmidt557
c5ec096b2f stage2 AArch64: add logical (shifted register) instructions 2021-01-01 14:43:12 -08:00
joachimschmidt557
c52ca0b178
stage2 ARM: implement genSetReg with compare_flags 2021-01-01 12:22:16 +01:00
Andrew Kelley
7deb1f4f6c stage2: type inference for local var 2020-12-31 02:42:48 -07:00
Andrew Kelley
a46d24af1c stage2: inferred local variables
This patch introduces the following new things:

Types:
 - inferred_alloc
   - This is a special value that tracks a set of types that have been stored
     to an inferred allocation. It does not support most of the normal type queries.
     However it does respond to `isConstPtr`, `ptrSize`, `zigTypeTag`, etc.
   - The payload for this type simply points to the corresponding Value
     payload.

Values:
 - inferred_alloc
   - This is a special value that tracks a set of types that have been stored
     to an inferred allocation. It does not support any of the normal value queries.

ZIR instructions:
 - store_to_inferred_ptr,
   - Same as `store` but the type of the value being stored will be used to infer
     the pointer type.
 - resolve_inferred_alloc
   - Each `store_to_inferred_ptr` puts the type of the stored value into a set,
     and then `resolve_inferred_alloc` triggers peer type resolution on the set.
     The operand is a `alloc_inferred` or `alloc_inferred_mut` instruction, which
     is the allocation that needs to have its type inferred.

Changes to the C backend:
 * Implements the bitcast instruction. If the source and dest types
   are both pointers, uses a cast, otherwise uses memcpy.
 * Tests are run with -Wno-declaration-after-statement. Someday we can
   conform to this but not today.

In ZIR form it looks like this:

```zir
fn_body main { // unanalyzed
  %0 = dbg_stmt()
=>%1 = alloc_inferred()
  %2 = declval_in_module(Decl(add))
  %3 = deref(%2)
  %4 = param_type(%3, 0)
  %5 = const(TypedValue{ .ty = comptime_int, .val = 1})
  %6 = as(%4, %5)
  %7 = param_type(%3, 1)
  %8 = const(TypedValue{ .ty = comptime_int, .val = 2})
  %9 = as(%7, %8)
  %10 = call(%3, [%6, %9], modifier=auto)
=>%11 = store_to_inferred_ptr(%1, %10)
=>%12 = resolve_inferred_alloc(%1)
  %13 = dbg_stmt()
  %14 = ret_type()
  %15 = const(TypedValue{ .ty = comptime_int, .val = 3})
  %16 = sub(%10, %15)
  %17 = as(%14, %16)
  %18 = return(%17)
} // fn_body main
```

I have not played around with very many test cases yet. Some interesting
ones that I want to look at before merging:

```zig
var x = blk: {
  var y = foo();
  y.a = 1;
  break :blk y;
};
```

In the above test case, x and y are supposed to alias.

```zig
var x = if (bar()) blk: {
  var y = foo();
  y.a = 1;
  break :blk y;
} else blk: {
  var z = baz();
  z.b = 1;
  break :blk z;
};
```

In the above test case, x, y, and z are supposed to alias.

I also haven't tested with `var` instead of `const` yet.
2020-12-31 01:54:02 -07:00
Andrew Kelley
3f7d9b5fc1 stage2: rework Value Payload layout
This is the same as the previous commit but for Value instead of Type.

Add `Value.castTag` and note that it is preferable to call than
`Value.cast`. This matches other abstractions in the codebase.

Added a convenience function `Value.Tag.create` which really cleans up
the callsites of creating `Value` objects.

`Value` tags can now share payload types. This is in preparation for
another improvement that I want to do.
2020-12-30 21:41:02 -08:00
Andrew Kelley
d18b6785bb stage2: C backend improvements
* Module: improve doc comments
 * C backend: improve const-correctness
 * C backend: introduce renderTypeAndName
 * C backend: put `static` on functions when appropriate
 * C backend: fix not handling errors in genBinOp
 * C backend: handle more IR instructions
   - alloc, store, boolean comparisons, ret_ptr
 * C backend: call instruction properly stores its result
 * test harness: ensure execution tests have empty stderr
2020-12-29 17:56:30 -07:00
Andrew Kelley
813d3308cc stage2: update C backend test cases for new output 2020-12-28 20:32:13 -07:00
Andrew Kelley
bbe66572e1 stage2: C backend: handle string literals more gracefully 2020-12-28 20:15:17 -07:00
Andrew Kelley
a54ccd8537 stage2: C backend: implement @breakpoint and clean up test harness 2020-12-28 18:43:01 -07:00
Andrew Kelley
37f04d66be stage2: C backend: properly render type of array decls 2020-12-28 18:24:55 -07:00
Andrew Kelley
52056b156b stage2: C backend: pointer cast decl refs if necessary 2020-12-28 17:46:50 -07:00
Andrew Kelley
87c6341b61 stage2: add extern functions
and improve the C backend enough to support Hello World (almost)
2020-12-28 17:15:29 -07:00
Timon Kruiper
071417161d stage2: add initial impl of LLVM backend in self-hosted compiler 2020-12-28 21:19:40 +01:00
Andrew Kelley
f75d4cbe56 Revert "stage2: add compile log statement (#7191)"
The addition of `addDeclErr` introduced a memory leak at every call
site, and I also would like to push back on having more than 1
compilation error per `Decl`.

This reverts commit 1634d45f1d53c8d7bfefa56ab4d2fa4cc8218b6d.
2020-12-28 11:24:53 -07:00
g-w1
1634d45f1d
stage2: add compile log statement (#7191) 2020-12-26 02:40:49 +02:00
Noam Preil
37438dd789 CBE: add support for bool,u32 2020-12-23 01:14:35 +11:00
Alex Cameron
40f0275e7c Implement emit-h 2020-12-23 01:14:35 +11:00
Jakub Konka
2082c27557 stage2+aarch64: clean up offset helper structs 2020-12-09 17:21:21 +01:00
Jakub Konka
e91dbab256 stage2+aarch64: fix stage2 tests 2020-12-09 17:21:17 +01:00
Jakub Konka
21dae538ca stage2+aarch64: add load and store pair of registers instructions 2020-12-09 17:20:14 +01:00
Jakub Konka
c749b78df5 stage2 macho: add orr and orn instructions 2020-11-26 11:50:09 +01:00
Jakub Konka
39336fd2e9 stage2 aarch64: assert register is 64bits in PCrel
Thanks @joachimschmidt557 for pointing out this fix!
2020-11-18 10:12:39 +01:00
Jakub Konka
5ff8dd179e stage2 aarch64: add PC relative address instructions 2020-11-18 08:46:52 +01:00
tgschultz
48d60834fd
Move leb128 and remove trivial *mem functions as discussed in #5588 (#6876)
* Move leb128 out of debug and remove trivial *mem functions as discussed in #5588

* Turns out one of the *Mem functions was used by MachO. Replaced with trivial use of FixedBufferStream.
2020-11-16 18:51:54 -05:00
Jakub Konka
8f47e8feb6 stage2 aarch64: add NOP instruction 2020-11-16 13:37:38 -08:00
Jakub Konka
f512676d0b stage2 aarch64: add str instruction 2020-11-11 14:34:53 +01:00
Jakub Konka
f1960302d1 stage2 aarch64: add ldr instruction + smoke tests 2020-11-11 14:34:53 +01:00
joachimschmidt557
aa9df72f71 stage2 AArch64: MoveWideImmediate instructions + test coverage 2020-11-11 14:34:53 +01:00
joachimschmidt557
4c8f69241a stage2 aarch64: add more instructions 2020-11-11 14:34:53 +01:00
joachimschmidt557
3c75d723ac stage2 aarch64: add codegen/aarch64.zig 2020-11-11 14:34:53 +01:00
Jakub Konka
4ef6864a15 Add move wide with zero (movz) instruction 2020-11-11 14:34:53 +01:00
Jakub Konka
68bb1e91aa Add testcase for serializing svc #0x80 2020-11-11 14:34:53 +01:00
Jakub Konka
d542e88706 Implement genAsm on aarch64
Add remaining PCS info: param and return registers in procedure calls.
2020-11-11 14:34:53 +01:00
joachimschmidt557
5ad501c00b stage2 aarch64: add codegen/aarch64.zig 2020-11-11 14:34:53 +01:00
Vexu
28a0583b84
run zig fmt on src/ and test/ 2020-10-31 12:21:49 +02:00
joachimschmidt557
7b4f3c7cfc stage2 ARM: genSetStack and genSetReg from stack 2020-10-25 12:51:19 +01:00
joachimschmidt557
7d14426da4 stage2 ARM: enable backpatching return statement 2020-10-25 12:51:19 +01:00
joachimschmidt557
0e16328636 stage2 ARM: add multiply and multiply long instructions 2020-10-25 12:51:19 +01:00
joachimschmidt557
7391087df1 stage2 ARM: better immediate loading feat. movw and movt 2020-10-25 12:51:19 +01:00
Andrew Kelley
245d98d32d
Merge pull request #6291 from pixelherodev/cbe_arithmetic
CBE: addition and subtraction
2020-10-17 01:00:38 -04:00
Vignesh Rajagopalan
2ab0c7391a Rename .macosx to .macos 2020-10-12 18:56:25 -04:00
Noam Preil
7b88215a49
Replace error message with unreachable 2020-10-06 15:09:57 -04:00
Noam Preil
ea7b2750c8
CBE: addition and subtraction 2020-10-06 15:09:57 -04:00
Noam Preil
e06ba9e86e
CBE: properly resolve Insts 2020-10-06 15:09:57 -04:00
Noam Preil
9ef6c0a035
CBE: utilize per-function arena allocator 2020-10-06 15:09:56 -04:00