102 Commits

Author SHA1 Message Date
jacob gw
2354cbafdb stage2: implement #8364 2021-04-28 19:54:04 -04:00
Andrew Kelley
d3ffacb55c AstGen: hook up hex float parsing to float literals
Thanks @LemonBoy!
2021-04-28 15:13:43 -07:00
Andrew Kelley
9db5b2c5c6 AstGen: function prototypes can have alignment 2021-04-28 15:02:52 -07:00
Andrew Kelley
eb9c29eb81 AstGen: fix function src hash not including body 2021-04-27 22:20:25 -07:00
Andrew Kelley
bfded492f0 stage2: rewire the frontend driver to whole-file-zir
* Remove some unused imports in AstGen.zig. I think it would make sense
   to start decoupling AstGen from the rest of the compiler code,
   similar to how the tokenizer and parser are decoupled.
 * AstGen: For decls, move the block_inline instructions to the top of
   the function so that they get lower ZIR instruction indexes. With
   this, the block_inline instruction index combined with its corresponding
   break_inline instruction index can be used to form a ZIR instruction
   range. This is useful for allocating an array to map ZIR instructions
   to semantically analyzed instructions.

 * Module: extract emit-h functionality into a struct, and only allocate
   it when emit-h is activated.
 * Module: remove the `decl_table` field. This previously was a table of
   all Decls in the entire Module. A "name hash" strategy was used to
   find decls within a given namespace, using this global table. Now,
   each Namespace has its own map of name to children Decls.
   - Additionally, there were 3 places that relied on iterating over
     decl_table in order to function:
     - C backend and SPIR-V backend. These now have their own decl_table
       that they keep populated when `updateDecl` and `removeDecl` are
       called.
     - emit-h. A `decl_table` field has been added to the new GlobalEmitH
       struct which is only allocated when emit-h is activated.
 * Module: fix ZIR serialization/deserialization bug in debug mode having
   to do with the secret safety tag for untagged unions. There is still an
   open TODO to investigate a friendlier solution to this problem with
   the language.
 * Module: improve deserialization of ZIR to allocate only exactly as
   much capacity as length in the instructions array so as to not waste
   space.
 * Module: move `srcHashEql` to `std.zig` to live next to the definition
   of `SrcHash` itself.
 * Module: re-introduce the logic for scanning top level declarations
   within a namespace.

 * Compilation: add an `analyze_pkg` Job which is used to kick off the
   start of semantic analysis by doing the equivalent of
   `_ = @import("std");`. The `analyze_pkg` job is unconditionally added
   to the work queue on every update(), with pkg set to the std lib pkg.

 * Rename TZIR to AIR in a few places. A more comprehensive rename will
   come later.
2021-04-26 20:41:07 -07:00
Andrew Kelley
91c317bb9a AstGen: improved handling of declarations
* Every decl provides a 16 byte source hash which can be used to detect
   if the source code for any particular decl has changed.
 * Include comptime decls, test decls, and usingnamespace decls in the
   decls list of namespaces.
   - Tests are encoded as extended functions with is_test bit set.
2021-04-26 17:36:28 -07:00
Andrew Kelley
646eb1fa93 AstGen: implement opaque decls
Also move the decls to the beginning in ZIR encoding because in Sema we
want to create the namespace with the decls before evaluating the
fields.
2021-04-26 12:49:02 -07:00
Andrew Kelley
ff2ec0dc5a AstGen: implement @Vector 2021-04-24 17:44:07 -07:00
Andrew Kelley
e018e64a53 stage2: move overflow builtin ZIR instructions to Extended
make some more room in our ZIR enum tag space
2021-04-24 17:31:15 -07:00
Andrew Kelley
15e891823e AstGen: parser ensures all suspend have blocks
See #8603.
2021-04-24 14:41:27 -07:00
Andrew Kelley
1592206965 AstGen: implement await and resume
based on @Vexu's code from before
2021-04-24 14:39:44 -07:00
Andrew Kelley
27fa4bc2be AstGen: support struct init with ref result location 2021-04-23 23:40:10 -07:00
Andrew Kelley
d2b06c2612 stage2: remove call_none and call_none_chkused ZIR
These are unproven optimizations and we need some more room in the
`Zir.Inst.Tag` enum for some more syntax.
2021-04-23 22:43:20 -07:00
Andrew Kelley
6b98384e20 stage2: remove dead ZIR instructions
clearing up some enum tag space for future added instructions
2021-04-23 22:40:57 -07:00
Andrew Kelley
fbfae832ea AstGen: emit nosuspend function calls
Inside a nosuspend block, emit function calls as nosuspend calls.
Also inside a comptime block, emit function calls as comptime calls.
Also emit `async foo()` calls as async calls.

Remove compile error for `nosuspend` block inside `suspend` block.
Instead of implicitly treating every `suspend` block also as a
`nosuspend` block (which would make sense), we leave suspension points
as compile errors, to hint to the programmer about accidents. Of course
they may then assert `nosuspend` by introducing a block within their
suspend block.

To make room in `Zir.Inst.Tag` I moved `typeof_peer` and `compile_log`
to `Extended`.
2021-04-23 21:12:29 -07:00
Andrew Kelley
49be88859d AstGen: implement nosuspend expressions
Also implement ZIR error notes
2021-04-23 20:31:12 -07:00
Andrew Kelley
9a271347fe AstGen: implement suspend blocks 2021-04-23 20:09:56 -07:00
Andrew Kelley
b40a8efb9a stage2: implement anyframe, anyframe->T and fix assembly
* AstGen: implement `anyframe_literal` and `anyframe_type`.
 * Introduce `makeSubBlock` to avoid redundant AstGen code for GenZir
   scopes. Allows adding/removing a field without possibility of
   accidentally introducing a bug of forgetting to set the new field.
 * Add to GenZir `nosuspend_node` and `suspend_node` in preparation for
   implementing `suspend` blocks and `nosuspend` blocks.
 * AstGen: fix assembly to support clobbers, multiple outputs, and
   outputs without `->` syntax.
   - `asm` and `asm_volatile` move to `Extended` enum with `small` being
     repurposed for a few things. This frees up 2 ZIR tags, 1 of which
     is used in this commit and 1 is leftover.
 * AstGen: fix `simple_types` incorrectly having multiple conflicting
   values for "undefined" and "null".
   - Also add "anyframe" to `simple_types`.
 * Add `anyframe_type` to type.zig, value.zig and `Zir.Inst.Ref`.
   - Also add i128 and u128 types to `Zir.Inst.Ref` and `simple_types`.
 * Sema/Zir: Fix incorrect math causing the function body to be messed
   up for Extended-encoded functions.
 * Zir: support `i32` fields for "extra" payloads.
2021-04-23 18:35:21 -07:00
Andrew Kelley
183ee0965f AstGen: compile error for unable to infer array size 2021-04-23 11:14:11 -07:00
Andrew Kelley
715abe8ebe AstGen: implement integers bigger than u64
also get rid of the `optional_type_from_ptr_elem` instruction.
2021-04-22 23:47:31 -07:00
Andrew Kelley
329a359974 AstGen: implement align and linksection on globals 2021-04-22 19:21:33 -07:00
Andrew Kelley
507a8096d2 std: fix compile errors caught by stage2 AstGen
* `comptime const` is redundant
 * don't use `extern enum`; specify a tag type.
   `extern enum` is only when you need tags to alias. But aliasing tags
   is a smell. I will be making a proposal shortly to remove `extern enum`
   from the language.
 * there is no such thing as `packed enum`.
 * instead of `catch |_|`, omit the capture entirely.
 * unused function definition with missing parameter name
 * using `try` outside of a function or test
2021-04-22 18:07:46 -07:00
Andrew Kelley
7c453b91b8 AstGen: implement @extern builtin 2021-04-22 16:31:51 -07:00
Andrew Kelley
3d637e6dd2 AstGen: fix @export
Make it properly use `std.builtin.ExportOptions`.
2021-04-22 16:07:58 -07:00
Andrew Kelley
130ad08001 AstGen: implement function prototypes 2021-04-22 14:24:22 -07:00
Andrew Kelley
389020009a AstGen: implement alignment on locals 2021-04-21 22:43:57 -07:00
Andrew Kelley
ea00ddfe37 AstGen: implement comptime locals 2021-04-21 20:42:49 -07:00
Andrew Kelley
8ee0cbe50a AstGen: fix switch result location elision
It was eliding wrong instructions for nested break from labeled block
2021-04-21 19:49:58 -07:00
Andrew Kelley
570ed7b3bf AstGen: implement @bitCast for other result location types 2021-04-21 19:11:36 -07:00
Andrew Kelley
d10ec6e70d AstGen: slightly better eager-allocating heuristic
Some early ensureCapacity calls to avoid needless reallocations.
2021-04-20 22:16:45 -07:00
Andrew Kelley
a1ac2b95bb AstGen: implement union decls 2021-04-20 21:48:18 -07:00
Andrew Kelley
971f3d95f9 AstGen: implement size zero inferred length arrays 2021-04-20 18:32:43 -07:00
Andrew Kelley
c69a95f64b AstGen: fix store_to_block_ptr elision for switch statements
to make sure it matches the expected block
2021-04-20 17:58:04 -07:00
Andrew Kelley
e9477048e5 AstGen: implement for loop payload 2021-04-20 17:52:35 -07:00
Andrew Kelley
30c9808391 AstGen: implement anytype parameters 2021-04-20 17:38:06 -07:00
Andrew Kelley
a62db38d90 AstGen: implement defer for break 2021-04-20 17:04:11 -07:00
Andrew Kelley
458c4b6fc6 AstGen: implement defer for continue 2021-04-20 17:04:11 -07:00
Andrew Kelley
a59bcae59f AstGen: basic defer implementation 2021-04-20 17:04:11 -07:00
jacob gw
b4aec0e31d stage2: make std.fmt.parseInt ignore _ 2021-04-20 17:08:05 -04:00
Andrew Kelley
b4baa9eda2 AstGen: try fixups
Primarily this required fixing `setCondBrPayloadElideBlockStorePtr` to
not assume there would always be two `store_to_block_ptr` instructions
in each of the condbr prongs.
2021-04-20 11:16:50 -07:00
jacob gw
ee3c1c763c stage2: astgen try 2021-04-20 13:16:08 -04:00
Andrew Kelley
e315120b79 AstGen: implement array initialization expressions 2021-04-19 23:23:24 -07:00
Andrew Kelley
4630e3891c AstGen: implement inline asm output 2021-04-19 18:44:59 -07:00
Andrew Kelley
7f931a7522 AstGen: implement error set decls 2021-04-19 16:03:46 -07:00
Andrew Kelley
2083208f19 AstGen: implement functions with inferred error sets
This commit also reclaims +2 ZIR instruction tags by moving the
following to `extended`:
 * func_var_args
 * func_extra
 * func_extra_var_args
The following ZIR instruction tag is added:
 * func_inferred
2021-04-19 15:03:41 -07:00
Andrew Kelley
27d4bea9a4 AstGen: implement if optional, if error union 2021-04-19 12:25:16 -07:00
Andrew Kelley
3dadccec45 AstGen: implement while optional and while error union 2021-04-19 12:02:11 -07:00
Andrew Kelley
3f60481be4 AstGen: implement the remaining struct init ResultLoc forms 2021-04-19 11:09:00 -07:00
Andrew Kelley
ae495de54d AstGen: implement all the builtin functions 2021-04-18 22:38:41 -07:00
Andrew Kelley
5a3045b5de AstGen: implement overflow arithmetic builtins 2021-04-17 13:00:10 -07:00