14829 Commits

Author SHA1 Message Date
Andrew Kelley
761f36ff93 stage2: rework C backend for new AIR memory layout 2021-07-20 12:19:16 -07:00
Jacob G-W
a804de13c8 plan9 linker: fix after testing
* exports get rendered properly in symbol table
* global offset table is at the start of data section
  instead of after symtab
* various null use fixes
2021-07-20 12:19:16 -07:00
Andrew Kelley
d17f492017 stage2: miscellaneous fixes for the branch
* Breaking language change: inline assembly must use string literal
   syntax. This is in preparation for inline assembly improvements that
   involve more integration with the Zig language. This means we cannot
   rely on text substitution.
 * Liveness: properly handle inline assembly and function calls with
   more than 3 operands.
   - More than 35 operands is not yet supported. This is a low priority
     to implement.
   - This required implementation in codegen.zig as well.
 * Liveness: fix bug causing incorrect tomb bits.
 * Sema: enable switch expressions that are evaluated at compile-time.
   - Runtime switch instructions still need to be reworked in this
     branch. There was a TODO left here (by me) with a suggestion to do
     some bigger changes as part of the AIR memory reworking. Now that
     time has come and I plan to honor the suggestion in a future commit
     before merging this branch.
 * AIR printing: fix missing ')' on alive instructions.

We're back to "hello world" working for the x86_64 backend.
2021-07-20 12:19:16 -07:00
Luuk de Gram
2438f61f1c Refactor entire wasm-backend to use new AIR memory layout 2021-07-20 12:19:16 -07:00
Luuk de Gram
424f260f85 Fix wasm-related compile errors:
- Update `fail()` to not require a `srcLoc`.
This brings it in line with other backends, and we were always passing 'node_offset = 0', anyway.
- Fix unused local due to change of architecture wrt function/decl generation.
- Replace all old instructions to indexes within the function signatures.
2021-07-20 12:19:16 -07:00
Andrew Kelley
8082660118 stage2: codegen.zig updated to new AIR memory layout 2021-07-20 12:19:16 -07:00
Andrew Kelley
eadbee2041 stage2: first pass at printing AIR/Liveness to text
* some instructions are not implemented yet
 * fix off-by-1 in Air.getMainBody
 * Compilation: use `@import("builtin")` rather than `std.builtin`
   for the values that are different for different build configurations.
 * Sema: avoid calling `addType` in between
   air_instructions.ensureUnusedCapacity and corresponding
   appendAssumeCapacity because it can possibly add an instruction.
 * Value: functions print their names
2021-07-20 12:19:16 -07:00
Andrew Kelley
12c10139e3 Sema: finish reworking for AIR memory layout except switch 2021-07-20 12:19:16 -07:00
Andrew Kelley
0da6633909 Sema: fix implementation of getTypeOf
and rename it to typeOf
2021-07-20 12:19:16 -07:00
Andrew Kelley
1294ebe1f5 Sema: AIR memory layout reworking for noreturn instructions 2021-07-20 12:19:16 -07:00
Andrew Kelley
c020a30296 Sema: remove br_block_flat AIR instruction
Thanks to the new AIR memory layout, we can do this by turning a br
operand into a block, rather than having this special purpose
instruction.
2021-07-20 12:19:16 -07:00
Andrew Kelley
27be4f3140 Sema: more AIR memory layout reworking progress
Additionally: ZIR encoding for floats now supports float literals up to
f64, not only f32. This is because we no longer need a source location
for this instruction.
2021-07-20 12:19:16 -07:00
Andrew Kelley
7bb2d13a09 stage2: remove ZIR instructions bool_and and bool_or
These were unused. I believe this happened with the introduction of
bool_br_and and bool_br_or instructions.
2021-07-20 12:19:16 -07:00
Andrew Kelley
3c5927fb87 Sema: add a strategy for handling costly source locations
Now you can pass `.unneeded` for a `LazySrcLoc` and if there ended up
being a compile error that needed it, you'll get
`error.NeededSourceLocation`.

Callsites can now exploit this error to do the expensive computation
to produce a source location object and then repeat the operation.
2021-07-20 12:19:16 -07:00
Andrew Kelley
dbd3529d1f Sema: first pass reworking for AIR memory layout 2021-07-20 12:19:16 -07:00
Andrew Kelley
f17a05bfb7 CLI: add plan9 -ofmt help text 2021-07-20 12:19:16 -07:00
Jacob G-W
91b1896184 plan9 linker: make more incremental
The incrementalness is now roughly the same as the c backend
rather than the spirv backend before.
2021-07-20 12:19:16 -07:00
Jacob G-W
3a41e4430e codegen: add FnResult type which is a Result that removes externally_managed 2021-07-20 12:19:16 -07:00
Andrew Kelley
c09b973ec2 stage2: compile error fixes for AIR memory layout branch
Now the branch is compiling again, provided that one uses
`-Dskip-non-native`, but many code paths are disabled. The code paths
can now be re-enabled one at a time and updated to conform to the new
AIR memory layout.
2021-07-20 12:19:16 -07:00
Andrew Kelley
0f38f68696 stage2: Air and Liveness are passed ephemerally
to the link infrastructure, instead of being stored with Module.Fn. This
moves towards a strategy to make more efficient use of memory by not
storing Air or Liveness data in the Fn struct, but computing it on
demand, immediately sending it to the backend, and then immediately
freeing it.

Backends which want to defer codegen until flush() such as SPIR-V
must move the Air/Liveness data upon `updateFunc` being called and keep
track of that data in the backend implementation itself.
2021-07-20 12:19:16 -07:00
Andrew Kelley
0ffc6b5cc3 cmake: fix Liveness.zig file path 2021-07-20 12:19:16 -07:00
Andrew Kelley
913393fd3b stage2: first pass over Module.zig for AIR memory layout 2021-07-20 12:19:16 -07:00
Andrew Kelley
ee6432537e stage2: first pass over codegen.zig for AIR memory layout 2021-07-20 12:19:16 -07:00
Andrew Kelley
ef7080aed1 stage2: update Liveness, SPIR-V for new AIR memory layout
also do the inline assembly instruction
2021-07-20 12:19:16 -07:00
Andrew Kelley
9918a5fbe3 AstGen: remove unneeded field ref_start_index
Previously, this field was used because the Zir.Inst.Ref encoding
supported the concept of references to function parameters. However now
thanks to whole-file-astgen, the implementations of indexToRef and
refToIndex are trivial addition/subtraction of a comptime const integer.
2021-07-20 12:19:14 -07:00
Andrew Kelley
3c3abaf390 stage2: update liveness analysis to new AIR memory layout
It's pretty compact, with each AIR instruction only taking up 4 bits,
plus a sparse table for special instructions such as conditional branch,
switch branch, and function calls with more than 2 arguments.
2021-07-20 12:18:14 -07:00
Andrew Kelley
5d6f7b44c1 stage2: rework AIR memory layout
This commit changes the AIR file and the documentation of the memory
layout. The actual work of modifying the surrounding code (in Sema and
codegen) is not yet done.
2021-07-20 12:18:14 -07:00
Jakub Konka
a442b165f1 macho: add stub relocs when adding extern fn
in self-hosted.
2021-07-20 20:33:07 +02:00
charlieman
bfe2005167
std: remove dead code in std.os.read 2021-07-20 10:22:06 +02:00
Jakub Konka
1843ecf51b macho: add export to the symbol resolver
in updateDeclExports so that we can track globals for symbol
resolution like in the traditional linker.
2021-07-20 10:07:46 +02:00
Loris Cro
e807020679 Fixed wrong "unable to load" error for non-existing import files
- Changed ZIR encoding of `import` metadata from having instruction
  indexes to storing token indexes.
2021-07-19 23:23:42 -04:00
Isaac Freund
00e944f718 langref: remove incorrect statement on c_void
c_void is *not* simply `const c_void = opaque{};`. It has unique
semantics as any pointer type may coerce to `*c_void` which is not true
for an arbitrary `*opaque{}`.
2021-07-19 20:03:26 -04:00
Evan Haas
3e67ef5c9f translate-c: Handle underscore when used as an identifier
Use `@` syntax to escape `_` when used as an identifier.

Remove the stage1 astgen prohibition against assigning from `_`

Note: there a few stage1 bugs preventing `_` from being used as an identifier
for a local variable or function parameter; these will be fixed by stage2.
They are unlikely to arise in real C code since identifiers starting with
underscore are reserved for the implementation.
2021-07-19 12:56:23 +03:00
Tizoner
c905056562 fix style warning in json.zig 2021-07-19 12:55:05 +03:00
Adam C
95e5fac412
FIX typo in doc comment for std.math.hypot (#9413) 2021-07-18 23:53:06 +02:00
Jakub Konka
4bc72c48b7 macho: temporarily dupe a few linkedit fns so that traditional linker works 2021-07-18 18:36:48 +02:00
Jakub Konka
f6d13e9d6f zld: move contents of Zld into MachO module 2021-07-18 17:48:00 +02:00
Jakub Konka
e0b53ad3c9 macho: clean up imports 2021-07-18 15:39:01 +02:00
Jakub Konka
2828cd2983 zld: migrate symbol mgmt to incremental backend 2021-07-18 15:05:52 +02:00
Jakub Konka
5aa9c0b4ab zld: allocate empty TextBlock for synthetic ___dso_handle 2021-07-17 23:50:45 +02:00
Jakub Konka
a095263462 zld: more fixes todo with symbol resolution
namely, fixes proper symbol reolution when scanning and including
objects from static archives, and properly discard any null symbols
when a tentative definition was substituted by a defined, global symbol.
2021-07-17 23:21:04 +02:00
Jakub Konka
d8c4838c7d zld: fix incorrect global symbol collision check 2021-07-17 18:43:28 +02:00
Jakub Konka
9f20a51555 zld: demote logging back to debug from warn 2021-07-17 18:33:47 +02:00
Jakub Konka
fccac48a55 zld: fix committing stub info into final binary 2021-07-17 18:19:32 +02:00
Jakub Konka
97914d93a9 zld: fixup flush function 2021-07-17 17:30:16 +02:00
Jakub Konka
d81783375c zld: allocate TextBlocks and symbols 2021-07-17 15:13:16 +02:00
Jakub Konka
71384a383e zld: correctly set n_sect for sections as symbols 2021-07-17 11:29:40 +02:00
Jakub Konka
db8020ac0d zld: adjust resolving relocs logic to the new approach 2021-07-17 11:01:10 +02:00
Jay Petacat
9979741bff stage1: Fix OsOther by adding missing OsPlan9 2021-07-16 19:35:25 -04:00
Jakub Konka
407745a5e9 zld: simplify and move Relocations into TextBlock
It makes sense to have them as a dependent type since they only ever
deal with TextBlocks. Simplify Relocations to rely on symbol indices
and symbol resolver rather than pointers.
2021-07-17 01:03:40 +02:00