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compiler_rt: document ARM status
This commit documents the status of Run-time ABI 2022Q3 for ARM excluding C++ helper functions.
This commit is contained in:
Jan Philipp Hafer
Andrew Kelley
parent
66da64d77c
commit
f618398b24
@ -72,9 +72,11 @@ Integer and Float Operations
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| | | | | | **Integer Comparison** |
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| ✓ | __cmpsi2 | i32 | i32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` |
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| ✓ | __cmpdi2 | i64 | i64 | i32 | .. |
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| ✗ | __aeabi_lcmp | i64 | i64 | i32 | .. ARM |
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| ✓ | __cmpti2 | i128 | i128 | i32 | .. |
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| ✓ | __ucmpsi2 | u32 | u32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` |
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| ✓ | __ucmpdi2 | u64 | u64 | i32 | .. |
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| ✗ | __aeabi_ulcmp | u64 | u64 | i32 | .. ARM |
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| ✓ | __ucmpti2 | u128 | u128 | i32 | .. |
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| | | | | | **Integer Arithmetic** |
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| ✓ | __ashlsi3 | i32 | i32 | i32 | `a << b` [^unused_rl78] |
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@ -94,6 +96,7 @@ Integer and Float Operations
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| ✓ | __negti2 | i128 | i128 | i128 | .. |
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| ✓ | __mulsi3 | i32 | i32 | i32 | `a * b` |
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| ✓ | __muldi3 | i64 | i64 | i64 | .. |
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| ✓ | __aeabi_lmul | i64 | i64 | i64 | .. ARM |
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| ✓ | __multi3 | i128 | i128 | i128 | .. |
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| ✓ | __divsi3 | i32 | i32 | i32 | `a / b` |
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| ✓ | __divdi3 | i64 | i64 | i64 | .. |
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@ -110,10 +113,14 @@ Integer and Float Operations
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| ✓ | __umoddi3 | u64 | u64 | u64 | .. |
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| ✓ | __umodti3 | u128 | u128 | u128 | .. |
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| ✓ | __udivmodsi4 | u32 | u32 | u32 | `a / b, rem.* = a % b` |
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| ✓ | __aeabi_uidivmod | u32 | u32 | u32 | .. ARM |
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| ✓ | __udivmoddi4 | u64 | u64 | u64 | .. |
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| ✓ | __aeabi_uldivmod | u64 | u64 | u64 | .. ARM |
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| ✓ | __udivmodti4 | u128 | u128 | u128 | .. |
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| ✓ | __divmodsi4 | i32 | i32 | i32 | `a / b, rem.* = a % b` |
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| ✓ | __aeabi_idivmod | i32 | i32 | i32 | .. ARM |
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| ✓ | __divmoddi4 | i64 | i64 | i64 | .. |
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| ✓ | __aeabi_ldivmod | i64 | i64 | i64 | .. ARM |
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| ✓ | __divmodti4 | i128 | i128 | i128 | .. [^libgcc_compat] |
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| | | | | | **Integer Arithmetic with Trapping Overflow**|
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| ✓ | __absvsi2 | i32 | i32 | i32 | abs(a) |
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@ -142,11 +149,16 @@ Integer and Float Operations
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| ✓ | __mulodi4 | i64 | i64 | i64 | .. |
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| ✓ | __muloti4 | i128 | i128 | i128 | .. |
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| | | | | | **Float Conversion** |
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| ✓ | __extendhfdf2 | f16 | ∅ | f32 | .. |
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| ✓ | __extendsfdf2 | f32 | ∅ | f64 | .. |
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| ✓ | __aeabi_f2d | f32 | ∅ | f64 | .. |
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| ✓ | __extendsftf2 | f32 | ∅ | f128 | .. |
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| ✓ | __extendsfxf2 | f32 | ∅ | f80 | .. |
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| ✓ | __extenddftf2 | f64 | ∅ | f128 | .. |
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| ✓ | __extenddfxf2 | f64 | ∅ | f80 | .. |
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| ✗ | __aeabi_h2f | f16 | ∅ | f32 | .. ARM |
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| ✗ | __aeabi_h2f_alt | f16 | ∅ | f32 | .. ARM alternate [^VFPv3alt] |
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| ✓ | __gnu_h2f_ieee | f16 | ∅ | f32 | .. GNU naming convention |
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| ✓ | __truncsfhf2 | f32 | ∅ | f16 | rounding towards zero |
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| ✓ | __truncdfhf2 | f64 | ∅ | f16 | .. |
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| ✓ | __truncdfsf2 | f64 | ∅ | f32 | .. |
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@ -157,9 +169,11 @@ Integer and Float Operations
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| ✓ | __truncxfhf2 | f80 | ∅ | f16 | .. |
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| ✓ | __truncxfsf2 | f80 | ∅ | f32 | .. |
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| ✓ | __truncxfdf2 | f80 | ∅ | f64 | .. |
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| ✓ | __aeabi_f2h | f32 | ∅ | f16 | .. ARM |
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| ✓ | __gnu_f2h_ieee | f32 | ∅ | f16 | ..GNU naming convention |
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| ✗ | __aeabi_f2h | f32 | ∅ | f16 | .. ARM |
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| ✗ | __aeabi_f2h_alt | f32 | ∅ | f16 | .. ARM alternate [^VFPv3alt] |
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| ✓ | __gnu_f2h_ieee | f32 | ∅ | f16 | .. GNU naming convention |
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| ✓ | __aeabi_d2h | f64 | ∅ | f16 | .. ARM |
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| ✗ | __aeabi_d2h_alt | f64 | ∅ | f16 | .. ARM alternate [^VFPv3alt] |
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| ✓ | __aeabi_d2f | f64 | ∅ | f32 | .. ARM |
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| ✓ | __trunckfsf2 | f128 | ∅ | f32 | .. PPC |
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| ✓ | _Qp_qtos |*f128 | ∅ | f32 | .. SPARC |
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@ -167,12 +181,16 @@ Integer and Float Operations
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| ✓ | _Qp_qtod |*f128 | ∅ | f64 | .. SPARC |
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| ✓ | __fixhfsi | f16 | ∅ | i32 | float to int, rounding towards zero |
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| ✓ | __fixsfsi | f32 | ∅ | i32 | .. |
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| ✓ | __aeabi_f2iz | f32 | ∅ | i32 | .. ARM |
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| ✓ | __fixdfsi | f64 | ∅ | i32 | .. |
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| ✓ | __aeabi_d2iz | f64 | ∅ | i32 | .. ARM |
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| ✓ | __fixtfsi | f128 | ∅ | i32 | .. |
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| ✓ | __fixxfsi | f80 | ∅ | i32 | .. |
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| ✓ | __fixhfdi | f16 | ∅ | i64 | .. |
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| ✓ | __fixsfdi | f32 | ∅ | i64 | .. |
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| ✓ | __aeabi_f2lz | f32 | ∅ | i64 | .. ARM |
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| ✓ | __fixdfdi | f64 | ∅ | i64 | .. |
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| ✓ | __aeabi_d2lz | f64 | ∅ | i64 | .. ARM |
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| ✓ | __fixtfdi | f128 | ∅ | i64 | .. |
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| ✓ | __fixxfdi | f80 | ∅ | i64 | .. |
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| ✓ | __fixhfti | f16 | ∅ | i128 | .. |
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@ -182,12 +200,16 @@ Integer and Float Operations
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| ✓ | __fixxfti | f80 | ∅ | i128 | .. |
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| ✓ | __fixunshfsi | f16 | ∅ | u32 | float to uint, rounding towards zero. negative values become 0. |
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| ✓ | __fixunssfsi | f32 | ∅ | u32 | .. |
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| ✓ | __aeabi_f2uiz | f32 | ∅ | u32 | .. ARM |
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| ✓ | __fixunsdfsi | f64 | ∅ | u32 | .. |
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| ✓ | __aeabi_d2uiz | f64 | ∅ | u32 | .. ARM |
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| ✓ | __fixunstfsi | f128 | ∅ | u32 | .. |
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| ✓ | __fixunsxfsi | f80 | ∅ | u32 | .. |
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| ✓ | __fixunshfdi | f16 | ∅ | u64 | .. |
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| ✓ | __fixunssfdi | f32 | ∅ | u64 | .. |
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| ✓ | __aeabi_f2ulz | f32 | ∅ | u64 | .. ARM |
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| ✓ | __fixunsdfdi | f64 | ∅ | u64 | .. |
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| ✓ | __aeabi_d2ulz | f64 | ∅ | u64 | .. ARM |
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| ✓ | __fixunstfdi | f128 | ∅ | u64 | .. |
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| ✓ | __fixunsxfdi | f80 | ∅ | u64 | .. |
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| ✓ | __fixunshfti | f16 | ∅ | u128 | .. |
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@ -197,11 +219,15 @@ Integer and Float Operations
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| ✓ | __fixunsxfti | f80 | ∅ | u128 | .. |
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| ✓ | __floatsihf | i32 | ∅ | f16 | int to float |
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| ✓ | __floatsisf | i32 | ∅ | f32 | .. |
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| ✓ | __aeabi_i2f | i32 | ∅ | f32 | .. ARM |
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| ✓ | __floatsidf | i32 | ∅ | f64 | .. |
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| ✓ | __aeabi_i2d | i32 | ∅ | f64 | .. ARM |
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| ✓ | __floatsitf | i32 | ∅ | f128 | .. |
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| ✓ | __floatsixf | i32 | ∅ | f80 | .. |
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| ✓ | __floatdisf | i64 | ∅ | f32 | .. |
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| ✓ | __aeabi_l2f | i64 | ∅ | f32 | .. ARM |
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| ✓ | __floatdidf | i64 | ∅ | f64 | .. |
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| ✓ | __aeabi_l2d | i64 | ∅ | f64 | .. ARM |
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| ✓ | __floatditf | i64 | ∅ | f128 | .. |
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| ✓ | __floatdixf | i64 | ∅ | f80 | .. |
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| ✓ | __floattihf | i128 | ∅ | f16 | .. |
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@ -211,12 +237,16 @@ Integer and Float Operations
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| ✓ | __floattixf | i128 | ∅ | f80 | .. |
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| ✓ | __floatunsihf | u32 | ∅ | f16 | uint to float |
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| ✓ | __floatunsisf | u32 | ∅ | f32 | .. |
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| ✓ | __aeabi_ui2f | u32 | ∅ | f32 | .. ARM |
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| ✓ | __floatunsidf | u32 | ∅ | f64 | .. |
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| ✓ | __aeabi_ui2d | u32 | ∅ | f64 | .. ARM |
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| ✓ | __floatunsitf | u32 | ∅ | f128 | .. |
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| ✓ | __floatunsixf | u32 | ∅ | f80 | .. |
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| ✓ | __floatundihf | u64 | ∅ | f16 | .. |
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| ✓ | __floatundisf | u64 | ∅ | f32 | .. |
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| ✓ | __aeabi_ul2f | u64 | ∅ | f32 | .. ARM |
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| ✓ | __floatundidf | u64 | ∅ | f64 | .. |
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| ✓ | __aeabi_ul2d | u64 | ∅ | f64 | .. ARM |
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| ✓ | __floatunditf | u64 | ∅ | f128 | .. |
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| ✓ | __floatundixf | u64 | ∅ | f80 | .. |
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| ✓ | __floatuntihf | u128 | ∅ | f16 | .. |
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@ -353,6 +383,7 @@ Integer and Float Operations
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[^noptr_faster]: Operations without pointer and without C struct semantics lead to better optimizations.
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[^perf_addition]: Has better performance than standard method due to 2s complement semantics.
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Not provided by LLVM and libgcc.
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[^VFPv3alt]: Converts IEEE-format to VFPv3 alternative-format.
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Decimal float library routines
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@ -712,8 +743,57 @@ TODO brief description
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| | | | | | | |**BigInt Arithmetic which Return on Overflow**[^noptr_faster]|
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Further content (conditionally) exported with C abi:
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ARM-only routines
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| Done | Name | a | b | Out | Comment |
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| ---- | -------- | --- | --- | -----| ----------------------|
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| | | | | | **Float Comparison** |
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|✗|__aeabi_cfcmpeq | f32 | f32 | void | `a == b` result in PSR ZC flags[^PSRZC] |
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|✗|__aeabi_cfcmple | f32 | f32 | void | `a <= b` result .. |
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|✗|__aeabi_cfrcmple| f32 | f32 | void | `b <= a` .. |
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|✗|__aeabi_cdcmpeq | f64 | f64 | void | `a == b` .. |
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|✗|__aeabi_cdcmple | f64 | f64 | void | `a <= b` .. |
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|✗|__aeabi_cdrcmple| f64 | f64 | void | `b <= a` .. |
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| | | | | | **Float Arithmetic** |
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|✗|__aeabi_frsub | f64 | f64 | f64 | `b - a` |
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|✗|__aeabi_drsub | f64 | f64 | f64 | .. |
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| | | | | | **Special** |
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|✓|__aeabi_read_tp | ∅ | ∅ | *u8 | ret tls pointer |
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|✗|__aeabi_idiv0 | i32 | ∅ | i32 | div by 0 modifier |
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|✗|__aeabi_ldiv0 | i64 | ∅ | i64 | div by 0 modifier |
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| | | | | | **Unaligned memory access** |
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|✗|__aeabi_uread4 |[*]u8| ∅ | i32 | ret value read |
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|✗|__aeabi_uwrite4 | i32 |[*]u8| i32 | ret value written |
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|✗|__aeabi_uread8 |[*]u8| ∅ | i64 | .. |
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|✗|__aeabi_uwrite8 | i64 |[*]u8| i64 | .. |
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| Done | Name | a | b | c | Comment |
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| ---- | -------- | --- | --- | -----| ----------------------|
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| | | | | | **Memory copy, move and set** |
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|✓|__aeabi_memcpy8 |[*]u8|[*]u8| usize| *dest, *src, size |
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|✓|__aeabi_memcpy4 |[*]u8|[*]u8| usize| .. |
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|✓|__aeabi_memcpy |[*]u8|[*]u8| usize| .. |
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|✓|__aeabi_memmove8|[*]u8|[*]u8| usize| *dest, *src, size |
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|✓|__aeabi_memmove4|[*]u8|[*]u8| usize| .. |
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|✓|__aeabi_memmove |[*]u8|[*]u8| usize| .. |
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|✓|__aeabi_memset8 |[*]u8|usize| i32 | *dest, size, char |
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|✓|__aeabi_memset4 |[*]u8|usize| i32 | .. |
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|✓|__aeabi_memset |[*]u8|usize| i32 | .. |
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|✓|__aeabi_memclr8 |[*]u8| u32 | usize| *dest, size |
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|✓|__aeabi_memclr4 |[*]u8| u32 | usize| .. |
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|✓|__aeabi_memclr |[*]u8| u32 | usize| .. |
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|✓|__aeabi_uwrite8 | i64 |[*]u8| i64 | .. |
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- __aeabi_read_tp
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[^PSRZC]: return result in the CPSR Z and C flag. C is clear only if the
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operands are ordered and the first operand is less than the second.
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Z is set only when the operands are ordered and equal.
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Preserves all core registers except ip, lr, and the CPSR.
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- aarch64 outline atomics
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- arm routines (memory routines + memclr [setting to 0], divmod routines and stubs for unwind_cpp)
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- atomics
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- bcmp
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- clear cache
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@ -1,4 +1,5 @@
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// ARM specific builtins
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//! Implementation of ARM specific builtins for Run-time ABI
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//! This file includes all ARM-only functions.
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const std = @import("std");
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const builtin = @import("builtin");
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const arch = builtin.cpu.arch;
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@ -38,6 +39,9 @@ comptime {
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if (builtin.os.tag == .linux) {
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@export(__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = common.linkage, .visibility = common.visibility });
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}
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// floating-point helper functions (double-precision reverse subtraction, y – x), see subdf3.zig
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@export(__aeabi_drsub, .{ .name = "__aeabi_drsub", .linkage = common.linkage, .visibility = common.visibility });
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}
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}
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}
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@ -186,3 +190,8 @@ pub fn __aeabi_ldivmod() callconv(.Naked) void {
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::: "memory");
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unreachable;
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}
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pub fn __aeabi_drsub(a: f64, b: f64) callconv(.AAPCS) f64 {
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const neg_a = @bitCast(f64, @bitCast(u64, a) ^ (@as(u64, 1) << 63));
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return b + neg_a;
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}
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