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astgen: implement pointer types
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8111453cc1
commit
f3770dcc30
@ -2957,13 +2957,13 @@ fn zirPtrType(sema: *Sema, block: *Scope.Block, inst: zir.Inst.Index) InnerError
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break :blk try sema.resolveAlreadyCoercedInt(block, .unneeded, ref, u32);
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} else 0;
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const bit_start = if (inst_data.flags.has_bit_start) blk: {
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const bit_start = if (inst_data.flags.has_bit_range) blk: {
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const ref = sema.code.extra[extra_i];
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extra_i += 1;
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break :blk try sema.resolveAlreadyCoercedInt(block, .unneeded, ref, u16);
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} else 0;
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const bit_end = if (inst_data.flags.has_bit_end) blk: {
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const bit_end = if (inst_data.flags.has_bit_range) blk: {
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const ref = sema.code.extra[extra_i];
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extra_i += 1;
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break :blk try sema.resolveAlreadyCoercedInt(block, .unneeded, ref, u16);
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108
src/astgen.zig
108
src/astgen.zig
@ -603,10 +603,10 @@ pub fn expr(mod: *Module, scope: *Scope, rl: ResultLoc, node: ast.Node.Index) In
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),
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},
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.ptr_type_aligned => return ptrType(mod, scope, rl, tree.ptrTypeAligned(node)),
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.ptr_type_sentinel => return ptrType(mod, scope, rl, tree.ptrTypeSentinel(node)),
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.ptr_type => return ptrType(mod, scope, rl, tree.ptrType(node)),
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.ptr_type_bit_range => return ptrType(mod, scope, rl, tree.ptrTypeBitRange(node)),
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.ptr_type_aligned => return ptrType(mod, scope, rl, node, tree.ptrTypeAligned(node)),
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.ptr_type_sentinel => return ptrType(mod, scope, rl, node, tree.ptrTypeSentinel(node)),
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.ptr_type => return ptrType(mod, scope, rl, node, tree.ptrType(node)),
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.ptr_type_bit_range => return ptrType(mod, scope, rl, node, tree.ptrTypeBitRange(node)),
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.container_decl,
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.container_decl_trailing,
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@ -1346,47 +1346,85 @@ fn ptrType(
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mod: *Module,
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scope: *Scope,
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rl: ResultLoc,
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node: ast.Node.Index,
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ptr_info: ast.full.PtrType,
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) InnerError!zir.Inst.Ref {
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if (true) @panic("TODO update for zir-memory-layout");
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const tree = scope.tree();
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const gz = scope.getGenZir();
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const simple = ptr_info.allowzero_token == null and
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ptr_info.ast.align_node == 0 and
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ptr_info.volatile_token == null and
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ptr_info.ast.sentinel == 0;
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const elem_type = try typeExpr(mod, scope, ptr_info.ast.child_type);
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const simple = ptr_info.ast.align_node == 0 and
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ptr_info.ast.sentinel == 0 and
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ptr_info.ast.bit_range_start == 0;
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if (simple) {
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const child_type = try typeExpr(mod, scope, ptr_info.ast.child_type);
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const mutable = ptr_info.const_token == null;
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const T = zir.Inst.Tag;
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const result = try addZIRUnOp(mod, scope, src, switch (ptr_info.size) {
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.One => if (mutable) T.single_mut_ptr_type else T.single_const_ptr_type,
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.Many => if (mutable) T.many_mut_ptr_type else T.many_const_ptr_type,
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.C => if (mutable) T.c_mut_ptr_type else T.c_const_ptr_type,
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.Slice => if (mutable) T.mut_slice_type else T.const_slice_type,
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}, child_type);
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return rvalue(mod, scope, rl, result);
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const result = try gz.add(.{ .tag = .ptr_type_simple, .data = .{
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.ptr_type_simple = .{
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.is_allowzero = ptr_info.allowzero_token != null,
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.is_mutable = ptr_info.const_token == null,
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.is_volatile = ptr_info.volatile_token != null,
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.size = ptr_info.size,
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.elem_type = elem_type,
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},
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} });
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return rvalue(mod, scope, rl, result, node);
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}
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var kw_args: std.meta.fieldInfo(zir.Inst.PtrType, .kw_args).field_type = .{};
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kw_args.size = ptr_info.size;
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kw_args.@"allowzero" = ptr_info.allowzero_token != null;
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if (ptr_info.ast.align_node != 0) {
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kw_args.@"align" = try expr(mod, scope, .none, ptr_info.ast.align_node);
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if (ptr_info.ast.bit_range_start != 0) {
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kw_args.align_bit_start = try expr(mod, scope, .none, ptr_info.ast.bit_range_start);
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kw_args.align_bit_end = try expr(mod, scope, .none, ptr_info.ast.bit_range_end);
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}
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}
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kw_args.mutable = ptr_info.const_token == null;
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kw_args.@"volatile" = ptr_info.volatile_token != null;
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const child_type = try typeExpr(mod, scope, ptr_info.ast.child_type);
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var sentinel_ref: zir.Inst.Ref = 0;
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var align_ref: zir.Inst.Ref = 0;
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var bit_start_ref: zir.Inst.Ref = 0;
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var bit_end_ref: zir.Inst.Ref = 0;
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var trailing_count: u32 = 0;
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if (ptr_info.ast.sentinel != 0) {
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kw_args.sentinel = try expr(mod, scope, .{ .ty = child_type }, ptr_info.ast.sentinel);
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sentinel_ref = try expr(mod, scope, .{ .ty = elem_type }, ptr_info.ast.sentinel);
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trailing_count += 1;
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}
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const result = try addZIRInst(mod, scope, src, zir.Inst.PtrType, .{ .child_type = child_type }, kw_args);
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return rvalue(mod, scope, rl, result);
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if (ptr_info.ast.align_node != 0) {
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align_ref = try expr(mod, scope, .none, ptr_info.ast.align_node);
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trailing_count += 1;
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}
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if (ptr_info.ast.bit_range_start != 0) {
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assert(ptr_info.ast.bit_range_end != 0);
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bit_start_ref = try expr(mod, scope, .none, ptr_info.ast.bit_range_start);
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bit_end_ref = try expr(mod, scope, .none, ptr_info.ast.bit_range_end);
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trailing_count += 2;
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}
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const gpa = gz.zir_code.gpa;
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try gz.instructions.ensureCapacity(gpa, gz.instructions.items.len + 1);
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try gz.zir_code.instructions.ensureCapacity(gpa, gz.zir_code.instructions.len + 1);
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try gz.zir_code.extra.ensureCapacity(gpa, gz.zir_code.extra.items.len +
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@typeInfo(zir.Inst.PtrType).Struct.fields.len + trailing_count);
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const payload_index = gz.zir_code.addExtraAssumeCapacity(zir.Inst.PtrType{ .elem_type = elem_type });
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if (sentinel_ref != 0) gz.zir_code.extra.appendAssumeCapacity(sentinel_ref);
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if (align_ref != 0) gz.zir_code.extra.appendAssumeCapacity(align_ref);
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if (bit_start_ref != 0) {
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gz.zir_code.extra.appendAssumeCapacity(bit_start_ref);
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gz.zir_code.extra.appendAssumeCapacity(bit_end_ref);
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}
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const new_index = @intCast(zir.Inst.Index, gz.zir_code.instructions.len);
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const result = new_index + gz.zir_code.ref_start_index;
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gz.zir_code.instructions.appendAssumeCapacity(.{ .tag = .ptr_type, .data = .{
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.ptr_type = .{
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.flags = .{
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.is_allowzero = ptr_info.allowzero_token != null,
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.is_mutable = ptr_info.const_token == null,
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.is_volatile = ptr_info.volatile_token != null,
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.has_sentinel = sentinel_ref != 0,
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.has_align = align_ref != 0,
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.has_bit_range = bit_start_ref != 0,
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},
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.size = ptr_info.size,
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.payload_index = payload_index,
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},
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} });
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gz.instructions.appendAssumeCapacity(new_index);
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return rvalue(mod, scope, rl, result, node);
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}
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fn arrayType(mod: *Module, scope: *Scope, rl: ResultLoc, node: ast.Node.Index) !zir.Inst.Ref {
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@ -1146,9 +1146,8 @@ pub const Inst = struct {
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is_volatile: bool,
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has_sentinel: bool,
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has_align: bool,
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has_bit_start: bool,
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has_bit_end: bool,
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_: u1 = undefined,
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has_bit_range: bool,
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_: u2 = undefined,
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},
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size: std.builtin.TypeInfo.Pointer.Size,
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/// Index into extra. See `PtrType`.
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@ -1244,8 +1243,8 @@ pub const Inst = struct {
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/// trailing Ref fields:
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/// 0. sentinel: Ref // if `has_sentinel` flag is set
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/// 1. align: Ref // if `has_align` flag is set
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/// 2. bit_start: Ref // if `has_bit_start` flag is set
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/// 3. bit_end: Ref // if `has_bit_end` flag is set
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/// 2. bit_start: Ref // if `has_bit_range` flag is set
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/// 3. bit_end: Ref // if `has_bit_range` flag is set
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pub const PtrType = struct {
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elem_type: Ref,
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};
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