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test: disable some SIMD ABI tests on LoongArch

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Alex Rønne Petersen 2025-09-18 00:11:21 +02:00
parent beb25b0430
commit f1c2ae271c
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test/c_abi/main.zig
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@ -1135,6 +1135,7 @@ extern fn c_ret_medium_vec() MediumVec;
test "medium simd vector" {
if (builtin.zig_backend == .stage2_x86_64 and !comptime builtin.cpu.has(.x86, .avx)) return error.SkipZigTest;
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
c_medium_vec(.{ 1, 2, 3, 4 });
@ -1155,6 +1156,7 @@ test "big simd vector" {
if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;
c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });