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std.crypto: SHA-256 Properly gate comptime conditional
This feature detection must be done at comptime so that we avoid generating invalid ASM for the target.
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@ -192,85 +192,89 @@ fn Sha2x32(comptime params: Sha2Params32) type {
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s[i] |= @as(u32, b[i * 4 + 3]) << 0;
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}
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if (builtin.cpu.arch == .aarch64 and builtin.cpu.features.isEnabled(@enumToInt(std.Target.aarch64.Feature.sha2))) {
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var x: v4u32 = d.s[0..4].*;
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var y: v4u32 = d.s[4..8].*;
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const s_v = @ptrCast(*[16]v4u32, &s);
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switch (builtin.cpu.arch) {
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.aarch64 => if (comptime builtin.cpu.features.isEnabled(@enumToInt(std.Target.aarch64.Feature.sha2))) {
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var x: v4u32 = d.s[0..4].*;
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var y: v4u32 = d.s[4..8].*;
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const s_v = @ptrCast(*[16]v4u32, &s);
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comptime var k: u8 = 0;
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inline while (k < 16) : (k += 1) {
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if (k > 3) {
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s_v[k] = asm (
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\\sha256su0.4s %[w0_3], %[w4_7]
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\\sha256su1.4s %[w0_3], %[w8_11], %[w12_15]
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: [w0_3] "=w" (-> v4u32),
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: [_] "0" (s_v[k - 4]),
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[w4_7] "w" (s_v[k - 3]),
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[w8_11] "w" (s_v[k - 2]),
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[w12_15] "w" (s_v[k - 1]),
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comptime var k: u8 = 0;
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inline while (k < 16) : (k += 1) {
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if (k > 3) {
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s_v[k] = asm (
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\\sha256su0.4s %[w0_3], %[w4_7]
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\\sha256su1.4s %[w0_3], %[w8_11], %[w12_15]
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: [w0_3] "=w" (-> v4u32),
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: [_] "0" (s_v[k - 4]),
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[w4_7] "w" (s_v[k - 3]),
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[w8_11] "w" (s_v[k - 2]),
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[w12_15] "w" (s_v[k - 1]),
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);
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}
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const w: v4u32 = s_v[k] +% @as(v4u32, W[4 * k ..][0..4].*);
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asm volatile (
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\\mov.4s v0, %[x]
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\\sha256h.4s %[x], %[y], %[w]
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\\sha256h2.4s %[y], v0, %[w]
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: [x] "=w" (x),
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[y] "=w" (y),
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: [_] "0" (x),
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[_] "1" (y),
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[w] "w" (w),
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: "v0"
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);
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}
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const w: v4u32 = s_v[k] +% @as(v4u32, W[4 * k ..][0..4].*);
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asm volatile (
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\\mov.4s v0, %[x]
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\\sha256h.4s %[x], %[y], %[w]
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\\sha256h2.4s %[y], v0, %[w]
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: [x] "=w" (x),
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[y] "=w" (y),
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: [_] "0" (x),
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[_] "1" (y),
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[w] "w" (w),
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: "v0"
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);
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}
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d.s[0..4].* = x +% @as(v4u32, d.s[0..4].*);
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d.s[4..8].* = y +% @as(v4u32, d.s[4..8].*);
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return;
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},
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.x86_64 => if (comptime builtin.cpu.features.isEnabled(@enumToInt(std.Target.x86.Feature.sha))) {
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var x: v4u32 = [_]u32{ d.s[5], d.s[4], d.s[1], d.s[0] };
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var y: v4u32 = [_]u32{ d.s[7], d.s[6], d.s[3], d.s[2] };
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const s_v = @ptrCast(*[16]v4u32, &s);
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d.s[0..4].* = x +% @as(v4u32, d.s[0..4].*);
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d.s[4..8].* = y +% @as(v4u32, d.s[4..8].*);
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return;
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} else if (builtin.cpu.arch == .x86_64 and builtin.cpu.features.isEnabled(@enumToInt(std.Target.x86.Feature.sha))) {
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var x: v4u32 = [_]u32{ d.s[5], d.s[4], d.s[1], d.s[0] };
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var y: v4u32 = [_]u32{ d.s[7], d.s[6], d.s[3], d.s[2] };
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const s_v = @ptrCast(*[16]v4u32, &s);
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comptime var k: u8 = 0;
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inline while (k < 16) : (k += 1) {
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if (k < 12) {
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const r = asm ("sha256msg1 %[w4_7], %[w0_3]"
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: [w0_3] "=x" (-> v4u32),
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: [_] "0" (s_v[k]),
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[w4_7] "x" (s_v[k + 1]),
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);
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const t = @shuffle(u32, s_v[k + 2], s_v[k + 3], [_]i32{ 1, 2, 3, -1 });
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s_v[k + 4] = asm ("sha256msg2 %[w12_15], %[t]"
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: [t] "=x" (-> v4u32),
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: [_] "0" (r +% t),
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[w12_15] "x" (s_v[k + 3]),
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);
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}
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comptime var k: u8 = 0;
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inline while (k < 16) : (k += 1) {
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if (k < 12) {
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const r = asm ("sha256msg1 %[w4_7], %[w0_3]"
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: [w0_3] "=x" (-> v4u32),
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: [_] "0" (s_v[k]),
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[w4_7] "x" (s_v[k + 1]),
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);
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const t = @shuffle(u32, s_v[k + 2], s_v[k + 3], [_]i32{ 1, 2, 3, -1 });
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s_v[k + 4] = asm ("sha256msg2 %[w12_15], %[t]"
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: [t] "=x" (-> v4u32),
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: [_] "0" (r +% t),
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[w12_15] "x" (s_v[k + 3]),
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const w: v4u32 = s_v[k] +% @as(v4u32, W[4 * k ..][0..4].*);
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asm volatile (
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\\sha256rnds2 %[x], %[y]
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\\pshufd $0xe, %%xmm0, %%xmm0
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\\sha256rnds2 %[y], %[x]
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: [y] "=x" (y),
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[x] "=x" (x),
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: [_] "0" (y),
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[_] "1" (x),
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[_] "{xmm0}" (w),
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);
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}
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const w: v4u32 = s_v[k] +% @as(v4u32, W[4 * k ..][0..4].*);
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asm volatile (
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\\sha256rnds2 %[x], %[y]
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\\pshufd $0xe, %%xmm0, %%xmm0
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\\sha256rnds2 %[y], %[x]
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: [y] "=x" (y),
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[x] "=x" (x),
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: [_] "0" (y),
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[_] "1" (x),
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[_] "{xmm0}" (w),
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);
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}
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d.s[0] +%= x[3];
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d.s[1] +%= x[2];
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d.s[4] +%= x[1];
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d.s[5] +%= x[0];
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d.s[2] +%= y[3];
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d.s[3] +%= y[2];
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d.s[6] +%= y[1];
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d.s[7] +%= y[0];
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return;
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d.s[0] +%= x[3];
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d.s[1] +%= x[2];
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d.s[4] +%= x[1];
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d.s[5] +%= x[0];
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d.s[2] +%= y[3];
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d.s[3] +%= y[2];
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d.s[6] +%= y[1];
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d.s[7] +%= y[0];
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return;
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},
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else => {},
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}
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while (i < 64) : (i += 1) {
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