From 197fb26da0b8bb068fc8b52931870f97661b797d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 06:40:17 +0200 Subject: [PATCH 01/14] libunwind: Fix return type of DwarfFDECache::findFDE() https://github.com/llvm/llvm-project/pull/146308 --- lib/libunwind/src/UnwindCursor.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/libunwind/src/UnwindCursor.hpp b/lib/libunwind/src/UnwindCursor.hpp index 3831d8e071..cd4d40b9ac 100644 --- a/lib/libunwind/src/UnwindCursor.hpp +++ b/lib/libunwind/src/UnwindCursor.hpp @@ -150,7 +150,7 @@ bool DwarfFDECache::_registeredForDyldUnloads = false; #endif template -typename A::pint_t DwarfFDECache::findFDE(pint_t mh, pint_t pc) { +typename DwarfFDECache::pint_t DwarfFDECache::findFDE(pint_t mh, pint_t pc) { pint_t result = 0; _LIBUNWIND_LOG_IF_FALSE(_lock.lock_shared()); for (entry *p = _buffer; p < _bufferUsed; ++p) { From b64fe53ad509a1f582483e886f8b740a59b379c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 06:56:43 +0200 Subject: [PATCH 02/14] std.simd: Increase branch quota in suggestVectorLengthForCpu() This does a bunch of CPU family and feature checks. It would be annoying to have to @setEvalBranchQuota() at every comptime use site. --- lib/std/simd.zig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/std/simd.zig b/lib/std/simd.zig index 94abb436a4..7854c9d126 100644 --- a/lib/std/simd.zig +++ b/lib/std/simd.zig @@ -9,6 +9,8 @@ const std = @import("std"); const builtin = @import("builtin"); pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?comptime_int { + @setEvalBranchQuota(2_000); + // This is guesswork, if you have better suggestions can add it or edit the current here const element_bit_size = @max(8, std.math.ceilPowerOfTwo(u16, @bitSizeOf(T)) catch unreachable); const vector_bit_size: u16 = blk: { From 6b6e336e07308fd23f3061b5be11407956b2a460 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 12:18:35 +0200 Subject: [PATCH 03/14] std.Build.Step.CheckObject: Truncate st_other before interpreting it Tools are free to use the upper bits of this field for whatever; thus, tools that want to interpret the visibility type should truncate to 2 bits. --- lib/std/Build/Step/CheckObject.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/Build/Step/CheckObject.zig b/lib/std/Build/Step/CheckObject.zig index c2ff85c6f1..3b78258d1c 100644 --- a/lib/std/Build/Step/CheckObject.zig +++ b/lib/std/Build/Step/CheckObject.zig @@ -2270,7 +2270,7 @@ const ElfDumper = struct { try writer.print(" {s}", .{sym_bind}); } - const sym_vis = @as(elf.STV, @enumFromInt(sym.st_other)); + const sym_vis = @as(elf.STV, @enumFromInt(@as(u2, @truncate(sym.st_other)))); try writer.print(" {s}", .{@tagName(sym_vis)}); const sym_name = switch (sym.st_type()) { From aa7b32d78189a66bb1fb62fd9735be5d15651d5b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 1 Jul 2025 03:41:52 +0200 Subject: [PATCH 04/14] llvm: Fix alignment of by-ref ptr_elem_val and slice_elem_val --- src/codegen/llvm.zig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 225bc050d5..a48fb68352 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -6831,8 +6831,8 @@ pub const FuncGen = struct { self.maybeMarkAllowZeroAccess(slice_ty.ptrInfo(zcu)); - const elem_alignment = elem_ty.abiAlignment(zcu).toLlvm(); - return self.loadByRef(ptr, elem_ty, elem_alignment, if (slice_ty.isVolatilePtr(zcu)) .@"volatile" else .normal); + const slice_align = (slice_ty.ptrAlignment(zcu).min(elem_ty.abiAlignment(zcu))).toLlvm(); + return self.loadByRef(ptr, elem_ty, slice_align, if (slice_ty.isVolatilePtr(zcu)) .@"volatile" else .normal); } self.maybeMarkAllowZeroAccess(slice_ty.ptrInfo(zcu)); @@ -6909,8 +6909,8 @@ pub const FuncGen = struct { self.maybeMarkAllowZeroAccess(ptr_ty.ptrInfo(zcu)); - const elem_alignment = elem_ty.abiAlignment(zcu).toLlvm(); - return self.loadByRef(ptr, elem_ty, elem_alignment, if (ptr_ty.isVolatilePtr(zcu)) .@"volatile" else .normal); + const ptr_align = (ptr_ty.ptrAlignment(zcu).min(elem_ty.abiAlignment(zcu))).toLlvm(); + return self.loadByRef(ptr, elem_ty, ptr_align, if (ptr_ty.isVolatilePtr(zcu)) .@"volatile" else .normal); } self.maybeMarkAllowZeroAccess(ptr_ty.ptrInfo(zcu)); From 07114e6bc69106fb77beb879a8a2f78a4ba4b256 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 07:01:35 +0200 Subject: [PATCH 05/14] llvm: Disable the machine outliner pass on RISC-V --- src/codegen/llvm.zig | 3 +++ src/codegen/llvm/bindings.zig | 1 + src/zig_llvm.cpp | 16 ++++++++++------ src/zig_llvm.h | 1 + 4 files changed, 15 insertions(+), 6 deletions(-) diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index a48fb68352..a5e6d35fd6 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -1068,6 +1068,9 @@ pub const Object = struct { .full => .FullPreLink, }, .allow_fast_isel = true, + // LLVM's RISC-V backend for some reason enables the machine outliner by default even + // though it's clearly not ready and produces multiple miscompilations in our std tests. + .allow_machine_outliner = !comp.root_mod.resolved_target.result.cpu.arch.isRISCV(), .asm_filename = null, .bin_filename = options.bin_path, .llvm_ir_filename = options.post_ir_path, diff --git a/src/codegen/llvm/bindings.zig b/src/codegen/llvm/bindings.zig index 44ca599fdc..5d2d4c2a99 100644 --- a/src/codegen/llvm/bindings.zig +++ b/src/codegen/llvm/bindings.zig @@ -92,6 +92,7 @@ pub const TargetMachine = opaque { sancov: bool, lto: LtoPhase, allow_fast_isel: bool, + allow_machine_outliner: bool, asm_filename: ?[*:0]const u8, bin_filename: ?[*:0]const u8, llvm_ir_filename: ?[*:0]const u8, diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index cb624ea256..fe4e421dc3 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -260,6 +260,16 @@ ZIG_EXTERN_C bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machi TargetMachine &target_machine = *reinterpret_cast(targ_machine_ref); + if (options->allow_fast_isel) { + target_machine.setO0WantsFastISel(true); + } else { + target_machine.setFastISel(false); + } + + if (!options->allow_machine_outliner) { + target_machine.setMachineOutliner(false); + } + Module &llvm_module = *unwrap(module_ref); // Pipeline configurations @@ -385,12 +395,6 @@ ZIG_EXTERN_C bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machi } } - if (options->allow_fast_isel) { - target_machine.setO0WantsFastISel(true); - } else { - target_machine.setFastISel(false); - } - // Optimization phase module_pm.run(llvm_module, module_am); diff --git a/src/zig_llvm.h b/src/zig_llvm.h index f75e119988..e2dba338c3 100644 --- a/src/zig_llvm.h +++ b/src/zig_llvm.h @@ -71,6 +71,7 @@ struct ZigLLVMEmitOptions { bool sancov; ZigLLVMThinOrFullLTOPhase lto; bool allow_fast_isel; + bool allow_machine_outliner; const char *asm_filename; const char *bin_filename; const char *llvm_ir_filename; From fd2d4507c86057bf43ae2198edeb3ebddfa6caca Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 06:54:45 +0200 Subject: [PATCH 06/14] std.os.linux: Define ucontext_t and mcontext_t for RISC-V Closes #24239. --- lib/std/os/linux/riscv32.zig | 38 ++++++++++++++++++++++++++++++++++-- lib/std/os/linux/riscv64.zig | 38 ++++++++++++++++++++++++++++++++++-- 2 files changed, 72 insertions(+), 4 deletions(-) diff --git a/lib/std/os/linux/riscv32.zig b/lib/std/os/linux/riscv32.zig index c37b0ee76c..7c03b3259e 100644 --- a/lib/std/os/linux/riscv32.zig +++ b/lib/std/os/linux/riscv32.zig @@ -7,6 +7,8 @@ const SYS = linux.SYS; const uid_t = std.os.linux.uid_t; const gid_t = std.os.linux.gid_t; const pid_t = std.os.linux.pid_t; +const stack_t = linux.stack_t; +const sigset_t = linux.sigset_t; const sockaddr = linux.sockaddr; const socklen_t = linux.socklen_t; const timespec = std.os.linux.timespec; @@ -261,8 +263,40 @@ pub const VDSO = struct { pub const CGT_VER = "LINUX_4.15"; }; -/// TODO -pub const ucontext_t = void; +pub const f_ext_state = extern struct { + f: [32]f32, + fcsr: u32, +}; + +pub const d_ext_state = extern struct { + f: [32]f64, + fcsr: u32, +}; + +pub const q_ext_state = extern struct { + f: [32]f128, + fcsr: u32, + _reserved: [3]u32, +}; + +pub const fpstate = extern union { + f: f_ext_state, + d: d_ext_state, + q: q_ext_state, +}; + +pub const mcontext_t = extern struct { + gregs: [32]u32, + fpregs: fpstate, +}; + +pub const ucontext_t = extern struct { + flags: c_ulong, + link: ?*ucontext_t, + stack: stack_t, + sigmask: [1024 / @bitSizeOf(c_ulong)]c_ulong, // Currently a libc-compatible (1024-bit) sigmask + mcontext: mcontext_t, +}; /// TODO pub const getcontext = {}; diff --git a/lib/std/os/linux/riscv64.zig b/lib/std/os/linux/riscv64.zig index b803e5b581..3d3c8a5afa 100644 --- a/lib/std/os/linux/riscv64.zig +++ b/lib/std/os/linux/riscv64.zig @@ -7,6 +7,8 @@ const SYS = linux.SYS; const uid_t = std.os.linux.uid_t; const gid_t = std.os.linux.gid_t; const pid_t = std.os.linux.pid_t; +const stack_t = linux.stack_t; +const sigset_t = linux.sigset_t; const sockaddr = linux.sockaddr; const socklen_t = linux.socklen_t; const timespec = std.os.linux.timespec; @@ -261,8 +263,40 @@ pub const VDSO = struct { pub const CGT_VER = "LINUX_4.15"; }; -/// TODO -pub const ucontext_t = void; +pub const f_ext_state = extern struct { + f: [32]f32, + fcsr: u32, +}; + +pub const d_ext_state = extern struct { + f: [32]f64, + fcsr: u32, +}; + +pub const q_ext_state = extern struct { + f: [32]f128, + fcsr: u32, + _reserved: [3]u32, +}; + +pub const fpstate = extern union { + f: f_ext_state, + d: d_ext_state, + q: q_ext_state, +}; + +pub const mcontext_t = extern struct { + gregs: [32]u64, + fpregs: fpstate, +}; + +pub const ucontext_t = extern struct { + flags: c_ulong, + link: ?*ucontext_t, + stack: stack_t, + sigmask: [1024 / @bitSizeOf(c_ulong)]c_ulong, // Currently a libc-compatible (1024-bit) sigmask + mcontext: mcontext_t, +}; /// TODO pub const getcontext = {}; From 3d7fb4f204940875e7cd9e4dd82f28c464f688e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 06:59:06 +0200 Subject: [PATCH 07/14] std.zig.system.linux: Add detection for some extra RISC-V CPUs --- lib/std/zig/system/linux.zig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/std/zig/system/linux.zig b/lib/std/zig/system/linux.zig index a0935bdb05..d8cff2403f 100644 --- a/lib/std/zig/system/linux.zig +++ b/lib/std/zig/system/linux.zig @@ -76,9 +76,11 @@ const RiscvCpuinfoImpl = struct { const cpu_names = .{ .{ "sifive,u54", &Target.riscv.cpu.sifive_u54 }, + .{ "sifive,u54-mc", &Target.riscv.cpu.sifive_u54 }, .{ "sifive,u7", &Target.riscv.cpu.sifive_7_series }, .{ "sifive,u74", &Target.riscv.cpu.sifive_u74 }, .{ "sifive,u74-mc", &Target.riscv.cpu.sifive_u74 }, + .{ "spacemit,x60", &Target.riscv.cpu.spacemit_x60 }, }; fn line_hook(self: *RiscvCpuinfoImpl, key: []const u8, value: []const u8) !bool { From 80c3de40b3a9b9a751200c07d7eaf4d6965ca5c2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 07:55:15 +0200 Subject: [PATCH 08/14] test: Properly limit glibc_compat versions based on the host --- test/link/glibc_compat/build.zig | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/test/link/glibc_compat/build.zig b/test/link/glibc_compat/build.zig index c7f94b04c7..6c2c924cae 100644 --- a/test/link/glibc_compat/build.zig +++ b/test/link/glibc_compat/build.zig @@ -33,7 +33,7 @@ pub fn build(b: *std.Build) void { } // Build & run a C test case against a sampling of supported glibc versions - for ([_][]const u8{ + versions: for ([_][]const u8{ // "native-linux-gnu.2.0", // fails with a pile of missing symbols. "native-linux-gnu.2.2.5", "native-linux-gnu.2.4", @@ -52,9 +52,14 @@ pub fn build(b: *std.Build) void { const glibc_ver = target.result.os.version_range.linux.glibc; // only build test if glibc version supports the architecture - if (target.result.cpu.arch.isAARCH64()) { - if (glibc_ver.order(.{ .major = 2, .minor = 17, .patch = 0 }) == .lt) { + for (std.zig.target.available_libcs) |libc| { + if (libc.arch != target.result.cpu.arch or + libc.os != target.result.os.tag or + libc.abi != target.result.abi) continue; + + if (libc.glibc_min) |min| { + if (glibc_ver.order(min) == .lt) continue :versions; } } @@ -147,7 +152,7 @@ pub fn build(b: *std.Build) void { } // Build & run a Zig test case against a sampling of supported glibc versions - for ([_][]const u8{ + versions: for ([_][]const u8{ "native-linux-gnu.2.17", // Currently oldest supported, see #17769 "native-linux-gnu.2.23", "native-linux-gnu.2.28", @@ -161,6 +166,18 @@ pub fn build(b: *std.Build) void { const glibc_ver = target.result.os.version_range.linux.glibc; + // only build test if glibc version supports the architecture + for (std.zig.target.available_libcs) |libc| { + if (libc.arch != target.result.cpu.arch or + libc.os != target.result.os.tag or + libc.abi != target.result.abi) + continue; + + if (libc.glibc_min) |min| { + if (glibc_ver.order(min) == .lt) continue :versions; + } + } + const exe = b.addExecutable(.{ .name = t, .root_module = b.createModule(.{ From 1fcabe0bfcad7bd981ce883a2c407f2b023320ad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 15:36:02 +0200 Subject: [PATCH 09/14] test: Only run coff_dwarf test on aarch64, x86, x86_64 This will just fail if run on architectures like riscv64. --- test/standalone/coff_dwarf/build.zig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/test/standalone/coff_dwarf/build.zig b/test/standalone/coff_dwarf/build.zig index 53425db8d3..d143319547 100644 --- a/test/standalone/coff_dwarf/build.zig +++ b/test/standalone/coff_dwarf/build.zig @@ -3,6 +3,14 @@ const builtin = @import("builtin"); /// This tests the path where DWARF information is embedded in a COFF binary pub fn build(b: *std.Build) void { + switch (builtin.cpu.arch) { + .aarch64, + .x86, + .x86_64, + => {}, + else => return, + } + const test_step = b.step("test", "Test it"); b.default_step = test_step; From 1f2e3b39ae8ddd4ae7a969daa8c56949de81295e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 07:04:35 +0200 Subject: [PATCH 10/14] test: Disable vector division operators on RISC-V with vector support https://github.com/ziglang/zig/issues/24301 --- test/behavior/vector.zig | 1 + 1 file changed, 1 insertion(+) diff --git a/test/behavior/vector.zig b/test/behavior/vector.zig index f2e5807267..ee8d6711e4 100644 --- a/test/behavior/vector.zig +++ b/test/behavior/vector.zig @@ -560,6 +560,7 @@ test "vector division operators" { if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest; + if (comptime builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24301 const S = struct { fn doTheTestDiv(comptime T: type, x: @Vector(4, T), y: @Vector(4, T)) !void { From b739fec841ced5a6b41f36847945f638254b33bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 15:45:17 +0200 Subject: [PATCH 11/14] test: Disable stack_iterator test on riscv64-linux https://github.com/ziglang/zig/issues/24310 --- test/standalone/stack_iterator/build.zig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/test/standalone/stack_iterator/build.zig b/test/standalone/stack_iterator/build.zig index 486eb96439..ee69f33d2e 100644 --- a/test/standalone/stack_iterator/build.zig +++ b/test/standalone/stack_iterator/build.zig @@ -8,6 +8,11 @@ pub fn build(b: *std.Build) void { const target = b.standardTargetOptions(.{}); const optimize = b.standardOptimizeOption(.{}); + if (target.result.cpu.arch.isRISCV() and target.result.os.tag == .linux) { + // https://github.com/ziglang/zig/issues/24310 + return; + } + // Unwinding with a frame pointer // // getcontext version: zig std From 9f064dff477a100b95438c7842253dfb20224553 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 10:55:28 +0200 Subject: [PATCH 12/14] langref: runtime_shrExact_overflow does not work as expected on RISC-V https://github.com/ziglang/zig/issues/24304 --- doc/langref/runtime_shrExact_overflow.zig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/langref/runtime_shrExact_overflow.zig b/doc/langref/runtime_shrExact_overflow.zig index cc7d7908fb..1350e9da75 100644 --- a/doc/langref/runtime_shrExact_overflow.zig +++ b/doc/langref/runtime_shrExact_overflow.zig @@ -1,3 +1,4 @@ +const builtin = @import("builtin"); const std = @import("std"); pub fn main() void { @@ -5,6 +6,8 @@ pub fn main() void { _ = &x; const y = @shrExact(x, 2); std.debug.print("value: {}\n", .{y}); + + if (builtin.cpu.arch.isRISCV() and builtin.zig_backend == .stage2_llvm) @panic("https://github.com/ziglang/zig/issues/24304"); } // exe=fail From 1c9d9b70ec10dce3d85d7ae44297b33d42afa848 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 30 Jun 2025 06:47:29 +0200 Subject: [PATCH 13/14] std.bit_set: Disable IntegerBitSet decltest on RISC-V with vector support https://github.com/ziglang/zig/issues/24300 --- lib/std/bit_set.zig | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/std/bit_set.zig b/lib/std/bit_set.zig index 3c8f3cf723..293e88afca 100644 --- a/lib/std/bit_set.zig +++ b/lib/std/bit_set.zig @@ -1699,6 +1699,7 @@ fn testStaticBitSet(comptime Set: type) !void { test IntegerBitSet { if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; + if (comptime builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24300 try testStaticBitSet(IntegerBitSet(0)); try testStaticBitSet(IntegerBitSet(1)); From 8e511e031f72ef2bf236d498f32bf1013cacb882 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 1 Jul 2025 18:21:55 +0200 Subject: [PATCH 14/14] std.crypto.salsa20: Disable some tests on RISC-V with vector support https://github.com/ziglang/zig/issues/24299 --- lib/std/crypto/salsa20.zig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/lib/std/crypto/salsa20.zig b/lib/std/crypto/salsa20.zig index 6adcd4a244..0660c5ba06 100644 --- a/lib/std/crypto/salsa20.zig +++ b/lib/std/crypto/salsa20.zig @@ -557,6 +557,8 @@ pub const SealedBox = struct { const htest = @import("test.zig"); test "(x)salsa20" { + if (builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24299 + const key = [_]u8{0x69} ** 32; const nonce = [_]u8{0x42} ** 8; const msg = [_]u8{0} ** 20; @@ -600,6 +602,8 @@ test "xsalsa20poly1305 secretbox" { } test "xsalsa20poly1305 box" { + if (builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24299 + var msg: [100]u8 = undefined; var msg2: [msg.len]u8 = undefined; var nonce: [Box.nonce_length]u8 = undefined; @@ -614,6 +618,8 @@ test "xsalsa20poly1305 box" { } test "xsalsa20poly1305 sealedbox" { + if (builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24299 + var msg: [100]u8 = undefined; var msg2: [msg.len]u8 = undefined; var boxed: [msg.len + SealedBox.seal_length]u8 = undefined;