diff --git a/src-self-hosted/codegen.zig b/src-self-hosted/codegen.zig
index 74404d706e..f5daaee6da 100644
--- a/src-self-hosted/codegen.zig
+++ b/src-self-hosted/codegen.zig
@@ -588,7 +588,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
             entry.value = .dead;
             switch (prev_value) {
                 .register => |reg| {
-                    const reg64 = reg.to64();
+                    const reg64 = if (arch == .x86_64) reg.to64() else reg;
                     _ = branch.registers.remove(reg64);
                     branch.markRegFree(reg64);
                 },
@@ -1585,10 +1585,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
                         if (!self.wantSafety())
                             return; // The already existing value will do just fine.
                         // Write the debug undefined value.
-                        switch (reg.size()) {
-                            64 => return self.genSetReg(src, reg, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
-                            else => unreachable,
-                        }
+                        return self.genSetReg(src, reg, .{ .immediate = 0xaaaaaaaaaaaaaaaa });
                     },
                     .immediate => |unsigned_x| {
                         const x = @bitCast(i64, unsigned_x);
diff --git a/src-self-hosted/codegen/riscv64.zig b/src-self-hosted/codegen/riscv64.zig
index 4b311feaf9..c5c762709a 100644
--- a/src-self-hosted/codegen/riscv64.zig
+++ b/src-self-hosted/codegen/riscv64.zig
@@ -71,18 +71,6 @@ pub const Register = enum(u8) {
         return null;
     }
 
-    /// Returns the bit-width of the register.
-    pub fn size(self: @This()) u7 {
-        return switch (@enumToInt(self)) {
-            0...31 => 64,
-            else => unreachable,
-        };
-    }
-    
-    pub fn to64(self: @This()) Register {
-        return self;
-    }
-
     /// Returns the register's id.
     pub fn id(self: @This()) u5 {
         return @truncate(u5, @enumToInt(self));
diff --git a/test/stage2/compare_output.zig b/test/stage2/compare_output.zig
index b461e21144..b124a4ef2d 100644
--- a/test/stage2/compare_output.zig
+++ b/test/stage2/compare_output.zig
@@ -403,4 +403,40 @@ pub fn addCases(ctx: *TestContext) !void {
             "",
         );
     }
+    
+    {
+        var case = ctx.exe("hello world with updates", riscv64);
+        // Regular old hello world
+        case.addCompareOutput(
+            \\export fn _start() noreturn {
+            \\    print();
+            \\
+            \\    exit();
+            \\}
+            \\
+            \\fn print() void {
+            \\    asm volatile ("ecall"
+            \\        :
+            \\        : [number] "{a7}" (64),
+            \\          [arg1] "{a0}" (1),
+            \\          [arg2] "{a1}" (@ptrToInt("Hello, World!\n")),
+            \\          [arg3] "{a2}" ("Hello, World!\n".len)
+            \\        : "rcx", "r11", "memory"
+            \\    );
+            \\    return;
+            \\}
+            \\
+            \\fn exit() noreturn {
+            \\    asm volatile ("ecall"
+            \\        :
+            \\        : [number] "{a7}" (94),
+            \\          [arg1] "{a0}" (0)
+            \\        : "rcx", "r11", "memory"
+            \\    );
+            \\    unreachable;
+            \\}
+        ,
+            "Hello, World!\n",
+        );
+    }
 }