From e9efed9ed117c1b6f5fc138999d82e0dbb1f13bf Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 1 May 2024 18:57:09 -0700
Subject: [PATCH] LLVM: zeroext/signext does happen on macos

Fixes a regression introduced in 3ce7fee9dd8bbb6f56e47758a9a8ada028400c71.
---
 src/codegen/llvm.zig | 48 +++++++++++++++++++++++++-------------------
 1 file changed, 27 insertions(+), 21 deletions(-)

diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index c7b51ad507..71481e859b 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -11577,30 +11577,36 @@ fn ccAbiPromoteInt(
         .Int, .Enum, .ErrorSet => ty.intInfo(mod),
         else => return null,
     };
-    return switch (target.cpu.arch) {
-        .riscv64 => switch (int_info.bits) {
-            0...16 => int_info.signedness,
-            32 => .signed, // LLVM always signextends 32 bit ints, unsure if bug.
-            17...31, 33...63 => int_info.signedness,
-            else => null,
-        },
-
-        .sparc64,
-        .powerpc64,
-        .powerpc64le,
-        => switch (int_info.bits) {
-            0...63 => int_info.signedness,
-            else => null,
-        },
-
-        .aarch64,
-        .aarch64_be,
-        => null,
-
-        else => switch (int_info.bits) {
+    return switch (target.os.tag) {
+        .macos => switch (int_info.bits) {
             0...16 => int_info.signedness,
             else => null,
         },
+        else => switch (target.cpu.arch) {
+            .riscv64 => switch (int_info.bits) {
+                0...16 => int_info.signedness,
+                32 => .signed, // LLVM always signextends 32 bit ints, unsure if bug.
+                17...31, 33...63 => int_info.signedness,
+                else => null,
+            },
+
+            .sparc64,
+            .powerpc64,
+            .powerpc64le,
+            => switch (int_info.bits) {
+                0...63 => int_info.signedness,
+                else => null,
+            },
+
+            .aarch64,
+            .aarch64_be,
+            => null,
+
+            else => switch (int_info.bits) {
+                0...16 => int_info.signedness,
+                else => null,
+            },
+        },
     };
 }