diff --git a/src/arch/riscv64/Emit.zig b/src/arch/riscv64/Emit.zig
index b2e97041cb..d85629ad4b 100644
--- a/src/arch/riscv64/Emit.zig
+++ b/src/arch/riscv64/Emit.zig
@@ -517,6 +517,7 @@ fn instructionSize(emit: *Emit, inst: Mir.Inst.Index) usize {
         .cmp_eq,
         .cmp_imm_eq,
         .cmp_gte,
+        .load_symbol,
         => 8,
 
         else => 4,