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std.elf: Bring the EM enum up to date.
Based on: * `include/elf/common.h` in binutils * `include/uapi/linux/elf-em.h` in Linux * https://www.sco.com/developers/gabi/latest/ch4.eheader.html I opted to use the tag naming of binutils because it seems to be by far the most complete and authoritative source at this point in time.
This commit is contained in:
Alex Rønne Petersen
Andrew Kelley
parent
290ccb160e
commit
e5ee9c1e43
@ -846,7 +846,7 @@ pub fn toElfMachine(target: Target) std.elf.EM {
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.avr => .AVR,
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.bpfel, .bpfeb => .BPF,
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.csky => .CSKY,
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.hexagon => .HEXAGON,
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.hexagon => .QDSP6,
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.kalimba => .CSR_KALIMBA,
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.lanai => .LANAI,
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.loongarch32, .loongarch64 => .LOONGARCH,
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427
lib/std/elf.zig
427
lib/std/elf.zig
@ -1101,549 +1101,456 @@ pub const Half = u16;
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pub const EM = enum(u16) {
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/// No machine
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NONE = 0,
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/// AT&T WE 32100
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M32 = 1,
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/// SPARC
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/// SUN SPARC
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SPARC = 2,
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/// Intel 386
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/// Intel 80386
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@"386" = 3,
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/// Motorola 68000
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/// Motorola m68k family
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@"68K" = 4,
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/// Motorola 88000
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/// Motorola m88k family
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@"88K" = 5,
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/// Intel MCU
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IAMCU = 6,
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/// Intel 80860
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@"860" = 7,
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/// MIPS R3000
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/// MIPS R3000 (officially, big-endian only)
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MIPS = 8,
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/// IBM System/370
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S370 = 9,
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/// MIPS RS3000 Little-endian
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/// MIPS R3000 (and R4000) little-endian, Oct 4 1993 Draft (deprecated)
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MIPS_RS3_LE = 10,
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/// Old version of Sparc v9, from before the ABI (deprecated)
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OLD_SPARCV9 = 11,
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/// SPU Mark II
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SPU_2 = 13,
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/// Hewlett-Packard PA-RISC
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/// HPPA
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PARISC = 15,
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/// Fujitsu VPP500
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/// Fujitsu VPP500 (also old version of PowerPC; deprecated)
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VPP500 = 17,
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/// Enhanced instruction set SPARC
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/// Sun's "v8plus"
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SPARC32PLUS = 18,
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/// Intel 80960
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@"960" = 19,
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/// PowerPC
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PPC = 20,
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/// PowerPC64
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/// 64-bit PowerPC
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PPC64 = 21,
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/// IBM System/390
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/// IBM S/390
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S390 = 22,
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/// IBM SPU/SPC
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/// Sony/Toshiba/IBM SPU
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SPU = 23,
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/// NEC V800
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/// NEC V800 series
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V800 = 36,
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/// Fujitsu FR20
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FR20 = 37,
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/// TRW RH-32
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/// TRW RH32
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RH32 = 38,
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/// Motorola RCE
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RCE = 39,
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/// Motorola M*Core, aka RCE (also Fujitsu MMA)
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MCORE = 39,
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/// ARM
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ARM = 40,
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/// DEC Alpha
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ALPHA = 41,
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/// Hitachi SH
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/// Digital Alpha
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OLD_ALPHA = 41,
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/// Renesas (formerly Hitachi) / SuperH SH
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SH = 42,
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/// SPARC V9
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/// SPARC v9 64-bit
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SPARCV9 = 43,
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/// Siemens TriCore
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/// Siemens Tricore embedded processor
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TRICORE = 44,
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/// Argonaut RISC Core
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/// ARC Cores
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ARC = 45,
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/// Hitachi H8/300
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/// Renesas (formerly Hitachi) H8/300
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H8_300 = 46,
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/// Hitachi H8/300H
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/// Renesas (formerly Hitachi) H8/300H
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H8_300H = 47,
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/// Hitachi H8S
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/// Renesas (formerly Hitachi) H8S
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H8S = 48,
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/// Hitachi H8/500
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/// Renesas (formerly Hitachi) H8/500
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H8_500 = 49,
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/// Intel IA-64 processor architecture
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/// Intel IA-64 Processor
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IA_64 = 50,
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/// Stanford MIPS-X
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MIPS_X = 51,
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/// Motorola ColdFire
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/// Motorola Coldfire
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COLDFIRE = 52,
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/// Motorola M68HC12
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@"68HC12" = 53,
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/// Fujitsu MMA Multimedia Accelerator
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/// Fujitsu Multimedia Accelerator
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MMA = 54,
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/// Siemens PCP
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PCP = 55,
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/// Sony nCPU embedded RISC processor
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NCPU = 56,
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/// Denso NDR1 microprocessor
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NDR1 = 57,
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/// Motorola Star*Core processor
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STARCORE = 58,
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/// Toyota ME16 processor
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ME16 = 59,
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/// STMicroelectronics ST100 processor
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ST100 = 60,
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/// Advanced Logic Corp. TinyJ embedded processor family
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/// Advanced Logic Corp. TinyJ embedded processor
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TINYJ = 61,
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/// AMD x86-64 architecture
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/// Advanced Micro Devices X86-64 processor
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X86_64 = 62,
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/// Sony DSP Processor
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PDSP = 63,
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/// Digital Equipment Corp. PDP-10
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PDP10 = 64,
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/// Digital Equipment Corp. PDP-11
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PDP11 = 65,
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/// Siemens FX66 microcontroller
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FX66 = 66,
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/// STMicroelectronics ST9+ 8/16 bit microcontroller
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ST9PLUS = 67,
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/// STMicroelectronics ST7 8-bit microcontroller
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ST7 = 68,
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/// Motorola MC68HC16 Microcontroller
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@"68HC16" = 69,
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/// Motorola MC68HC11 Microcontroller
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@"68HC11" = 70,
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/// Motorola MC68HC08 Microcontroller
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@"68HC08" = 71,
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/// Motorola MC68HC05 Microcontroller
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@"68HC05" = 72,
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/// Silicon Graphics SVx
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SVX = 73,
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/// STMicroelectronics ST19 8-bit microcontroller
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/// STMicroelectronics ST19 8-bit cpu
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ST19 = 74,
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/// Digital VAX
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VAX = 75,
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/// Axis Communications 32-bit embedded processor
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CRIS = 76,
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/// Infineon Technologies 32-bit embedded processor
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/// Infineon Technologies 32-bit embedded cpu
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JAVELIN = 77,
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/// Element 14 64-bit DSP Processor
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/// Element 14 64-bit DSP processor
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FIREPATH = 78,
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/// LSI Logic 16-bit DSP Processor
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/// LSI Logic's 16-bit DSP processor
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ZSP = 79,
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/// Donald Knuth's educational 64-bit processor
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MMIX = 80,
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/// Harvard University machine-independent object files
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/// Harvard's machine-independent format
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HUANY = 81,
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/// SiTera Prism
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PRISM = 82,
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/// Atmel AVR 8-bit microcontroller
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AVR = 83,
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/// Fujitsu FR30
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FR30 = 84,
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/// Mitsubishi D10V
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D10V = 85,
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/// Mitsubishi D30V
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D30V = 86,
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/// NEC v850
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/// Renesas V850 (formerly NEC V850)
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V850 = 87,
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/// Mitsubishi M32R
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/// Renesas M32R (formerly Mitsubishi M32R)
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M32R = 88,
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/// Matsushita MN10300
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MN10300 = 89,
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/// Matsushita MN10200
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MN10200 = 90,
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/// picoJava
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PJ = 91,
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/// OpenRISC 32-bit embedded processor
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OPENRISC = 92,
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/// ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
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/// OpenRISC 1000 32-bit embedded processor
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OR1K = 92,
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/// ARC International ARCompact processor
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ARC_COMPACT = 93,
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/// Tensilica Xtensa Architecture
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XTENSA = 94,
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/// Alphamosaic VideoCore processor
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/// Alphamosaic VideoCore processor (also old Sunplus S+core7 backend magic number)
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VIDEOCORE = 95,
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/// Thompson Multimedia General Purpose Processor
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TMM_GPP = 96,
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/// National Semiconductor 32000 series
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NS32K = 97,
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/// Tenor Network TPC processor
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TPC = 98,
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/// Trebia SNP 1000 processor
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/// Trebia SNP 1000 processor (also old value for picoJava; deprecated)
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SNP1K = 99,
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/// STMicroelectronics (www.st.com) ST200
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/// STMicroelectronics ST200 microcontroller
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ST200 = 100,
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/// Ubicom IP2xxx microcontroller family
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/// Ubicom IP2022 micro controller
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IP2K = 101,
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/// MAX Processor
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MAX = 102,
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/// National Semiconductor CompactRISC microprocessor
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/// National Semiconductor CompactRISC
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CR = 103,
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/// Fujitsu F2MC16
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F2MC16 = 104,
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/// Texas Instruments embedded microcontroller msp430
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/// TI msp430 micro controller
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MSP430 = 105,
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/// Analog Devices Blackfin (DSP) processor
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/// ADI Blackfin
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BLACKFIN = 106,
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/// S1C33 Family of Seiko Epson processors
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SE_C33 = 107,
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/// Sharp embedded microprocessor
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SEP = 108,
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/// Arca RISC Microprocessor
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ARCA = 109,
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/// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
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UNICORE = 110,
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/// eXcess: 16/32/64-bit configurable embedded CPU
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EXCESS = 111,
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/// Icera Semiconductor Inc. Deep Execution Processor
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DXP = 112,
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/// Altera Nios II soft-core processor
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ALTERA_NIOS2 = 113,
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/// National Semiconductor CompactRISC CRX
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/// National Semiconductor CRX
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CRX = 114,
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/// Motorola XGATE embedded processor
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/// Motorola XGATE embedded processor (also old value for National Semiconductor CompactRISC; deprecated)
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XGATE = 115,
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/// Infineon C16x/XC16x processor
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C166 = 116,
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/// Renesas M16C series microprocessors
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M16C = 117,
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/// Microchip Technology dsPIC30F Digital Signal Controller
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DSPIC30F = 118,
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/// Freescale Communication Engine RISC core
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CE = 119,
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/// Renesas M32C series microprocessors
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M32C = 120,
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/// Altium TSK3000 core
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TSK3000 = 131,
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/// Freescale RS08 embedded processor
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RS08 = 132,
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/// Analog Devices SHARC family of 32-bit DSP processors
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SHARC = 133,
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/// Cyan Technology eCOG2 microprocessor
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ECOG2 = 134,
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/// Sunplus S+core7 RISC processor
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SCORE7 = 135,
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/// Sunplus S+core (and S+core7) RISC processor
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SCORE = 135,
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/// New Japan Radio (NJR) 24-bit DSP Processor
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DSP24 = 136,
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/// Broadcom VideoCore III processor
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VIDEOCORE3 = 137,
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/// RISC processor for Lattice FPGA architecture
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LATTICEMICO32 = 138,
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/// Seiko Epson C17 family
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SE_C17 = 139,
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/// The Texas Instruments TMS320C6000 DSP family
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/// Texas Instruments TMS320C6000 DSP family
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TI_C6000 = 140,
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/// The Texas Instruments TMS320C2000 DSP family
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/// Texas Instruments TMS320C2000 DSP family
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TI_C2000 = 141,
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/// The Texas Instruments TMS320C55x DSP family
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/// Texas Instruments TMS320C55x DSP family
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TI_C5500 = 142,
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/// Texas Instruments Programmable Realtime Unit
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TI_PRU = 144,
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/// STMicroelectronics 64bit VLIW Data Signal Processor
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MMDSP_PLUS = 160,
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/// Cypress M8C microprocessor
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CYPRESS_M8C = 161,
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/// Renesas R32C series microprocessors
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R32C = 162,
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/// NXP Semiconductors TriMedia architecture family
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TRIMEDIA = 163,
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/// Qualcomm Hexagon processor
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HEXAGON = 164,
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/// QUALCOMM DSP6 Processor
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QDSP6 = 164,
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/// Intel 8051 and variants
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@"8051" = 165,
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/// STMicroelectronics STxP7x family of configurable and extensible RISC processors
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/// STMicroelectronics STxP7x family
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STXP7X = 166,
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/// Andes Technology compact code size embedded RISC processor family
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NDS32 = 167,
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/// Cyan Technology eCOG1X family
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ECOG1X = 168,
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/// Dallas Semiconductor MAXQ30 Core Micro-controllers
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MAXQ30 = 169,
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/// New Japan Radio (NJR) 16-bit DSP Processor
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XIMO16 = 170,
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/// M2000 Reconfigurable RISC Microprocessor
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MANIK = 171,
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/// Cray Inc. NV2 vector architecture
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CRAYNV2 = 172,
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/// Renesas RX family
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RX = 173,
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/// Imagination Technologies META processor architecture
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/// Imagination Technologies Meta processor architecture
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METAG = 174,
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/// MCST Elbrus general purpose hardware architecture
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MCST_ELBRUS = 175,
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/// Cyan Technology eCOG16 family
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ECOG16 = 176,
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/// National Semiconductor CompactRISC CR16 16-bit microprocessor
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/// National Semiconductor CompactRISC 16-bit processor
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CR16 = 177,
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/// Freescale Extended Time Processing Unit
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ETPU = 178,
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/// Infineon Technologies SLE9X core
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SLE9X = 179,
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/// Intel L10M
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L10M = 180,
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/// Intel K10M
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K10M = 181,
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/// ARM AArch64
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/// ARM 64-bit architecture
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AARCH64 = 183,
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/// Atmel Corporation 32-bit microprocessor family
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AVR32 = 185,
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/// STMicroeletronics STM8 8-bit microcontroller
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STM8 = 186,
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/// Tilera TILE64 multicore architecture family
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TILE64 = 187,
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/// Tilera TILEPro multicore architecture family
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TILEPRO = 188,
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/// Xilinx MicroBlaze
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/// Xilinx MicroBlaze 32-bit RISC soft processor core
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MICROBLAZE = 189,
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/// NVIDIA CUDA architecture
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CUDA = 190,
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/// Tilera TILE-Gx multicore architecture family
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TILEGX = 191,
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/// CloudShield architecture family
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CLOUDSHIELD = 192,
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/// KIPO-KAIST Core-A 1st generation processor family
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COREA_1ST = 193,
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/// KIPO-KAIST Core-A 2nd generation processor family
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COREA_2ND = 194,
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/// Synopsys ARCompact V2
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ARC_COMPACT2 = 195,
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/// Open8 8-bit RISC soft processor core
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OPEN8 = 196,
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/// Renesas RL78 family
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RL78 = 197,
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/// Broadcom VideoCore V processor
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VIDEOCORE5 = 198,
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/// Renesas 78KOR family
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@"78KOR" = 199,
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/// Renesas 78K0R
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@"78K0R" = 199,
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/// Freescale 56800EX Digital Signal Controller (DSC)
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@"56800EX" = 200,
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/// Beyond BA1 CPU architecture
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BA1 = 201,
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/// Beyond BA2 CPU architecture
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BA2 = 202,
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/// XMOS xCORE processor family
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XCORE = 203,
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/// Microchip 8-bit PIC(r) family
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MCHP_PIC = 204,
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/// Reserved by Intel
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INTEL205 = 205,
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/// Reserved by Intel
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INTEL206 = 206,
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/// Reserved by Intel
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INTEL207 = 207,
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||||
/// Reserved by Intel
|
||||
INTEL208 = 208,
|
||||
|
||||
/// Reserved by Intel
|
||||
INTEL209 = 209,
|
||||
|
||||
/// Intel Graphics Technology
|
||||
INTELGT = 205,
|
||||
/// KM211 KM32 32-bit processor
|
||||
KM32 = 210,
|
||||
|
||||
/// KM211 KMX32 32-bit processor
|
||||
KMX32 = 211,
|
||||
|
||||
/// KM211 KMX16 16-bit processor
|
||||
KMX16 = 212,
|
||||
|
||||
/// KM211 KMX8 8-bit processor
|
||||
KMX8 = 213,
|
||||
|
||||
/// KM211 KVARC processor
|
||||
KVARC = 214,
|
||||
|
||||
/// Paneve CDP architecture family
|
||||
CDP = 215,
|
||||
|
||||
/// Cognitive Smart Memory Processor
|
||||
COGE = 216,
|
||||
|
||||
/// iCelero CoolEngine
|
||||
/// Bluechip Systems CoolEngine
|
||||
COOL = 217,
|
||||
|
||||
/// Nanoradio Optimized RISC
|
||||
NORC = 218,
|
||||
|
||||
/// CSR Kalimba architecture family
|
||||
CSR_KALIMBA = 219,
|
||||
|
||||
/// Zilog Z80
|
||||
Z80 = 220,
|
||||
/// Controls and Data Services VISIUMcore processor
|
||||
VISIUM = 221,
|
||||
/// FTDI Chip FT32 high performance 32-bit RISC architecture
|
||||
FT32 = 222,
|
||||
/// Moxie processor family
|
||||
MOXIE = 223,
|
||||
/// AMD GPU architecture
|
||||
AMDGPU = 224,
|
||||
|
||||
/// RISC-V
|
||||
RISCV = 243,
|
||||
|
||||
/// Lanai 32-bit processor
|
||||
LANAI = 244,
|
||||
|
||||
/// Linux kernel bpf virtual machine
|
||||
/// CEVA Processor Architecture Family
|
||||
CEVA = 245,
|
||||
/// CEVA X2 Processor Family
|
||||
CEVA_X2 = 246,
|
||||
/// Linux BPF - in-kernel virtual machine
|
||||
BPF = 247,
|
||||
|
||||
/// C-SKY
|
||||
/// Graphcore Intelligent Processing Unit
|
||||
GRAPHCORE_IPU = 248,
|
||||
/// Imagination Technologies
|
||||
IMG1 = 249,
|
||||
/// Netronome Flow Processor
|
||||
NFP = 250,
|
||||
/// NEC Vector Engine
|
||||
VE = 251,
|
||||
/// C-SKY processor family
|
||||
CSKY = 252,
|
||||
|
||||
/// Synopsys ARCv2.3 64-bit
|
||||
ARC_COMPACT3_64 = 253,
|
||||
/// MOS Technology MCS 6502 processor
|
||||
MCS6502 = 254,
|
||||
/// Synopsys ARCv2.3 32-bit
|
||||
ARC_COMPACT3 = 255,
|
||||
/// Kalray VLIW core of the MPPA processor family
|
||||
KVX = 256,
|
||||
/// WDC 65816/65C816
|
||||
@"65816" = 257,
|
||||
/// LoongArch
|
||||
LOONGARCH = 258,
|
||||
|
||||
/// Fujitsu FR-V
|
||||
FRV = 0x5441,
|
||||
/// ChipON KungFu32
|
||||
KF32 = 259,
|
||||
/// LAPIS nX-U16/U8
|
||||
U16_U8CORE = 260,
|
||||
/// Tachyum
|
||||
TACHYUM = 261,
|
||||
/// NXP 56800EF Digital Signal Controller (DSC)
|
||||
@"56800EF" = 262,
|
||||
/// AVR
|
||||
AVR_OLD = 0x1057,
|
||||
/// MSP430
|
||||
MSP430_OLD = 0x1059,
|
||||
/// Morpho MT
|
||||
MT = 0x2530,
|
||||
/// FR30
|
||||
CYGNUS_FR30 = 0x3330,
|
||||
/// WebAssembly (as used by LLVM)
|
||||
WEBASSEMBLY = 0x4157,
|
||||
/// Infineon Technologies 16-bit microcontroller with C166-V2 core
|
||||
XC16X = 0x4688,
|
||||
/// Freescale S12Z
|
||||
S12Z = 0x4def,
|
||||
/// DLX
|
||||
DLX = 0x5aa5,
|
||||
/// FRV
|
||||
CYGNUS_FRV = 0x5441,
|
||||
/// D10V
|
||||
CYGNUS_D10V = 0x7650,
|
||||
/// D30V
|
||||
CYGNUS_D30V = 0x7676,
|
||||
/// Ubicom IP2xxx
|
||||
IP2K_OLD = 0x8217,
|
||||
/// Cygnus PowerPC ELF
|
||||
CYGNUS_POWERPC = 0x9025,
|
||||
/// Alpha
|
||||
ALPHA = 0x9026,
|
||||
/// Cygnus M32R ELF
|
||||
CYGNUS_M32R = 0x9041,
|
||||
/// V850
|
||||
CYGNUS_V850 = 0x9080,
|
||||
/// Old S/390
|
||||
S390_OLD = 0xa390,
|
||||
/// Old unofficial value for Xtensa
|
||||
XTENSA_OLD = 0xabc7,
|
||||
/// Xstormy16
|
||||
XSTORMY16 = 0xad45,
|
||||
/// MN10300
|
||||
CYGNUS_MN10300 = 0xbeef,
|
||||
/// MN10200
|
||||
CYGNUS_MN10200 = 0xdead,
|
||||
/// Renesas M32C and M16C
|
||||
M32C_OLD = 0xfeb0,
|
||||
/// Vitesse IQ2000
|
||||
IQ2000 = 0xfeba,
|
||||
/// NIOS
|
||||
NIOS32 = 0xfebb,
|
||||
/// Toshiba MeP
|
||||
CYGNUS_MEP = 0xf00d,
|
||||
/// Old unofficial value for Moxie
|
||||
MOXIE_OLD = 0xfeed,
|
||||
/// Old MicroBlaze
|
||||
MICROBLAZE_OLD = 0xbaab,
|
||||
/// Adapteva's Epiphany architecture
|
||||
ADAPTEVA_EPIPHANY = 0x1223,
|
||||
|
||||
_,
|
||||
};
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user