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std.elf: Bring the EM enum up to date.

Browse Source 
Based on:

* `include/elf/common.h` in binutils
* `include/uapi/linux/elf-em.h` in Linux
* https://www.sco.com/developers/gabi/latest/ch4.eheader.html

I opted to use the tag naming of binutils because it seems to be by far the most
complete and authoritative source at this point in time.
This commit is contained in:
Alex Rønne Petersen 2024-08-20 21:29:55 +02:00 committed by Andrew Kelley
parent 290ccb160e
commit e5ee9c1e43
2 changed files with 168 additions and 261 deletions
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2
lib/std/Target.zig
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@ -846,7 +846,7 @@ pub fn toElfMachine(target: Target) std.elf.EM {
.avr => .AVR, .avr => .AVR,
.bpfel, .bpfeb => .BPF, .bpfel, .bpfeb => .BPF,
.csky => .CSKY, .csky => .CSKY,
.hexagon => .HEXAGON, .hexagon => .QDSP6,
.kalimba => .CSR_KALIMBA, .kalimba => .CSR_KALIMBA,
.lanai => .LANAI, .lanai => .LANAI,
.loongarch32, .loongarch64 => .LOONGARCH, .loongarch32, .loongarch64 => .LOONGARCH,

427
lib/std/elf.zig
View File

@ -1101,549 +1101,456 @@ pub const Half = u16;
pub const EM = enum(u16) { pub const EM = enum(u16) {
/// No machine /// No machine
NONE = 0, NONE = 0,
/// AT&T WE 32100 /// AT&T WE 32100
M32 = 1, M32 = 1,
/// SUN SPARC
/// SPARC
SPARC = 2, SPARC = 2,
/// Intel 80386
/// Intel 386
@"386" = 3, @"386" = 3,
/// Motorola m68k family
/// Motorola 68000
@"68K" = 4, @"68K" = 4,
/// Motorola m88k family
/// Motorola 88000
@"88K" = 5, @"88K" = 5,
/// Intel MCU /// Intel MCU
IAMCU = 6, IAMCU = 6,
/// Intel 80860 /// Intel 80860
@"860" = 7, @"860" = 7,
/// MIPS R3000 (officially, big-endian only)
/// MIPS R3000
MIPS = 8, MIPS = 8,
/// IBM System/370 /// IBM System/370
S370 = 9, S370 = 9,
/// MIPS R3000 (and R4000) little-endian, Oct 4 1993 Draft (deprecated)
/// MIPS RS3000 Little-endian
MIPS_RS3_LE = 10, MIPS_RS3_LE = 10,
/// Old version of Sparc v9, from before the ABI (deprecated)
OLD_SPARCV9 = 11,
/// SPU Mark II /// SPU Mark II
SPU_2 = 13, SPU_2 = 13,
/// HPPA
/// Hewlett-Packard PA-RISC
PARISC = 15, PARISC = 15,
/// Fujitsu VPP500 (also old version of PowerPC; deprecated)
/// Fujitsu VPP500
VPP500 = 17, VPP500 = 17,
/// Sun's "v8plus"
/// Enhanced instruction set SPARC
SPARC32PLUS = 18, SPARC32PLUS = 18,
/// Intel 80960 /// Intel 80960
@"960" = 19, @"960" = 19,
/// PowerPC /// PowerPC
PPC = 20, PPC = 20,
/// 64-bit PowerPC
/// PowerPC64
PPC64 = 21, PPC64 = 21,
/// IBM S/390
/// IBM System/390
S390 = 22, S390 = 22,
/// Sony/Toshiba/IBM SPU
/// IBM SPU/SPC
SPU = 23, SPU = 23,
/// NEC V800 series
/// NEC V800
V800 = 36, V800 = 36,
/// Fujitsu FR20 /// Fujitsu FR20
FR20 = 37, FR20 = 37,
/// TRW RH32
/// TRW RH-32
RH32 = 38, RH32 = 38,
/// Motorola M*Core, aka RCE (also Fujitsu MMA)
/// Motorola RCE MCORE = 39,
RCE = 39,
/// ARM /// ARM
ARM = 40, ARM = 40,
/// Digital Alpha
/// DEC Alpha OLD_ALPHA = 41,
ALPHA = 41, /// Renesas (formerly Hitachi) / SuperH SH
/// Hitachi SH
SH = 42, SH = 42,
/// SPARC v9 64-bit
/// SPARC V9
SPARCV9 = 43, SPARCV9 = 43,
/// Siemens Tricore embedded processor
/// Siemens TriCore
TRICORE = 44, TRICORE = 44,
/// ARC Cores
/// Argonaut RISC Core
ARC = 45, ARC = 45,
/// Renesas (formerly Hitachi) H8/300
/// Hitachi H8/300
H8_300 = 46, H8_300 = 46,
/// Renesas (formerly Hitachi) H8/300H
/// Hitachi H8/300H
H8_300H = 47, H8_300H = 47,
/// Renesas (formerly Hitachi) H8S
/// Hitachi H8S
H8S = 48, H8S = 48,
/// Renesas (formerly Hitachi) H8/500
/// Hitachi H8/500
H8_500 = 49, H8_500 = 49,
/// Intel IA-64 Processor
/// Intel IA-64 processor architecture
IA_64 = 50, IA_64 = 50,
/// Stanford MIPS-X /// Stanford MIPS-X
MIPS_X = 51, MIPS_X = 51,
/// Motorola Coldfire
/// Motorola ColdFire
COLDFIRE = 52, COLDFIRE = 52,
/// Motorola M68HC12 /// Motorola M68HC12
@"68HC12" = 53, @"68HC12" = 53,
/// Fujitsu Multimedia Accelerator
/// Fujitsu MMA Multimedia Accelerator
MMA = 54, MMA = 54,
/// Siemens PCP /// Siemens PCP
PCP = 55, PCP = 55,
/// Sony nCPU embedded RISC processor /// Sony nCPU embedded RISC processor
NCPU = 56, NCPU = 56,
/// Denso NDR1 microprocessor /// Denso NDR1 microprocessor
NDR1 = 57, NDR1 = 57,
/// Motorola Star*Core processor /// Motorola Star*Core processor
STARCORE = 58, STARCORE = 58,
/// Toyota ME16 processor /// Toyota ME16 processor
ME16 = 59, ME16 = 59,
/// STMicroelectronics ST100 processor /// STMicroelectronics ST100 processor
ST100 = 60, ST100 = 60,
/// Advanced Logic Corp. TinyJ embedded processor
/// Advanced Logic Corp. TinyJ embedded processor family
TINYJ = 61, TINYJ = 61,
/// Advanced Micro Devices X86-64 processor
/// AMD x86-64 architecture
X86_64 = 62, X86_64 = 62,
/// Sony DSP Processor /// Sony DSP Processor
PDSP = 63, PDSP = 63,
/// Digital Equipment Corp. PDP-10 /// Digital Equipment Corp. PDP-10
PDP10 = 64, PDP10 = 64,
/// Digital Equipment Corp. PDP-11 /// Digital Equipment Corp. PDP-11
PDP11 = 65, PDP11 = 65,
/// Siemens FX66 microcontroller /// Siemens FX66 microcontroller
FX66 = 66, FX66 = 66,
/// STMicroelectronics ST9+ 8/16 bit microcontroller /// STMicroelectronics ST9+ 8/16 bit microcontroller
ST9PLUS = 67, ST9PLUS = 67,
/// STMicroelectronics ST7 8-bit microcontroller /// STMicroelectronics ST7 8-bit microcontroller
ST7 = 68, ST7 = 68,
/// Motorola MC68HC16 Microcontroller /// Motorola MC68HC16 Microcontroller
@"68HC16" = 69, @"68HC16" = 69,
/// Motorola MC68HC11 Microcontroller /// Motorola MC68HC11 Microcontroller
@"68HC11" = 70, @"68HC11" = 70,
/// Motorola MC68HC08 Microcontroller /// Motorola MC68HC08 Microcontroller
@"68HC08" = 71, @"68HC08" = 71,
/// Motorola MC68HC05 Microcontroller /// Motorola MC68HC05 Microcontroller
@"68HC05" = 72, @"68HC05" = 72,
/// Silicon Graphics SVx /// Silicon Graphics SVx
SVX = 73, SVX = 73,
/// STMicroelectronics ST19 8-bit cpu
/// STMicroelectronics ST19 8-bit microcontroller
ST19 = 74, ST19 = 74,
/// Digital VAX /// Digital VAX
VAX = 75, VAX = 75,
/// Axis Communications 32-bit embedded processor /// Axis Communications 32-bit embedded processor
CRIS = 76, CRIS = 76,
/// Infineon Technologies 32-bit embedded cpu
/// Infineon Technologies 32-bit embedded processor
JAVELIN = 77, JAVELIN = 77,
/// Element 14 64-bit DSP processor
/// Element 14 64-bit DSP Processor
FIREPATH = 78, FIREPATH = 78,
/// LSI Logic's 16-bit DSP processor
/// LSI Logic 16-bit DSP Processor
ZSP = 79, ZSP = 79,
/// Donald Knuth's educational 64-bit processor /// Donald Knuth's educational 64-bit processor
MMIX = 80, MMIX = 80,
/// Harvard's machine-independent format
/// Harvard University machine-independent object files
HUANY = 81, HUANY = 81,
/// SiTera Prism /// SiTera Prism
PRISM = 82, PRISM = 82,
/// Atmel AVR 8-bit microcontroller /// Atmel AVR 8-bit microcontroller
AVR = 83, AVR = 83,
/// Fujitsu FR30 /// Fujitsu FR30
FR30 = 84, FR30 = 84,
/// Mitsubishi D10V /// Mitsubishi D10V
D10V = 85, D10V = 85,
/// Mitsubishi D30V /// Mitsubishi D30V
D30V = 86, D30V = 86,
/// Renesas V850 (formerly NEC V850)
/// NEC v850
V850 = 87, V850 = 87,
/// Renesas M32R (formerly Mitsubishi M32R)
/// Mitsubishi M32R
M32R = 88, M32R = 88,
/// Matsushita MN10300 /// Matsushita MN10300
MN10300 = 89, MN10300 = 89,
/// Matsushita MN10200 /// Matsushita MN10200
MN10200 = 90, MN10200 = 90,
/// picoJava /// picoJava
PJ = 91, PJ = 91,
/// OpenRISC 1000 32-bit embedded processor
/// OpenRISC 32-bit embedded processor OR1K = 92,
OPENRISC = 92, /// ARC International ARCompact processor
/// ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
ARC_COMPACT = 93, ARC_COMPACT = 93,
/// Tensilica Xtensa Architecture /// Tensilica Xtensa Architecture
XTENSA = 94, XTENSA = 94,
/// Alphamosaic VideoCore processor (also old Sunplus S+core7 backend magic number)
/// Alphamosaic VideoCore processor
VIDEOCORE = 95, VIDEOCORE = 95,
/// Thompson Multimedia General Purpose Processor /// Thompson Multimedia General Purpose Processor
TMM_GPP = 96, TMM_GPP = 96,
/// National Semiconductor 32000 series /// National Semiconductor 32000 series
NS32K = 97, NS32K = 97,
/// Tenor Network TPC processor /// Tenor Network TPC processor
TPC = 98, TPC = 98,
/// Trebia SNP 1000 processor (also old value for picoJava; deprecated)
/// Trebia SNP 1000 processor
SNP1K = 99, SNP1K = 99,
/// STMicroelectronics ST200 microcontroller
/// STMicroelectronics (www.st.com) ST200
ST200 = 100, ST200 = 100,
/// Ubicom IP2022 micro controller
/// Ubicom IP2xxx microcontroller family
IP2K = 101, IP2K = 101,
/// MAX Processor /// MAX Processor
MAX = 102, MAX = 102,
/// National Semiconductor CompactRISC
/// National Semiconductor CompactRISC microprocessor
CR = 103, CR = 103,
/// Fujitsu F2MC16 /// Fujitsu F2MC16
F2MC16 = 104, F2MC16 = 104,
/// TI msp430 micro controller
/// Texas Instruments embedded microcontroller msp430
MSP430 = 105, MSP430 = 105,
/// ADI Blackfin
/// Analog Devices Blackfin (DSP) processor
BLACKFIN = 106, BLACKFIN = 106,
/// S1C33 Family of Seiko Epson processors /// S1C33 Family of Seiko Epson processors
SE_C33 = 107, SE_C33 = 107,
/// Sharp embedded microprocessor /// Sharp embedded microprocessor
SEP = 108, SEP = 108,
/// Arca RISC Microprocessor /// Arca RISC Microprocessor
ARCA = 109, ARCA = 109,
/// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University /// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
UNICORE = 110, UNICORE = 110,
/// eXcess: 16/32/64-bit configurable embedded CPU /// eXcess: 16/32/64-bit configurable embedded CPU
EXCESS = 111, EXCESS = 111,
/// Icera Semiconductor Inc. Deep Execution Processor /// Icera Semiconductor Inc. Deep Execution Processor
DXP = 112, DXP = 112,
/// Altera Nios II soft-core processor /// Altera Nios II soft-core processor
ALTERA_NIOS2 = 113, ALTERA_NIOS2 = 113,
/// National Semiconductor CRX
/// National Semiconductor CompactRISC CRX
CRX = 114, CRX = 114,
/// Motorola XGATE embedded processor (also old value for National Semiconductor CompactRISC; deprecated)
/// Motorola XGATE embedded processor
XGATE = 115, XGATE = 115,
/// Infineon C16x/XC16x processor /// Infineon C16x/XC16x processor
C166 = 116, C166 = 116,
/// Renesas M16C series microprocessors /// Renesas M16C series microprocessors
M16C = 117, M16C = 117,
/// Microchip Technology dsPIC30F Digital Signal Controller /// Microchip Technology dsPIC30F Digital Signal Controller
DSPIC30F = 118, DSPIC30F = 118,
/// Freescale Communication Engine RISC core /// Freescale Communication Engine RISC core
CE = 119, CE = 119,
/// Renesas M32C series microprocessors /// Renesas M32C series microprocessors
M32C = 120, M32C = 120,
/// Altium TSK3000 core /// Altium TSK3000 core
TSK3000 = 131, TSK3000 = 131,
/// Freescale RS08 embedded processor /// Freescale RS08 embedded processor
RS08 = 132, RS08 = 132,
/// Analog Devices SHARC family of 32-bit DSP processors /// Analog Devices SHARC family of 32-bit DSP processors
SHARC = 133, SHARC = 133,
/// Cyan Technology eCOG2 microprocessor /// Cyan Technology eCOG2 microprocessor
ECOG2 = 134, ECOG2 = 134,
/// Sunplus S+core (and S+core7) RISC processor
/// Sunplus S+core7 RISC processor SCORE = 135,
SCORE7 = 135,
/// New Japan Radio (NJR) 24-bit DSP Processor /// New Japan Radio (NJR) 24-bit DSP Processor
DSP24 = 136, DSP24 = 136,
/// Broadcom VideoCore III processor /// Broadcom VideoCore III processor
VIDEOCORE3 = 137, VIDEOCORE3 = 137,
/// RISC processor for Lattice FPGA architecture /// RISC processor for Lattice FPGA architecture
LATTICEMICO32 = 138, LATTICEMICO32 = 138,
/// Seiko Epson C17 family /// Seiko Epson C17 family
SE_C17 = 139, SE_C17 = 139,
/// Texas Instruments TMS320C6000 DSP family
/// The Texas Instruments TMS320C6000 DSP family
TI_C6000 = 140, TI_C6000 = 140,
/// Texas Instruments TMS320C2000 DSP family
/// The Texas Instruments TMS320C2000 DSP family
TI_C2000 = 141, TI_C2000 = 141,
/// Texas Instruments TMS320C55x DSP family
/// The Texas Instruments TMS320C55x DSP family
TI_C5500 = 142, TI_C5500 = 142,
/// Texas Instruments Programmable Realtime Unit
TI_PRU = 144,
/// STMicroelectronics 64bit VLIW Data Signal Processor /// STMicroelectronics 64bit VLIW Data Signal Processor
MMDSP_PLUS = 160, MMDSP_PLUS = 160,
/// Cypress M8C microprocessor /// Cypress M8C microprocessor
CYPRESS_M8C = 161, CYPRESS_M8C = 161,
/// Renesas R32C series microprocessors /// Renesas R32C series microprocessors
R32C = 162, R32C = 162,
/// NXP Semiconductors TriMedia architecture family /// NXP Semiconductors TriMedia architecture family
TRIMEDIA = 163, TRIMEDIA = 163,
/// QUALCOMM DSP6 Processor
/// Qualcomm Hexagon processor QDSP6 = 164,
HEXAGON = 164,
/// Intel 8051 and variants /// Intel 8051 and variants
@"8051" = 165, @"8051" = 165,
/// STMicroelectronics STxP7x family
/// STMicroelectronics STxP7x family of configurable and extensible RISC processors
STXP7X = 166, STXP7X = 166,
/// Andes Technology compact code size embedded RISC processor family /// Andes Technology compact code size embedded RISC processor family
NDS32 = 167, NDS32 = 167,
/// Cyan Technology eCOG1X family /// Cyan Technology eCOG1X family
ECOG1X = 168, ECOG1X = 168,
/// Dallas Semiconductor MAXQ30 Core Micro-controllers /// Dallas Semiconductor MAXQ30 Core Micro-controllers
MAXQ30 = 169, MAXQ30 = 169,
/// New Japan Radio (NJR) 16-bit DSP Processor /// New Japan Radio (NJR) 16-bit DSP Processor
XIMO16 = 170, XIMO16 = 170,
/// M2000 Reconfigurable RISC Microprocessor /// M2000 Reconfigurable RISC Microprocessor
MANIK = 171, MANIK = 171,
/// Cray Inc. NV2 vector architecture /// Cray Inc. NV2 vector architecture
CRAYNV2 = 172, CRAYNV2 = 172,
/// Renesas RX family /// Renesas RX family
RX = 173, RX = 173,
/// Imagination Technologies Meta processor architecture
/// Imagination Technologies META processor architecture
METAG = 174, METAG = 174,
/// MCST Elbrus general purpose hardware architecture /// MCST Elbrus general purpose hardware architecture
MCST_ELBRUS = 175, MCST_ELBRUS = 175,
/// Cyan Technology eCOG16 family /// Cyan Technology eCOG16 family
ECOG16 = 176, ECOG16 = 176,
/// National Semiconductor CompactRISC 16-bit processor
/// National Semiconductor CompactRISC CR16 16-bit microprocessor
CR16 = 177, CR16 = 177,
/// Freescale Extended Time Processing Unit /// Freescale Extended Time Processing Unit
ETPU = 178, ETPU = 178,
/// Infineon Technologies SLE9X core /// Infineon Technologies SLE9X core
SLE9X = 179, SLE9X = 179,
/// Intel L10M /// Intel L10M
L10M = 180, L10M = 180,
/// Intel K10M /// Intel K10M
K10M = 181, K10M = 181,
/// ARM 64-bit architecture
/// ARM AArch64
AARCH64 = 183, AARCH64 = 183,
/// Atmel Corporation 32-bit microprocessor family /// Atmel Corporation 32-bit microprocessor family
AVR32 = 185, AVR32 = 185,
/// STMicroeletronics STM8 8-bit microcontroller /// STMicroeletronics STM8 8-bit microcontroller
STM8 = 186, STM8 = 186,
/// Tilera TILE64 multicore architecture family /// Tilera TILE64 multicore architecture family
TILE64 = 187, TILE64 = 187,
/// Tilera TILEPro multicore architecture family /// Tilera TILEPro multicore architecture family
TILEPRO = 188, TILEPRO = 188,
/// Xilinx MicroBlaze 32-bit RISC soft processor core
/// Xilinx MicroBlaze
MICROBLAZE = 189, MICROBLAZE = 189,
/// NVIDIA CUDA architecture /// NVIDIA CUDA architecture
CUDA = 190, CUDA = 190,
/// Tilera TILE-Gx multicore architecture family /// Tilera TILE-Gx multicore architecture family
TILEGX = 191, TILEGX = 191,
/// CloudShield architecture family /// CloudShield architecture family
CLOUDSHIELD = 192, CLOUDSHIELD = 192,
/// KIPO-KAIST Core-A 1st generation processor family /// KIPO-KAIST Core-A 1st generation processor family
COREA_1ST = 193, COREA_1ST = 193,
/// KIPO-KAIST Core-A 2nd generation processor family /// KIPO-KAIST Core-A 2nd generation processor family
COREA_2ND = 194, COREA_2ND = 194,
/// Synopsys ARCompact V2 /// Synopsys ARCompact V2
ARC_COMPACT2 = 195, ARC_COMPACT2 = 195,
/// Open8 8-bit RISC soft processor core /// Open8 8-bit RISC soft processor core
OPEN8 = 196, OPEN8 = 196,
/// Renesas RL78 family /// Renesas RL78 family
RL78 = 197, RL78 = 197,
/// Broadcom VideoCore V processor /// Broadcom VideoCore V processor
VIDEOCORE5 = 198, VIDEOCORE5 = 198,
/// Renesas 78K0R
/// Renesas 78KOR family @"78K0R" = 199,
@"78KOR" = 199,
/// Freescale 56800EX Digital Signal Controller (DSC) /// Freescale 56800EX Digital Signal Controller (DSC)
@"56800EX" = 200, @"56800EX" = 200,
/// Beyond BA1 CPU architecture /// Beyond BA1 CPU architecture
BA1 = 201, BA1 = 201,
/// Beyond BA2 CPU architecture /// Beyond BA2 CPU architecture
BA2 = 202, BA2 = 202,
/// XMOS xCORE processor family /// XMOS xCORE processor family
XCORE = 203, XCORE = 203,
/// Microchip 8-bit PIC(r) family /// Microchip 8-bit PIC(r) family
MCHP_PIC = 204, MCHP_PIC = 204,
/// Intel Graphics Technology
/// Reserved by Intel INTELGT = 205,
INTEL205 = 205,
/// Reserved by Intel
INTEL206 = 206,
/// Reserved by Intel
INTEL207 = 207,
/// Reserved by Intel
INTEL208 = 208,
/// Reserved by Intel
INTEL209 = 209,
/// KM211 KM32 32-bit processor /// KM211 KM32 32-bit processor
KM32 = 210, KM32 = 210,
/// KM211 KMX32 32-bit processor /// KM211 KMX32 32-bit processor
KMX32 = 211, KMX32 = 211,
/// KM211 KMX16 16-bit processor /// KM211 KMX16 16-bit processor
KMX16 = 212, KMX16 = 212,
/// KM211 KMX8 8-bit processor /// KM211 KMX8 8-bit processor
KMX8 = 213, KMX8 = 213,
/// KM211 KVARC processor /// KM211 KVARC processor
KVARC = 214, KVARC = 214,
/// Paneve CDP architecture family /// Paneve CDP architecture family
CDP = 215, CDP = 215,
/// Cognitive Smart Memory Processor /// Cognitive Smart Memory Processor
COGE = 216, COGE = 216,
/// Bluechip Systems CoolEngine
/// iCelero CoolEngine
COOL = 217, COOL = 217,
/// Nanoradio Optimized RISC /// Nanoradio Optimized RISC
NORC = 218, NORC = 218,
/// CSR Kalimba architecture family /// CSR Kalimba architecture family
CSR_KALIMBA = 219, CSR_KALIMBA = 219,
/// Zilog Z80
Z80 = 220,
/// Controls and Data Services VISIUMcore processor
VISIUM = 221,
/// FTDI Chip FT32 high performance 32-bit RISC architecture
FT32 = 222,
/// Moxie processor family
MOXIE = 223,
/// AMD GPU architecture /// AMD GPU architecture
AMDGPU = 224, AMDGPU = 224,
/// RISC-V /// RISC-V
RISCV = 243, RISCV = 243,
/// Lanai 32-bit processor /// Lanai 32-bit processor
LANAI = 244, LANAI = 244,
/// CEVA Processor Architecture Family
/// Linux kernel bpf virtual machine CEVA = 245,
/// CEVA X2 Processor Family
CEVA_X2 = 246,
/// Linux BPF - in-kernel virtual machine
BPF = 247, BPF = 247,
/// Graphcore Intelligent Processing Unit
/// C-SKY GRAPHCORE_IPU = 248,
/// Imagination Technologies
IMG1 = 249,
/// Netronome Flow Processor
NFP = 250,
/// NEC Vector Engine
VE = 251,
/// C-SKY processor family
CSKY = 252, CSKY = 252,
/// Synopsys ARCv2.3 64-bit
ARC_COMPACT3_64 = 253,
/// MOS Technology MCS 6502 processor
MCS6502 = 254,
/// Synopsys ARCv2.3 32-bit
ARC_COMPACT3 = 255,
/// Kalray VLIW core of the MPPA processor family
KVX = 256,
/// WDC 65816/65C816
@"65816" = 257,
/// LoongArch /// LoongArch
LOONGARCH = 258, LOONGARCH = 258,
/// ChipON KungFu32
/// Fujitsu FR-V KF32 = 259,
FRV = 0x5441, /// LAPIS nX-U16/U8
U16_U8CORE = 260,
/// Tachyum
TACHYUM = 261,
/// NXP 56800EF Digital Signal Controller (DSC)
@"56800EF" = 262,
/// AVR
AVR_OLD = 0x1057,
/// MSP430
MSP430_OLD = 0x1059,
/// Morpho MT
MT = 0x2530,
/// FR30
CYGNUS_FR30 = 0x3330,
/// WebAssembly (as used by LLVM)
WEBASSEMBLY = 0x4157,
/// Infineon Technologies 16-bit microcontroller with C166-V2 core
XC16X = 0x4688,
/// Freescale S12Z
S12Z = 0x4def,
/// DLX
DLX = 0x5aa5,
/// FRV
CYGNUS_FRV = 0x5441,
/// D10V
CYGNUS_D10V = 0x7650,
/// D30V
CYGNUS_D30V = 0x7676,
/// Ubicom IP2xxx
IP2K_OLD = 0x8217,
/// Cygnus PowerPC ELF
CYGNUS_POWERPC = 0x9025,
/// Alpha
ALPHA = 0x9026,
/// Cygnus M32R ELF
CYGNUS_M32R = 0x9041,
/// V850
CYGNUS_V850 = 0x9080,
/// Old S/390
S390_OLD = 0xa390,
/// Old unofficial value for Xtensa
XTENSA_OLD = 0xabc7,
/// Xstormy16
XSTORMY16 = 0xad45,
/// MN10300
CYGNUS_MN10300 = 0xbeef,
/// MN10200
CYGNUS_MN10200 = 0xdead,
/// Renesas M32C and M16C
M32C_OLD = 0xfeb0,
/// Vitesse IQ2000
IQ2000 = 0xfeba,
/// NIOS
NIOS32 = 0xfebb,
/// Toshiba MeP
CYGNUS_MEP = 0xf00d,
/// Old unofficial value for Moxie
MOXIE_OLD = 0xfeed,
/// Old MicroBlaze
MICROBLAZE_OLD = 0xbaab,
/// Adapteva's Epiphany architecture
ADAPTEVA_EPIPHANY = 0x1223,
_, _,
}; };