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Document register functions
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@ -9,6 +9,7 @@ pub const Register = enum(u8) {
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// 16-23, 8-bit registers. id is int value - 16.
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al, bl, cl, dl, ah, ch, dh, bh,
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/// Returns the bit-width of the register.
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pub fn size(self: @This()) u7 {
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return switch (@enumToInt(self)) {
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0...7 => 32,
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@ -18,6 +19,9 @@ pub const Register = enum(u8) {
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};
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}
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/// Returns the register's id. This is used in practically every opcode the
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/// x86 has. It is embedded in some instructions, such as the `B8 +rd` move
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/// instruction, and is used in the R/M byte.
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pub fn id(self: @This()) u3 {
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return @truncate(u3, @enumToInt(self));
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}
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@ -20,6 +20,7 @@ pub const Register = enum(u8) {
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al, bl, cl, dl, ah, ch, dh, bh,
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r8b, r9b, r10b, r11b, r12b, r13b, r14b, r15b,
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/// Returns the bit-width of the register.
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pub fn size(self: @This()) u7 {
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return switch (@enumToInt(self)) {
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0...15 => 64,
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@ -30,10 +31,20 @@ pub const Register = enum(u8) {
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};
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}
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/// Returns whether the register is *extended*. Extended registers are the
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/// new registers added with amd64, r8 through r15. This also includes any
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/// other variant of access to those registers, such as r8b, r15d, and so
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/// on. This is needed because access to these registers requires special
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/// handling via the REX prefix, via the B or R bits, depending on context.
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pub fn isExtended(self: @This()) bool {
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return @enumToInt(self) & 0x08 != 0;
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}
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/// This returns the 4-bit register ID, which is used in practically every
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/// opcode. Note that bit 3 (the highest bit) is *never* used directly in
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/// an instruction (@see isExtended), and requires special handling. The
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/// lower three bits are often embedded directly in instructions (such as
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/// the B8 variant of moves), or used in R/M bytes.
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pub fn id(self: @This()) u4 {
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return @truncate(u4, @enumToInt(self));
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}
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