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libc: update Linux headers to 6.17

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This commit is contained in:
Alex Rønne Petersen 2025-09-29 10:11:01 +02:00
parent f624191f9a
commit df1909900c
240 changed files with 9857 additions and 2245 deletions
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17
lib/libc/include/aarch64-linux-any/asm/hwcap.h vendored
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@ -56,6 +56,21 @@
#define HWCAP_PACA (1 << 30)
#define HWCAP_PACG (1UL << 31)
#define HWCAP_GCS (1UL << 32)
#define HWCAP_CMPBR (1UL << 33)
#define HWCAP_FPRCVT (1UL << 34)
#define HWCAP_F8MM8 (1UL << 35)
#define HWCAP_F8MM4 (1UL << 36)
#define HWCAP_SVE_F16MM (1UL << 37)
#define HWCAP_SVE_ELTPERM (1UL << 38)
#define HWCAP_SVE_AES2 (1UL << 39)
#define HWCAP_SVE_BFSCALE (1UL << 40)
#define HWCAP_SVE2P2 (1UL << 41)
#define HWCAP_SME2P2 (1UL << 42)
#define HWCAP_SME_SBITPERM (1UL << 43)
#define HWCAP_SME_AES (1UL << 44)
#define HWCAP_SME_SFEXPA (1UL << 45)
#define HWCAP_SME_STMOP (1UL << 46)
#define HWCAP_SME_SMOP4 (1UL << 47)
/*
* HWCAP2 flags - for AT_HWCAP2
@ -128,5 +143,7 @@
/*
* HWCAP3 flags - for AT_HWCAP3
*/
#define HWCAP3_MTE_FAR (1UL << 0)
#define HWCAP3_MTE_STORE_ONLY (1UL << 1)
#endif /* __ASM_HWCAP_H */

23
lib/libc/include/aarch64-linux-any/asm/kvm.h vendored
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@ -43,9 +43,6 @@
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_DIRTY_LOG_PAGE_OFFSET 64
#define KVM_REG_SIZE(id) \
(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
struct kvm_regs {
struct user_pt_regs regs; /* sp = sp_el0 */
@ -108,6 +105,7 @@ struct kvm_regs {
#define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */
#define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */
#define KVM_ARM_VCPU_HAS_EL2 7 /* Support nested virtualization */
#define KVM_ARM_VCPU_HAS_EL2_E2H0 8 /* Limit NV support to E2H RES0 */
struct kvm_vcpu_init {
__u32 target;
@ -368,6 +366,7 @@ enum {
KVM_REG_ARM_STD_HYP_BIT_PV_TIME = 0,
};
/* Vendor hyper call function numbers 0-63 */
#define KVM_REG_ARM_VENDOR_HYP_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(2)
enum {
@ -375,6 +374,14 @@ enum {
KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1,
};
/* Vendor hyper call function numbers 64-127 */
#define KVM_REG_ARM_VENDOR_HYP_BMAP_2 KVM_REG_ARM_FW_FEAT_BMAP_REG(3)
enum {
KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_VER = 0,
KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_CPUS = 1,
};
/* Device Control API on vm fd */
#define KVM_ARM_VM_SMCCC_CTRL 0
#define KVM_ARM_VM_SMCCC_FILTER 0
@ -397,6 +404,7 @@ enum {
#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8
#define KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ 9
#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
(0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
@ -411,10 +419,11 @@ enum {
/* Device Control API on vcpu fd */
#define KVM_ARM_VCPU_PMU_V3_CTRL 0
#define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_PMU_V3_SET_PMU 3
#define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_PMU_V3_SET_PMU 3
#define KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS 4
#define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1

3
lib/libc/include/aarch64-linux-any/asm/unistd_64.h vendored
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@ -323,6 +323,9 @@
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#define __NR_open_tree_attr 467
#define __NR_file_getattr 468
#define __NR_file_setattr 469
#endif /* _ASM_UNISTD_64_H */

1
lib/libc/include/any-linux-any/asm-generic/fcntl.h vendored
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@ -6,7 +6,6 @@
/*
* FMODE_EXEC is 0x20
* FMODE_NONOTIFY is 0x4000000
* These cannot be used by userspace O_* until internal and external open
* flags are split.
* -Eric Paris

1
lib/libc/include/any-linux-any/asm-generic/mman-common.h vendored
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@ -85,6 +85,7 @@
/* compatibility flags */
#define MAP_FILE 0
#define PKEY_UNRESTRICTED 0x0
#define PKEY_DISABLE_ACCESS 0x1
#define PKEY_DISABLE_WRITE 0x2
#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\

6
lib/libc/include/any-linux-any/asm-generic/param.h vendored
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@ -2,8 +2,12 @@
#ifndef __ASM_GENERIC_PARAM_H
#define __ASM_GENERIC_PARAM_H
#ifndef __USER_HZ
#define __USER_HZ 100
#endif
#ifndef HZ
#define HZ 100
#define HZ __USER_HZ
#endif
#ifndef EXEC_PAGESIZE

7
lib/libc/include/any-linux-any/asm-generic/socket.h vendored
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@ -143,6 +143,13 @@
#define SCM_TS_OPT_ID 81
#define SO_RCVPRIORITY 82
#define SO_PASSRIGHTS 83
#define SO_INQ 84
#define SCM_INQ SO_INQ
#if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
/* on 64-bit and x32, avoid the ?: operator */

10
lib/libc/include/any-linux-any/asm-generic/unistd.h vendored
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@ -849,9 +849,17 @@ __SYSCALL(__NR_getxattrat, sys_getxattrat)
__SYSCALL(__NR_listxattrat, sys_listxattrat)
#define __NR_removexattrat 466
__SYSCALL(__NR_removexattrat, sys_removexattrat)
#define __NR_open_tree_attr 467
__SYSCALL(__NR_open_tree_attr, sys_open_tree_attr)
/* fs/inode.c */
#define __NR_file_getattr 468
__SYSCALL(__NR_file_getattr, sys_file_getattr)
#define __NR_file_setattr 469
__SYSCALL(__NR_file_setattr, sys_file_setattr)
#undef __NR_syscalls
#define __NR_syscalls 467
#define __NR_syscalls 470
/*
* 32 bit systems traditionally used different

168
lib/libc/include/any-linux-any/cxl/features.h vendored Normal file
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@ -0,0 +1,168 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (c) 2024,2025, Intel Corporation
*
* These are definitions for the mailbox command interface of CXL subsystem.
*/
#ifndef _CXL_FEATURES_H_
#define _CXL_FEATURES_H_
#include <linux/types.h>
typedef unsigned char __uapi_uuid_t[16];
/*
* struct cxl_mbox_get_sup_feats_in - Get Supported Features input
*
* @count: bytes of Feature data to return in output
* @start_idx: index of first requested Supported Feature Entry, 0 based.
* @reserved: reserved field, must be 0s.
*
* Get Supported Features (0x500h) CXL r3.2 8.2.9.6.1 command.
* Input block for Get support Feature
*/
struct cxl_mbox_get_sup_feats_in {
__le32 count;
__le16 start_idx;
__u8 reserved[2];
} __attribute__ ((__packed__));
/* CXL spec r3.2 Table 8-87 command effects */
#define CXL_CMD_CONFIG_CHANGE_COLD_RESET BIT(0)
#define CXL_CMD_CONFIG_CHANGE_IMMEDIATE BIT(1)
#define CXL_CMD_DATA_CHANGE_IMMEDIATE BIT(2)
#define CXL_CMD_POLICY_CHANGE_IMMEDIATE BIT(3)
#define CXL_CMD_LOG_CHANGE_IMMEDIATE BIT(4)
#define CXL_CMD_SECURITY_STATE_CHANGE BIT(5)
#define CXL_CMD_BACKGROUND BIT(6)
#define CXL_CMD_BGCMD_ABORT_SUPPORTED BIT(7)
#define CXL_CMD_EFFECTS_VALID BIT(9)
#define CXL_CMD_CONFIG_CHANGE_CONV_RESET BIT(10)
#define CXL_CMD_CONFIG_CHANGE_CXL_RESET BIT(11)
#define CXL_CMD_EFFECTS_RESERVED GENMASK(15, 12)
/*
* struct cxl_feat_entry - Supported Feature Entry
* @uuid: UUID of the Feature
* @id: id to identify the feature. 0 based
* @get_feat_size: max bytes required for Get Feature command for this Feature
* @set_feat_size: max bytes required for Set Feature command for this Feature
* @flags: attribute flags
* @get_feat_ver: Get Feature version
* @set_feat_ver: Set Feature version
* @effects: Set Feature command effects
* @reserved: reserved, must be 0
*
* CXL spec r3.2 Table 8-109
* Get Supported Features Supported Feature Entry
*/
struct cxl_feat_entry {
__uapi_uuid_t uuid;
__le16 id;
__le16 get_feat_size;
__le16 set_feat_size;
__le32 flags;
__u8 get_feat_ver;
__u8 set_feat_ver;
__le16 effects;
__u8 reserved[18];
} __attribute__ ((__packed__));
/* @flags field for 'struct cxl_feat_entry' */
#define CXL_FEATURE_F_CHANGEABLE BIT(0)
#define CXL_FEATURE_F_PERSIST_FW_UPDATE BIT(4)
#define CXL_FEATURE_F_DEFAULT_SEL BIT(5)
#define CXL_FEATURE_F_SAVED_SEL BIT(6)
/*
* struct cxl_mbox_get_sup_feats_out - Get Supported Features output
* @num_entries: number of Supported Feature Entries returned
* @supported_feats: number of supported Features
* @reserved: reserved, must be 0s.
* @ents: Supported Feature Entries array
*
* CXL spec r3.2 Table 8-108
* Get supported Features Output Payload
*/
struct cxl_mbox_get_sup_feats_out {
__struct_group(cxl_mbox_get_sup_feats_out_hdr, hdr, /* no attrs */,
__le16 num_entries;
__le16 supported_feats;
__u8 reserved[4];
);
struct cxl_feat_entry ents[] __counted_by_le(num_entries);
} __attribute__ ((__packed__));
/*
* Get Feature CXL spec r3.2 Spec 8.2.9.6.2
*/
/*
* struct cxl_mbox_get_feat_in - Get Feature input
* @uuid: UUID for Feature
* @offset: offset of the first byte in Feature data for output payload
* @count: count in bytes of Feature data returned
* @selection: 0 current value, 1 default value, 2 saved value
*
* CXL spec r3.2 section 8.2.9.6.2 Table 8-99
*/
struct cxl_mbox_get_feat_in {
__uapi_uuid_t uuid;
__le16 offset;
__le16 count;
__u8 selection;
} __attribute__ ((__packed__));
/*
* enum cxl_get_feat_selection - selection field of Get Feature input
*/
enum cxl_get_feat_selection {
CXL_GET_FEAT_SEL_CURRENT_VALUE,
CXL_GET_FEAT_SEL_DEFAULT_VALUE,
CXL_GET_FEAT_SEL_SAVED_VALUE,
CXL_GET_FEAT_SEL_MAX
};
/*
* Set Feature CXL spec r3.2 8.2.9.6.3
*/
/*
* struct cxl_mbox_set_feat_in - Set Features input
* @uuid: UUID for Feature
* @flags: set feature flags
* @offset: byte offset of Feature data to update
* @version: Feature version of the data in Feature Data
* @rsvd: reserved, must be 0s.
* @feat_data: raw byte stream of Features data to update
*
* CXL spec r3.2 section 8.2.9.6.3 Table 8-101
*/
struct cxl_mbox_set_feat_in {
__struct_group(cxl_mbox_set_feat_hdr, hdr, /* no attrs */,
__uapi_uuid_t uuid;
__le32 flags;
__le16 offset;
__u8 version;
__u8 rsvd[9];
);
__u8 feat_data[];
} __attribute__((packed));
/*
* enum cxl_set_feat_flag_data_transfer - Set Feature flags field
*/
enum cxl_set_feat_flag_data_transfer {
CXL_SET_FEAT_FLAG_FULL_DATA_TRANSFER = 0,
CXL_SET_FEAT_FLAG_INITIATE_DATA_TRANSFER,
CXL_SET_FEAT_FLAG_CONTINUE_DATA_TRANSFER,
CXL_SET_FEAT_FLAG_FINISH_DATA_TRANSFER,
CXL_SET_FEAT_FLAG_ABORT_DATA_TRANSFER,
CXL_SET_FEAT_FLAG_DATA_TRANSFER_MAX
};
#define CXL_SET_FEAT_FLAG_DATA_TRANSFER_MASK GENMASK(2, 0)
#define CXL_SET_FEAT_FLAG_DATA_SAVED_ACROSS_RESET BIT(3)
#endif

329
lib/libc/include/any-linux-any/drm/amdgpu_drm.h vendored
View File

@ -54,6 +54,9 @@ extern "C" {
#define DRM_AMDGPU_VM 0x13
#define DRM_AMDGPU_FENCE_TO_HANDLE 0x14
#define DRM_AMDGPU_SCHED 0x15
#define DRM_AMDGPU_USERQ 0x16
#define DRM_AMDGPU_USERQ_SIGNAL 0x17
#define DRM_AMDGPU_USERQ_WAIT 0x18
#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@ -71,6 +74,9 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
#define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
#define DRM_IOCTL_AMDGPU_USERQ DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ, union drm_amdgpu_userq)
#define DRM_IOCTL_AMDGPU_USERQ_SIGNAL DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal)
#define DRM_IOCTL_AMDGPU_USERQ_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait)
/**
* DOC: memory domains
@ -319,6 +325,260 @@ union drm_amdgpu_ctx {
union drm_amdgpu_ctx_out out;
};
/* user queue IOCTL operations */
#define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
/* queue priority levels */
/* low < normal low < normal high < high */
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
/* for queues that need access to protected content */
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
* For operation AMDGPU_USERQ_OP_CREATE: user is expected
* to set all fields, excep the parameter 'queue_id'.
* For operation AMDGPU_USERQ_OP_FREE: the only input parameter expected
* to be set is 'queue_id', eveything else is ignored.
*/
struct drm_amdgpu_userq_in {
/** AMDGPU_USERQ_OP_* */
__u32 op;
/** Queue id passed for operation USERQ_OP_FREE */
__u32 queue_id;
/** the target GPU engine to execute workload (AMDGPU_HW_IP_*) */
__u32 ip_type;
/**
* @doorbell_handle: the handle of doorbell GEM object
* associated with this userqueue client.
*/
__u32 doorbell_handle;
/**
* @doorbell_offset: 32-bit offset of the doorbell in the doorbell bo.
* Kernel will generate absolute doorbell offset using doorbell_handle
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
/**
* @flags: flags used for queue parameters
*/
__u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.
*/
__u64 queue_va;
/**
* @queue_size: Size of the queue in bytes, this needs to be 256-byte
* aligned.
*/
__u64 queue_size;
/**
* @rptr_va : Virtual address of the GPU memory which holds the ring RPTR.
* This object must be at least 8 byte in size and aligned to 8-byte offset.
*/
__u64 rptr_va;
/**
* @wptr_va : Virtual address of the GPU memory which holds the ring WPTR.
* This object must be at least 8 byte in size and aligned to 8-byte offset.
*
* Queue, RPTR and WPTR can come from the same object, as long as the size
* and alignment related requirements are met.
*/
__u64 wptr_va;
/**
* @mqd: MQD (memory queue descriptor) is a set of parameters which allow
* the GPU to uniquely define and identify a usermode queue.
*
* MQD data can be of different size for different GPU IP/engine and
* their respective versions/revisions, so this points to a __u64 *
* which holds IP specific MQD of this usermode queue.
*/
__u64 mqd;
/**
* @size: size of MQD data in bytes, it must match the MQD structure
* size of the respective engine/revision defined in UAPI for ex, for
* gfx11 workloads, size = sizeof(drm_amdgpu_userq_mqd_gfx11).
*/
__u64 mqd_size;
};
/* The structure to carry output of userqueue ops */
struct drm_amdgpu_userq_out {
/**
* For operation AMDGPU_USERQ_OP_CREATE: This field contains a unique
* queue ID to represent the newly created userqueue in the system, otherwise
* it should be ignored.
*/
__u32 queue_id;
__u32 _pad;
};
union drm_amdgpu_userq {
struct drm_amdgpu_userq_in in;
struct drm_amdgpu_userq_out out;
};
/* GFX V11 IP specific MQD parameters */
struct drm_amdgpu_userq_mqd_gfx11 {
/**
* @shadow_va: Virtual address of the GPU memory to hold the shadow buffer.
* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
*/
__u64 shadow_va;
/**
* @csa_va: Virtual address of the GPU memory to hold the CSA buffer.
* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
*/
__u64 csa_va;
};
/* GFX V11 SDMA IP specific MQD parameters */
struct drm_amdgpu_userq_mqd_sdma_gfx11 {
/**
* @csa_va: Virtual address of the GPU memory to hold the CSA buffer.
* This must be a from a separate GPU object, and use AMDGPU_INFO IOCTL
* to get the size.
*/
__u64 csa_va;
};
/* GFX V11 Compute IP specific MQD parameters */
struct drm_amdgpu_userq_mqd_compute_gfx11 {
/**
* @eop_va: Virtual address of the GPU memory to hold the EOP buffer.
* This must be a from a separate GPU object, and use AMDGPU_INFO IOCTL
* to get the size.
*/
__u64 eop_va;
};
/* userq signal/wait ioctl */
struct drm_amdgpu_userq_signal {
/**
* @queue_id: Queue handle used by the userq fence creation function
* to retrieve the WPTR.
*/
__u32 queue_id;
__u32 pad;
/**
* @syncobj_handles: The list of syncobj handles submitted by the user queue
* job to be signaled.
*/
__u64 syncobj_handles;
/**
* @num_syncobj_handles: A count that represents the number of syncobj handles in
* @syncobj_handles.
*/
__u64 num_syncobj_handles;
/**
* @bo_read_handles: The list of BO handles that the submitted user queue job
* is using for read only. This will update BO fences in the kernel.
*/
__u64 bo_read_handles;
/**
* @bo_write_handles: The list of BO handles that the submitted user queue job
* is using for write only. This will update BO fences in the kernel.
*/
__u64 bo_write_handles;
/**
* @num_bo_read_handles: A count that represents the number of read BO handles in
* @bo_read_handles.
*/
__u32 num_bo_read_handles;
/**
* @num_bo_write_handles: A count that represents the number of write BO handles in
* @bo_write_handles.
*/
__u32 num_bo_write_handles;
};
struct drm_amdgpu_userq_fence_info {
/**
* @va: A gpu address allocated for each queue which stores the
* read pointer (RPTR) value.
*/
__u64 va;
/**
* @value: A 64 bit value represents the write pointer (WPTR) of the
* queue commands which compared with the RPTR value to signal the
* fences.
*/
__u64 value;
};
struct drm_amdgpu_userq_wait {
/**
* @waitq_id: Queue handle used by the userq wait IOCTL to retrieve the
* wait queue and maintain the fence driver references in it.
*/
__u32 waitq_id;
__u32 pad;
/**
* @syncobj_handles: The list of syncobj handles submitted by the user queue
* job to get the va/value pairs.
*/
__u64 syncobj_handles;
/**
* @syncobj_timeline_handles: The list of timeline syncobj handles submitted by
* the user queue job to get the va/value pairs at given @syncobj_timeline_points.
*/
__u64 syncobj_timeline_handles;
/**
* @syncobj_timeline_points: The list of timeline syncobj points submitted by the
* user queue job for the corresponding @syncobj_timeline_handles.
*/
__u64 syncobj_timeline_points;
/**
* @bo_read_handles: The list of read BO handles submitted by the user queue
* job to get the va/value pairs.
*/
__u64 bo_read_handles;
/**
* @bo_write_handles: The list of write BO handles submitted by the user queue
* job to get the va/value pairs.
*/
__u64 bo_write_handles;
/**
* @num_syncobj_timeline_handles: A count that represents the number of timeline
* syncobj handles in @syncobj_timeline_handles.
*/
__u16 num_syncobj_timeline_handles;
/**
* @num_fences: This field can be used both as input and output. As input it defines
* the maximum number of fences that can be returned and as output it will specify
* how many fences were actually returned from the ioctl.
*/
__u16 num_fences;
/**
* @num_syncobj_handles: A count that represents the number of syncobj handles in
* @syncobj_handles.
*/
__u32 num_syncobj_handles;
/**
* @num_bo_read_handles: A count that represents the number of read BO handles in
* @bo_read_handles.
*/
__u32 num_bo_read_handles;
/**
* @num_bo_write_handles: A count that represents the number of write BO handles in
* @bo_write_handles.
*/
__u32 num_bo_write_handles;
/**
* @out_fences: The field is a return value from the ioctl containing the list of
* address/value pairs to wait for.
*/
__u64 out_fences;
};
/* vm ioctl */
#define AMDGPU_VM_OP_RESERVE_VMID 1
#define AMDGPU_VM_OP_UNRESERVE_VMID 2
@ -599,6 +859,19 @@ struct drm_amdgpu_gem_va {
__u64 offset_in_bo;
/** Specify mapping size. Must be correctly aligned. */
__u64 map_size;
/**
* vm_timeline_point is a sequence number used to add new timeline point.
*/
__u64 vm_timeline_point;
/**
* The vm page table update fence is installed in given vm_timeline_syncobj_out
* at vm_timeline_point.
*/
__u32 vm_timeline_syncobj_out;
/** the number of syncobj handles in @input_fence_syncobj_handles */
__u32 num_syncobj_handles;
/** Array of sync object handle to wait for given input fences */
__u64 input_fence_syncobj_handles;
};
#define AMDGPU_HW_IP_GFX 0
@ -763,6 +1036,16 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
#define AMDGPU_IDS_FLAGS_TMZ 0x4
#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
/*
* Query h/w info: Flag identifying VF/PF/PT mode
*
*/
#define AMDGPU_IDS_FLAGS_MODE_MASK 0x300
#define AMDGPU_IDS_FLAGS_MODE_SHIFT 0x8
#define AMDGPU_IDS_FLAGS_MODE_PF 0x0
#define AMDGPU_IDS_FLAGS_MODE_VF 0x1
#define AMDGPU_IDS_FLAGS_MODE_PT 0x2
/* indicate if acceleration can be working */
#define AMDGPU_INFO_ACCEL_WORKING 0x00
/* get the crtc_id from the mode object id? */
@ -930,6 +1213,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
#define AMDGPU_INFO_MAX_IBS 0x22
/* query last page fault info */
#define AMDGPU_INFO_GPUVM_FAULT 0x23
/* query FW object size and alignment */
#define AMDGPU_INFO_UQ_FW_AREAS 0x24
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@ -1083,6 +1368,7 @@ struct drm_amdgpu_info_vbios {
#define AMDGPU_VRAM_TYPE_DDR5 10
#define AMDGPU_VRAM_TYPE_LPDDR4 11
#define AMDGPU_VRAM_TYPE_LPDDR5 12
#define AMDGPU_VRAM_TYPE_HBM3E 13
struct drm_amdgpu_info_device {
/** PCI Device ID */
@ -1188,6 +1474,9 @@ struct drm_amdgpu_info_device {
__u32 csa_size;
/* context save area base virtual alignment for gfx11 */
__u32 csa_alignment;
/* Userq IP mask (1 << AMDGPU_HW_IP_*) */
__u32 userq_ip_mask;
__u32 pad;
};
struct drm_amdgpu_info_hw_ip {
@ -1204,6 +1493,29 @@ struct drm_amdgpu_info_hw_ip {
__u32 available_rings;
/** version info: bits 23:16 major, 15:8 minor, 7:0 revision */
__u32 ip_discovery_version;
/* Userq available slots */
__u32 userq_num_slots;
};
/* GFX metadata BO sizes and alignment info (in bytes) */
struct drm_amdgpu_info_uq_fw_areas_gfx {
/* shadow area size */
__u32 shadow_size;
/* shadow area base virtual mem alignment */
__u32 shadow_alignment;
/* context save area size */
__u32 csa_size;
/* context save area base virtual mem alignment */
__u32 csa_alignment;
};
/* IP specific fw related information used in the
* subquery AMDGPU_INFO_UQ_FW_AREAS
*/
struct drm_amdgpu_info_uq_fw_areas {
union {
struct drm_amdgpu_info_uq_fw_areas_gfx gfx;
};
};
struct drm_amdgpu_info_num_handles {
@ -1269,6 +1581,23 @@ struct drm_amdgpu_info_gpuvm_fault {
__u32 vmhub;
};
struct drm_amdgpu_info_uq_metadata_gfx {
/* shadow area size for gfx11 */
__u32 shadow_size;
/* shadow area base virtual alignment for gfx11 */
__u32 shadow_alignment;
/* context save area size for gfx11 */
__u32 csa_size;
/* context save area base virtual alignment for gfx11 */
__u32 csa_alignment;
};
struct drm_amdgpu_info_uq_metadata {
union {
struct drm_amdgpu_info_uq_metadata_gfx gfx;
};
};
/*
* Supported GPU families
*/

501
lib/libc/include/any-linux-any/drm/amdxdna_accel.h vendored Normal file
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@ -0,0 +1,501 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
*/
#ifndef _AMDXDNA_ACCEL_H_
#define _AMDXDNA_ACCEL_H_
#include <linux/stddef.h>
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#define AMDXDNA_INVALID_CMD_HANDLE (~0UL)
#define AMDXDNA_INVALID_ADDR (~0UL)
#define AMDXDNA_INVALID_CTX_HANDLE 0
#define AMDXDNA_INVALID_BO_HANDLE 0
#define AMDXDNA_INVALID_FENCE_HANDLE 0
enum amdxdna_device_type {
AMDXDNA_DEV_TYPE_UNKNOWN = -1,
AMDXDNA_DEV_TYPE_KMQ,
};
enum amdxdna_drm_ioctl_id {
DRM_AMDXDNA_CREATE_HWCTX,
DRM_AMDXDNA_DESTROY_HWCTX,
DRM_AMDXDNA_CONFIG_HWCTX,
DRM_AMDXDNA_CREATE_BO,
DRM_AMDXDNA_GET_BO_INFO,
DRM_AMDXDNA_SYNC_BO,
DRM_AMDXDNA_EXEC_CMD,
DRM_AMDXDNA_GET_INFO,
DRM_AMDXDNA_SET_STATE,
};
/**
* struct qos_info - QoS information for driver.
* @gops: Giga operations per second.
* @fps: Frames per second.
* @dma_bandwidth: DMA bandwidtha.
* @latency: Frame response latency.
* @frame_exec_time: Frame execution time.
* @priority: Request priority.
*
* User program can provide QoS hints to driver.
*/
struct amdxdna_qos_info {
__u32 gops;
__u32 fps;
__u32 dma_bandwidth;
__u32 latency;
__u32 frame_exec_time;
__u32 priority;
};
/**
* struct amdxdna_drm_create_hwctx - Create hardware context.
* @ext: MBZ.
* @ext_flags: MBZ.
* @qos_p: Address of QoS info.
* @umq_bo: BO handle for user mode queue(UMQ).
* @log_buf_bo: BO handle for log buffer.
* @max_opc: Maximum operations per cycle.
* @num_tiles: Number of AIE tiles.
* @mem_size: Size of AIE tile memory.
* @umq_doorbell: Returned offset of doorbell associated with UMQ.
* @handle: Returned hardware context handle.
* @syncobj_handle: Returned syncobj handle for command completion.
*/
struct amdxdna_drm_create_hwctx {
__u64 ext;
__u64 ext_flags;
__u64 qos_p;
__u32 umq_bo;
__u32 log_buf_bo;
__u32 max_opc;
__u32 num_tiles;
__u32 mem_size;
__u32 umq_doorbell;
__u32 handle;
__u32 syncobj_handle;
};
/**
* struct amdxdna_drm_destroy_hwctx - Destroy hardware context.
* @handle: Hardware context handle.
* @pad: MBZ.
*/
struct amdxdna_drm_destroy_hwctx {
__u32 handle;
__u32 pad;
};
/**
* struct amdxdna_cu_config - configuration for one CU
* @cu_bo: CU configuration buffer bo handle.
* @cu_func: Function of a CU.
* @pad: MBZ.
*/
struct amdxdna_cu_config {
__u32 cu_bo;
__u8 cu_func;
__u8 pad[3];
};
/**
* struct amdxdna_hwctx_param_config_cu - configuration for CUs in hardware context
* @num_cus: Number of CUs to configure.
* @pad: MBZ.
* @cu_configs: Array of CU configurations of struct amdxdna_cu_config.
*/
struct amdxdna_hwctx_param_config_cu {
__u16 num_cus;
__u16 pad[3];
struct amdxdna_cu_config cu_configs[] __counted_by(num_cus);
};
enum amdxdna_drm_config_hwctx_param {
DRM_AMDXDNA_HWCTX_CONFIG_CU,
DRM_AMDXDNA_HWCTX_ASSIGN_DBG_BUF,
DRM_AMDXDNA_HWCTX_REMOVE_DBG_BUF,
};
/**
* struct amdxdna_drm_config_hwctx - Configure hardware context.
* @handle: hardware context handle.
* @param_type: Value in enum amdxdna_drm_config_hwctx_param. Specifies the
* structure passed in via param_val.
* @param_val: A structure specified by the param_type struct member.
* @param_val_size: Size of the parameter buffer pointed to by the param_val.
* If param_val is not a pointer, driver can ignore this.
* @pad: MBZ.
*
* Note: if the param_val is a pointer pointing to a buffer, the maximum size
* of the buffer is 4KiB(PAGE_SIZE).
*/
struct amdxdna_drm_config_hwctx {
__u32 handle;
__u32 param_type;
__u64 param_val;
__u32 param_val_size;
__u32 pad;
};
enum amdxdna_bo_type {
AMDXDNA_BO_INVALID = 0,
AMDXDNA_BO_SHMEM,
AMDXDNA_BO_DEV_HEAP,
AMDXDNA_BO_DEV,
AMDXDNA_BO_CMD,
};
/**
* struct amdxdna_drm_create_bo - Create a buffer object.
* @flags: Buffer flags. MBZ.
* @vaddr: User VA of buffer if applied. MBZ.
* @size: Size in bytes.
* @type: Buffer type.
* @handle: Returned DRM buffer object handle.
*/
struct amdxdna_drm_create_bo {
__u64 flags;
__u64 vaddr;
__u64 size;
__u32 type;
__u32 handle;
};
/**
* struct amdxdna_drm_get_bo_info - Get buffer object information.
* @ext: MBZ.
* @ext_flags: MBZ.
* @handle: DRM buffer object handle.
* @pad: MBZ.
* @map_offset: Returned DRM fake offset for mmap().
* @vaddr: Returned user VA of buffer. 0 in case user needs mmap().
* @xdna_addr: Returned XDNA device virtual address.
*/
struct amdxdna_drm_get_bo_info {
__u64 ext;
__u64 ext_flags;
__u32 handle;
__u32 pad;
__u64 map_offset;
__u64 vaddr;
__u64 xdna_addr;
};
/**
* struct amdxdna_drm_sync_bo - Sync buffer object.
* @handle: Buffer object handle.
* @direction: Direction of sync, can be from device or to device.
* @offset: Offset in the buffer to sync.
* @size: Size in bytes.
*/
struct amdxdna_drm_sync_bo {
__u32 handle;
#define SYNC_DIRECT_TO_DEVICE 0U
#define SYNC_DIRECT_FROM_DEVICE 1U
__u32 direction;
__u64 offset;
__u64 size;
};
enum amdxdna_cmd_type {
AMDXDNA_CMD_SUBMIT_EXEC_BUF = 0,
AMDXDNA_CMD_SUBMIT_DEPENDENCY,
AMDXDNA_CMD_SUBMIT_SIGNAL,
};
/**
* struct amdxdna_drm_exec_cmd - Execute command.
* @ext: MBZ.
* @ext_flags: MBZ.
* @hwctx: Hardware context handle.
* @type: One of command type in enum amdxdna_cmd_type.
* @cmd_handles: Array of command handles or the command handle itself
* in case of just one.
* @args: Array of arguments for all command handles.
* @cmd_count: Number of command handles in the cmd_handles array.
* @arg_count: Number of arguments in the args array.
* @seq: Returned sequence number for this command.
*/
struct amdxdna_drm_exec_cmd {
__u64 ext;
__u64 ext_flags;
__u32 hwctx;
__u32 type;
__u64 cmd_handles;
__u64 args;
__u32 cmd_count;
__u32 arg_count;
__u64 seq;
};
/**
* struct amdxdna_drm_query_aie_status - Query the status of the AIE hardware
* @buffer: The user space buffer that will return the AIE status.
* @buffer_size: The size of the user space buffer.
* @cols_filled: A bitmap of AIE columns whose data has been returned in the buffer.
*/
struct amdxdna_drm_query_aie_status {
__u64 buffer; /* out */
__u32 buffer_size; /* in */
__u32 cols_filled; /* out */
};
/**
* struct amdxdna_drm_query_aie_version - Query the version of the AIE hardware
* @major: The major version number.
* @minor: The minor version number.
*/
struct amdxdna_drm_query_aie_version {
__u32 major; /* out */
__u32 minor; /* out */
};
/**
* struct amdxdna_drm_query_aie_tile_metadata - Query the metadata of AIE tile (core, mem, shim)
* @row_count: The number of rows.
* @row_start: The starting row number.
* @dma_channel_count: The number of dma channels.
* @lock_count: The number of locks.
* @event_reg_count: The number of events.
* @pad: Structure padding.
*/
struct amdxdna_drm_query_aie_tile_metadata {
__u16 row_count;
__u16 row_start;
__u16 dma_channel_count;
__u16 lock_count;
__u16 event_reg_count;
__u16 pad[3];
};
/**
* struct amdxdna_drm_query_aie_metadata - Query the metadata of the AIE hardware
* @col_size: The size of a column in bytes.
* @cols: The total number of columns.
* @rows: The total number of rows.
* @version: The version of the AIE hardware.
* @core: The metadata for all core tiles.
* @mem: The metadata for all mem tiles.
* @shim: The metadata for all shim tiles.
*/
struct amdxdna_drm_query_aie_metadata {
__u32 col_size;
__u16 cols;
__u16 rows;
struct amdxdna_drm_query_aie_version version;
struct amdxdna_drm_query_aie_tile_metadata core;
struct amdxdna_drm_query_aie_tile_metadata mem;
struct amdxdna_drm_query_aie_tile_metadata shim;
};
/**
* struct amdxdna_drm_query_clock - Metadata for a clock
* @name: The clock name.
* @freq_mhz: The clock frequency.
* @pad: Structure padding.
*/
struct amdxdna_drm_query_clock {
__u8 name[16];
__u32 freq_mhz;
__u32 pad;
};
/**
* struct amdxdna_drm_query_clock_metadata - Query metadata for clocks
* @mp_npu_clock: The metadata for MP-NPU clock.
* @h_clock: The metadata for H clock.
*/
struct amdxdna_drm_query_clock_metadata {
struct amdxdna_drm_query_clock mp_npu_clock;
struct amdxdna_drm_query_clock h_clock;
};
enum amdxdna_sensor_type {
AMDXDNA_SENSOR_TYPE_POWER
};
/**
* struct amdxdna_drm_query_sensor - The data for single sensor.
* @label: The name for a sensor.
* @input: The current value of the sensor.
* @max: The maximum value possible for the sensor.
* @average: The average value of the sensor.
* @highest: The highest recorded sensor value for this driver load for the sensor.
* @status: The sensor status.
* @units: The sensor units.
* @unitm: Translates value member variables into the correct unit via (pow(10, unitm) * value).
* @type: The sensor type from enum amdxdna_sensor_type.
* @pad: Structure padding.
*/
struct amdxdna_drm_query_sensor {
__u8 label[64];
__u32 input;
__u32 max;
__u32 average;
__u32 highest;
__u8 status[64];
__u8 units[16];
__s8 unitm;
__u8 type;
__u8 pad[6];
};
/**
* struct amdxdna_drm_query_hwctx - The data for single context.
* @context_id: The ID for this context.
* @start_col: The starting column for the partition assigned to this context.
* @num_col: The number of columns in the partition assigned to this context.
* @pad: Structure padding.
* @pid: The Process ID of the process that created this context.
* @command_submissions: The number of commands submitted to this context.
* @command_completions: The number of commands completed by this context.
* @migrations: The number of times this context has been moved to a different partition.
* @preemptions: The number of times this context has been preempted by another context in the
* same partition.
* @errors: The errors for this context.
*/
struct amdxdna_drm_query_hwctx {
__u32 context_id;
__u32 start_col;
__u32 num_col;
__u32 pad;
__s64 pid;
__u64 command_submissions;
__u64 command_completions;
__u64 migrations;
__u64 preemptions;
__u64 errors;
};
enum amdxdna_power_mode_type {
POWER_MODE_DEFAULT, /* Fallback to calculated DPM */
POWER_MODE_LOW, /* Set frequency to lowest DPM */
POWER_MODE_MEDIUM, /* Set frequency to medium DPM */
POWER_MODE_HIGH, /* Set frequency to highest DPM */
POWER_MODE_TURBO, /* Maximum power */
};
/**
* struct amdxdna_drm_get_power_mode - Get the configured power mode
* @power_mode: The mode type from enum amdxdna_power_mode_type
* @pad: Structure padding.
*/
struct amdxdna_drm_get_power_mode {
__u8 power_mode;
__u8 pad[7];
};
/**
* struct amdxdna_drm_query_firmware_version - Query the firmware version
* @major: The major version number
* @minor: The minor version number
* @patch: The patch level version number
* @build: The build ID
*/
struct amdxdna_drm_query_firmware_version {
__u32 major; /* out */
__u32 minor; /* out */
__u32 patch; /* out */
__u32 build; /* out */
};
enum amdxdna_drm_get_param {
DRM_AMDXDNA_QUERY_AIE_STATUS,
DRM_AMDXDNA_QUERY_AIE_METADATA,
DRM_AMDXDNA_QUERY_AIE_VERSION,
DRM_AMDXDNA_QUERY_CLOCK_METADATA,
DRM_AMDXDNA_QUERY_SENSORS,
DRM_AMDXDNA_QUERY_HW_CONTEXTS,
DRM_AMDXDNA_QUERY_FIRMWARE_VERSION = 8,
DRM_AMDXDNA_GET_POWER_MODE,
};
/**
* struct amdxdna_drm_get_info - Get some information from the AIE hardware.
* @param: Value in enum amdxdna_drm_get_param. Specifies the structure passed in the buffer.
* @buffer_size: Size of the input buffer. Size needed/written by the kernel.
* @buffer: A structure specified by the param struct member.
*/
struct amdxdna_drm_get_info {
__u32 param; /* in */
__u32 buffer_size; /* in/out */
__u64 buffer; /* in/out */
};
enum amdxdna_drm_set_param {
DRM_AMDXDNA_SET_POWER_MODE,
DRM_AMDXDNA_WRITE_AIE_MEM,
DRM_AMDXDNA_WRITE_AIE_REG,
};
/**
* struct amdxdna_drm_set_state - Set the state of the AIE hardware.
* @param: Value in enum amdxdna_drm_set_param.
* @buffer_size: Size of the input param.
* @buffer: Pointer to the input param.
*/
struct amdxdna_drm_set_state {
__u32 param; /* in */
__u32 buffer_size; /* in */
__u64 buffer; /* in */
};
/**
* struct amdxdna_drm_set_power_mode - Set the power mode of the AIE hardware
* @power_mode: The sensor type from enum amdxdna_power_mode_type
* @pad: MBZ.
*/
struct amdxdna_drm_set_power_mode {
__u8 power_mode;
__u8 pad[7];
};
#define DRM_IOCTL_AMDXDNA_CREATE_HWCTX \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_CREATE_HWCTX, \
struct amdxdna_drm_create_hwctx)
#define DRM_IOCTL_AMDXDNA_DESTROY_HWCTX \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_DESTROY_HWCTX, \
struct amdxdna_drm_destroy_hwctx)
#define DRM_IOCTL_AMDXDNA_CONFIG_HWCTX \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_CONFIG_HWCTX, \
struct amdxdna_drm_config_hwctx)
#define DRM_IOCTL_AMDXDNA_CREATE_BO \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_CREATE_BO, \
struct amdxdna_drm_create_bo)
#define DRM_IOCTL_AMDXDNA_GET_BO_INFO \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_GET_BO_INFO, \
struct amdxdna_drm_get_bo_info)
#define DRM_IOCTL_AMDXDNA_SYNC_BO \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_SYNC_BO, \
struct amdxdna_drm_sync_bo)
#define DRM_IOCTL_AMDXDNA_EXEC_CMD \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_EXEC_CMD, \
struct amdxdna_drm_exec_cmd)
#define DRM_IOCTL_AMDXDNA_GET_INFO \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_GET_INFO, \
struct amdxdna_drm_get_info)
#define DRM_IOCTL_AMDXDNA_SET_STATE \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_SET_STATE, \
struct amdxdna_drm_set_state)
#if defined(__cplusplus)
} /* extern c end */
#endif
#endif /* _AMDXDNA_ACCEL_H_ */

1194
lib/libc/include/any-linux-any/drm/asahi_drm.h vendored Normal file
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File diff suppressed because it is too large Load Diff

4
lib/libc/include/any-linux-any/drm/drm.h vendored
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@ -899,13 +899,17 @@ struct drm_syncobj_destroy {
};
#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_TIMELINE (1 << 1)
#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_TIMELINE (1 << 1)
struct drm_syncobj_handle {
__u32 handle;
__u32 flags;
__s32 fd;
__u32 pad;
__u64 point;
};
struct drm_syncobj_transfer {

142
lib/libc/include/any-linux-any/drm/drm_fourcc.h vendored
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@ -210,6 +210,10 @@ extern "C" {
#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
/* 48 bpp RGB */
#define DRM_FORMAT_RGB161616 fourcc_code('R', 'G', '4', '8') /* [47:0] R:G:B 16:16:16 little endian */
#define DRM_FORMAT_BGR161616 fourcc_code('B', 'G', '4', '8') /* [47:0] B:G:R 16:16:16 little endian */
/* 64 bpp RGB */
#define DRM_FORMAT_XRGB16161616 fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */
#define DRM_FORMAT_XBGR16161616 fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */
@ -218,7 +222,7 @@ extern "C" {
#define DRM_FORMAT_ABGR16161616 fourcc_code('A', 'B', '4', '8') /* [63:0] A:B:G:R 16:16:16:16 little endian */
/*
* Floating point 64bpp RGB
* Half-Floating point - 16b/component
* IEEE 754-2008 binary16 half-precision float
* [15:0] sign:exponent:mantissa 1:5:10
*/
@ -228,6 +232,20 @@ extern "C" {
#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */
#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */
#define DRM_FORMAT_R16F fourcc_code('R', ' ', ' ', 'H') /* [15:0] R 16 little endian */
#define DRM_FORMAT_GR1616F fourcc_code('G', 'R', ' ', 'H') /* [31:0] G:R 16:16 little endian */
#define DRM_FORMAT_BGR161616F fourcc_code('B', 'G', 'R', 'H') /* [47:0] B:G:R 16:16:16 little endian */
/*
* Floating point - 32b/component
* IEEE 754-2008 binary32 float
* [31:0] sign:exponent:mantissa 1:8:23
*/
#define DRM_FORMAT_R32F fourcc_code('R', ' ', ' ', 'F') /* [31:0] R 32 little endian */
#define DRM_FORMAT_GR3232F fourcc_code('G', 'R', ' ', 'F') /* [63:0] R:G 32:32 little endian */
#define DRM_FORMAT_BGR323232F fourcc_code('B', 'G', 'R', 'F') /* [95:0] R:G:B 32:32:32 little endian */
#define DRM_FORMAT_ABGR32323232F fourcc_code('A', 'B', '8', 'F') /* [127:0] R:G:B:A 32:32:32:32 little endian */
/*
* RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits
* of unused padding per component:
@ -377,6 +395,42 @@ extern "C" {
*/
#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')
/*
* 3 plane YCbCr LSB aligned
* In order to use these formats in a similar fashion to MSB aligned ones
* implementation can multiply the values by 2^6=64. For that reason the padding
* must only contain zeros.
* index 0 = Y plane, [15:0] z:Y [6:10] little endian
* index 1 = Cr plane, [15:0] z:Cr [6:10] little endian
* index 2 = Cb plane, [15:0] z:Cb [6:10] little endian
*/
#define DRM_FORMAT_S010 fourcc_code('S', '0', '1', '0') /* 2x2 subsampled Cb (1) and Cr (2) planes 10 bits per channel */
#define DRM_FORMAT_S210 fourcc_code('S', '2', '1', '0') /* 2x1 subsampled Cb (1) and Cr (2) planes 10 bits per channel */
#define DRM_FORMAT_S410 fourcc_code('S', '4', '1', '0') /* non-subsampled Cb (1) and Cr (2) planes 10 bits per channel */
/*
* 3 plane YCbCr LSB aligned
* In order to use these formats in a similar fashion to MSB aligned ones
* implementation can multiply the values by 2^4=16. For that reason the padding
* must only contain zeros.
* index 0 = Y plane, [15:0] z:Y [4:12] little endian
* index 1 = Cr plane, [15:0] z:Cr [4:12] little endian
* index 2 = Cb plane, [15:0] z:Cb [4:12] little endian
*/
#define DRM_FORMAT_S012 fourcc_code('S', '0', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes 12 bits per channel */
#define DRM_FORMAT_S212 fourcc_code('S', '2', '1', '2') /* 2x1 subsampled Cb (1) and Cr (2) planes 12 bits per channel */
#define DRM_FORMAT_S412 fourcc_code('S', '4', '1', '2') /* non-subsampled Cb (1) and Cr (2) planes 12 bits per channel */
/*
* 3 plane YCbCr
* index 0 = Y plane, [15:0] Y little endian
* index 1 = Cr plane, [15:0] Cr little endian
* index 2 = Cb plane, [15:0] Cb little endian
*/
#define DRM_FORMAT_S016 fourcc_code('S', '0', '1', '6') /* 2x2 subsampled Cb (1) and Cr (2) planes 16 bits per channel */
#define DRM_FORMAT_S216 fourcc_code('S', '2', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes 16 bits per channel */
#define DRM_FORMAT_S416 fourcc_code('S', '4', '1', '6') /* non-subsampled Cb (1) and Cr (2) planes 16 bits per channel */
/*
* 3 plane YCbCr
* index 0: Y plane, [7:0] Y
@ -421,6 +475,8 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a
#define DRM_FORMAT_MOD_VENDOR_MTK 0x0b
#define DRM_FORMAT_MOD_VENDOR_APPLE 0x0c
/* add more to the end as needed */
@ -1453,6 +1509,90 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
*/
#define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0)
/* MediaTek modifiers
* Bits Parameter Notes
* ----- ------------------------ ---------------------------------------------
* 7: 0 TILE LAYOUT Values are MTK_FMT_MOD_TILE_*
* 15: 8 COMPRESSION Values are MTK_FMT_MOD_COMPRESS_*
* 23:16 10 BIT LAYOUT Values are MTK_FMT_MOD_10BIT_LAYOUT_*
*
*/
#define DRM_FORMAT_MOD_MTK(__flags) fourcc_mod_code(MTK, __flags)
/*
* MediaTek Tiled Modifier
* The lowest 8 bits of the modifier is used to specify the tiling
* layout. Only the 16L_32S tiling is used for now, but we define an
* "untiled" version and leave room for future expansion.
*/
#define MTK_FMT_MOD_TILE_MASK 0xf
#define MTK_FMT_MOD_TILE_NONE 0x0
#define MTK_FMT_MOD_TILE_16L32S 0x1
/*
* Bits 8-15 specify compression options
*/
#define MTK_FMT_MOD_COMPRESS_MASK (0xf << 8)
#define MTK_FMT_MOD_COMPRESS_NONE (0x0 << 8)
#define MTK_FMT_MOD_COMPRESS_V1 (0x1 << 8)
/*
* Bits 16-23 specify how the bits of 10 bit formats are
* stored out in memory
*/
#define MTK_FMT_MOD_10BIT_LAYOUT_MASK (0xf << 16)
#define MTK_FMT_MOD_10BIT_LAYOUT_PACKED (0x0 << 16)
#define MTK_FMT_MOD_10BIT_LAYOUT_LSBTILED (0x1 << 16)
#define MTK_FMT_MOD_10BIT_LAYOUT_LSBRASTER (0x2 << 16)
/* alias for the most common tiling format */
#define DRM_FORMAT_MOD_MTK_16L_32S_TILE DRM_FORMAT_MOD_MTK(MTK_FMT_MOD_TILE_16L32S)
/*
* Apple GPU-tiled layouts.
*
* Apple GPUs support nonlinear tilings with optional lossless compression.
*
* GPU-tiled images are divided into 16KiB tiles:
*
* Bytes per pixel Tile size
* --------------- ---------
* 1 128x128
* 2 128x64
* 4 64x64
* 8 64x32
* 16 32x32
*
* Tiles are raster-order. Pixels within a tile are interleaved (Morton order).
*
* Compressed images pad the body to 128-bytes and are immediately followed by a
* metadata section. The metadata section rounds the image dimensions to
* powers-of-two and contains 8 bytes for each 16x16 compression subtile.
* Subtiles are interleaved (Morton order).
*
* All images are 128-byte aligned.
*
* These layouts fundamentally do not have meaningful strides. No matter how we
* specify strides for these layouts, userspace unaware of Apple image layouts
* will be unable to use correctly the specified stride for any purpose.
* Userspace aware of the image layouts do not use strides. The most "correct"
* convention would be setting the image stride to 0. Unfortunately, some
* software assumes the stride is at least (width * bytes per pixel). We
* therefore require that stride equals (width * bytes per pixel). Since the
* stride is arbitrary here, we pick the simplest convention.
*
* Although containing two sections, compressed image layouts are treated in
* software as a single plane. This is modelled after AFBC, a similar
* scheme. Attempting to separate the sections to be "explicit" in DRM would
* only generate more confusion, as software does not treat the image this way.
*
* For detailed information on the hardware image layouts, see
* https://docs.mesa3d.org/drivers/asahi.html#image-layouts
*/
#define DRM_FORMAT_MOD_APPLE_GPU_TILED fourcc_mod_code(APPLE, 1)
#define DRM_FORMAT_MOD_APPLE_GPU_TILED_COMPRESSED fourcc_mod_code(APPLE, 2)
/*
* AMD modifiers
*

102
lib/libc/include/any-linux-any/drm/ivpu_accel.h vendored
View File

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (C) 2020-2024 Intel Corporation
* Copyright (C) 2020-2025 Intel Corporation
*/
#ifndef __UAPI_IVPU_DRM_H__
@ -22,6 +22,9 @@ extern "C" {
#define DRM_IVPU_METRIC_STREAMER_STOP 0x08
#define DRM_IVPU_METRIC_STREAMER_GET_DATA 0x09
#define DRM_IVPU_METRIC_STREAMER_GET_INFO 0x0a
#define DRM_IVPU_CMDQ_CREATE 0x0b
#define DRM_IVPU_CMDQ_DESTROY 0x0c
#define DRM_IVPU_CMDQ_SUBMIT 0x0d
#define DRM_IOCTL_IVPU_GET_PARAM \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)
@ -57,6 +60,15 @@ extern "C" {
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_GET_INFO, \
struct drm_ivpu_metric_streamer_get_data)
#define DRM_IOCTL_IVPU_CMDQ_CREATE \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_CREATE, struct drm_ivpu_cmdq_create)
#define DRM_IOCTL_IVPU_CMDQ_DESTROY \
DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_DESTROY, struct drm_ivpu_cmdq_destroy)
#define DRM_IOCTL_IVPU_CMDQ_SUBMIT \
DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_SUBMIT, struct drm_ivpu_cmdq_submit)
/**
* DOC: contexts
*
@ -107,6 +119,13 @@ extern "C" {
* accessible by hardware DMA.
*/
#define DRM_IVPU_CAP_DMA_MEMORY_RANGE 2
/**
* DRM_IVPU_CAP_MANAGE_CMDQ
*
* Driver supports explicit command queue operations like command queue create,
* command queue destroy and submit job on specific command queue.
*/
#define DRM_IVPU_CAP_MANAGE_CMDQ 3
/**
* struct drm_ivpu_param - Get/Set VPU parameters
@ -128,7 +147,7 @@ struct drm_ivpu_param {
* platform type when executing on a simulator or emulator (read-only)
*
* %DRM_IVPU_PARAM_CORE_CLOCK_RATE:
* Current PLL frequency (read-only)
* Maximum frequency of the NPU data processing unit clock (read-only)
*
* %DRM_IVPU_PARAM_NUM_CONTEXTS:
* Maximum number of simultaneously existing contexts (read-only)
@ -316,6 +335,44 @@ struct drm_ivpu_submit {
__u32 priority;
};
/**
* struct drm_ivpu_cmdq_submit - Submit commands to the VPU using explicit command queue
*
* Execute a single command buffer on a given command queue.
* Handles to all referenced buffer objects have to be provided in @buffers_ptr.
*
* User space may wait on job completion using %DRM_IVPU_BO_WAIT ioctl.
*/
struct drm_ivpu_cmdq_submit {
/**
* @buffers_ptr:
*
* A pointer to an u32 array of GEM handles of the BOs required for this job.
* The number of elements in the array must be equal to the value given by @buffer_count.
*
* The first BO is the command buffer. The rest of array has to contain all
* BOs referenced from the command buffer.
*/
__u64 buffers_ptr;
/** @buffer_count: Number of elements in the @buffers_ptr */
__u32 buffer_count;
/** @cmdq_id: ID for the command queue where job will be submitted */
__u32 cmdq_id;
/** @flags: Reserved for future use - must be zero */
__u32 flags;
/**
* @commands_offset:
*
* Offset inside the first buffer in @buffers_ptr containing commands
* to be executed. The offset has to be 8-byte aligned.
*/
__u32 commands_offset;
};
/* drm_ivpu_bo_wait job status codes */
#define DRM_IVPU_JOB_STATUS_SUCCESS 0
#define DRM_IVPU_JOB_STATUS_ABORTED 256
@ -388,6 +445,47 @@ struct drm_ivpu_metric_streamer_get_data {
__u64 data_size;
};
/* Command queue flags */
#define DRM_IVPU_CMDQ_FLAG_TURBO 0x00000001
/**
* struct drm_ivpu_cmdq_create - Create command queue for job submission
*/
struct drm_ivpu_cmdq_create {
/** @cmdq_id: Returned ID of created command queue */
__u32 cmdq_id;
/**
* @priority:
*
* Priority to be set for related job command queue, can be one of the following:
* %DRM_IVPU_JOB_PRIORITY_DEFAULT
* %DRM_IVPU_JOB_PRIORITY_IDLE
* %DRM_IVPU_JOB_PRIORITY_NORMAL
* %DRM_IVPU_JOB_PRIORITY_FOCUS
* %DRM_IVPU_JOB_PRIORITY_REALTIME
*/
__u32 priority;
/**
* @flags:
*
* Supported flags:
*
* %DRM_IVPU_CMDQ_FLAG_TURBO
*
* Enable low-latency mode for the command queue. The NPU will maximize performance
* when executing jobs from such queue at the cost of increased power usage.
*/
__u32 flags;
};
/**
* struct drm_ivpu_cmdq_destroy - Destroy a command queue
*/
struct drm_ivpu_cmdq_destroy {
/** @cmdq_id: ID of command queue to destroy */
__u32 cmdq_id;
};
/**
* struct drm_ivpu_metric_streamer_stop - Stop collecting metric data
*/

150
lib/libc/include/any-linux-any/drm/msm_drm.h vendored
View File

@ -90,6 +90,33 @@ struct drm_msm_timespec {
#define MSM_PARAM_RAYTRACING 0x11 /* RO */
#define MSM_PARAM_UBWC_SWIZZLE 0x12 /* RO */
#define MSM_PARAM_MACROTILE_MODE 0x13 /* RO */
#define MSM_PARAM_UCHE_TRAP_BASE 0x14 /* RO */
/* PRR (Partially Resident Region) is required for sparse residency: */
#define MSM_PARAM_HAS_PRR 0x15 /* RO */
/* MSM_PARAM_EN_VM_BIND is set to 1 to enable VM_BIND ops.
*
* With VM_BIND enabled, userspace is required to allocate iova and use the
* VM_BIND ops for map/unmap ioctls. MSM_INFO_SET_IOVA and MSM_INFO_GET_IOVA
* will be rejected. (The latter does not have a sensible meaning when a BO
* can have multiple and/or partial mappings.)
*
* With VM_BIND enabled, userspace does not include a submit_bo table in the
* SUBMIT ioctl (this will be rejected), the resident set is determined by
* the the VM_BIND ops.
*
* Enabling VM_BIND will fail on devices which do not have per-process pgtables.
* And it is not allowed to disable VM_BIND once it has been enabled.
*
* Enabling VM_BIND should be done (attempted) prior to allocating any BOs or
* submitqueues of type MSM_SUBMITQUEUE_VM_BIND.
*
* Relatedly, when VM_BIND mode is enabled, the kernel will not try to recover
* from GPU faults or failed async VM_BIND ops, in particular because it is
* difficult to communicate to userspace which op failed so that userspace
* could rewind and try again. When the VM is marked unusable, the SUBMIT
* ioctl will throw -EPIPE.
*/
#define MSM_PARAM_EN_VM_BIND 0x16 /* WO, once */
/* For backwards compat. The original support for preemption was based on
* a single ring per priority level so # of priority levels equals the #
@ -113,6 +140,19 @@ struct drm_msm_param {
#define MSM_BO_SCANOUT 0x00000001 /* scanout capable */
#define MSM_BO_GPU_READONLY 0x00000002
/* Private buffers do not need to be explicitly listed in the SUBMIT
* ioctl, unless referenced by a drm_msm_gem_submit_cmd. Private
* buffers may NOT be imported/exported or used for scanout (or any
* other situation where buffers can be indefinitely pinned, but
* cases other than scanout are all kernel owned BOs which are not
* visible to userspace).
*
* In exchange for those constraints, all private BOs associated with
* a single context (drm_file) share a single dma_resv, and if there
* has been no eviction since the last submit, there are no per-BO
* bookeeping to do, significantly cutting the SUBMIT overhead.
*/
#define MSM_BO_NO_SHARE 0x00000004
#define MSM_BO_CACHE_MASK 0x000f0000
/* cache modes */
#define MSM_BO_CACHED 0x00010000
@ -122,6 +162,7 @@ struct drm_msm_param {
#define MSM_BO_FLAGS (MSM_BO_SCANOUT | \
MSM_BO_GPU_READONLY | \
MSM_BO_NO_SHARE | \
MSM_BO_CACHE_MASK)
struct drm_msm_gem_new {
@ -179,6 +220,17 @@ struct drm_msm_gem_cpu_fini {
* Cmdstream Submission:
*/
#define MSM_SYNCOBJ_RESET 0x00000001 /* Reset syncobj after wait. */
#define MSM_SYNCOBJ_FLAGS ( \
MSM_SYNCOBJ_RESET | \
0)
struct drm_msm_syncobj {
__u32 handle; /* in, syncobj handle. */
__u32 flags; /* in, from MSM_SUBMIT_SYNCOBJ_FLAGS */
__u64 point; /* in, timepoint for timeline syncobjs. */
};
/* The value written into the cmdstream is logically:
*
* ((relocbuf->gpuaddr + reloc_offset) << shift) | or
@ -220,7 +272,10 @@ struct drm_msm_gem_submit_cmd {
__u32 size; /* in, cmdstream size */
__u32 pad;
__u32 nr_relocs; /* in, number of submit_reloc's */
__u64 relocs; /* in, ptr to array of submit_reloc's */
union {
__u64 relocs; /* in, ptr to array of submit_reloc's */
__u64 iova; /* cmdstream address (for VM_BIND contexts) */
};
};
/* Each buffer referenced elsewhere in the cmdstream submit (ie. the
@ -268,17 +323,6 @@ struct drm_msm_gem_submit_bo {
MSM_SUBMIT_FENCE_SN_IN | \
0)
#define MSM_SUBMIT_SYNCOBJ_RESET 0x00000001 /* Reset syncobj after wait. */
#define MSM_SUBMIT_SYNCOBJ_FLAGS ( \
MSM_SUBMIT_SYNCOBJ_RESET | \
0)
struct drm_msm_gem_submit_syncobj {
__u32 handle; /* in, syncobj handle. */
__u32 flags; /* in, from MSM_SUBMIT_SYNCOBJ_FLAGS */
__u64 point; /* in, timepoint for timeline syncobjs. */
};
/* Each cmdstream submit consists of a table of buffers involved, and
* one or more cmdstream buffers. This allows for conditional execution
* (context-restore), and IB buffers needed for per tile/bin draw cmds.
@ -292,13 +336,80 @@ struct drm_msm_gem_submit {
__u64 cmds; /* in, ptr to array of submit_cmd's */
__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
__u32 queueid; /* in, submitqueue id */
__u64 in_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
__u64 out_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
__u64 in_syncobjs; /* in, ptr to array of drm_msm_syncobj */
__u64 out_syncobjs; /* in, ptr to array of drm_msm_syncobj */
__u32 nr_in_syncobjs; /* in, number of entries in in_syncobj */
__u32 nr_out_syncobjs; /* in, number of entries in out_syncobj. */
__u32 syncobj_stride; /* in, stride of syncobj arrays. */
__u32 pad; /*in, reserved for future use, always 0. */
};
#define MSM_VM_BIND_OP_UNMAP 0
#define MSM_VM_BIND_OP_MAP 1
#define MSM_VM_BIND_OP_MAP_NULL 2
#define MSM_VM_BIND_OP_DUMP 1
#define MSM_VM_BIND_OP_FLAGS ( \
MSM_VM_BIND_OP_DUMP | \
0)
/**
* struct drm_msm_vm_bind_op - bind/unbind op to run
*/
struct drm_msm_vm_bind_op {
/** @op: one of MSM_VM_BIND_OP_x */
__u32 op;
/** @handle: GEM object handle, MBZ for UNMAP or MAP_NULL */
__u32 handle;
/** @obj_offset: Offset into GEM object, MBZ for UNMAP or MAP_NULL */
__u64 obj_offset;
/** @iova: Address to operate on */
__u64 iova;
/** @range: Number of bites to to map/unmap */
__u64 range;
/** @flags: Bitmask of MSM_VM_BIND_OP_FLAG_x */
__u32 flags;
/** @pad: MBZ */
__u32 pad;
};
#define MSM_VM_BIND_FENCE_FD_IN 0x00000001
#define MSM_VM_BIND_FENCE_FD_OUT 0x00000002
#define MSM_VM_BIND_FLAGS ( \
MSM_VM_BIND_FENCE_FD_IN | \
MSM_VM_BIND_FENCE_FD_OUT | \
0)
/**
* struct drm_msm_vm_bind - Input of &DRM_IOCTL_MSM_VM_BIND
*/
struct drm_msm_vm_bind {
/** @flags: in, bitmask of MSM_VM_BIND_x */
__u32 flags;
/** @nr_ops: the number of bind ops in this ioctl */
__u32 nr_ops;
/** @fence_fd: in/out fence fd (see MSM_VM_BIND_FENCE_FD_IN/OUT) */
__s32 fence_fd;
/** @queue_id: in, submitqueue id */
__u32 queue_id;
/** @in_syncobjs: in, ptr to array of drm_msm_gem_syncobj */
__u64 in_syncobjs;
/** @out_syncobjs: in, ptr to array of drm_msm_gem_syncobj */
__u64 out_syncobjs;
/** @nr_in_syncobjs: in, number of entries in in_syncobj */
__u32 nr_in_syncobjs;
/** @nr_out_syncobjs: in, number of entries in out_syncobj */
__u32 nr_out_syncobjs;
/** @syncobj_stride: in, stride of syncobj arrays */
__u32 syncobj_stride;
/** @op_stride: sizeof each struct drm_msm_vm_bind_op in @ops */
__u32 op_stride;
union {
/** @op: used if num_ops == 1 */
struct drm_msm_vm_bind_op op;
/** @ops: userptr to array of drm_msm_vm_bind_op if num_ops > 1 */
__u64 ops;
};
};
#define MSM_WAIT_FENCE_BOOST 0x00000001
@ -344,12 +455,19 @@ struct drm_msm_gem_madvise {
/*
* Draw queues allow the user to set specific submission parameter. Command
* submissions specify a specific submitqueue to use. ID 0 is reserved for
* backwards compatibility as a "default" submitqueue
* backwards compatibility as a "default" submitqueue.
*
* Because VM_BIND async updates happen on the CPU, they must run on a
* virtual queue created with the flag MSM_SUBMITQUEUE_VM_BIND. If we had
* a way to do pgtable updates on the GPU, we could drop this restriction.
*/
#define MSM_SUBMITQUEUE_ALLOW_PREEMPT 0x00000001
#define MSM_SUBMITQUEUE_VM_BIND 0x00000002 /* virtual queue for VM_BIND ops */
#define MSM_SUBMITQUEUE_FLAGS ( \
MSM_SUBMITQUEUE_ALLOW_PREEMPT | \
MSM_SUBMITQUEUE_VM_BIND | \
0)
/*
@ -387,6 +505,7 @@ struct drm_msm_submitqueue_query {
#define DRM_MSM_SUBMITQUEUE_NEW 0x0A
#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C
#define DRM_MSM_VM_BIND 0x0D
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SET_PARAM, struct drm_msm_param)
@ -400,6 +519,7 @@ struct drm_msm_submitqueue_query {
#define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)
#define DRM_IOCTL_MSM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_VM_BIND, struct drm_msm_vm_bind)
#if defined(__cplusplus)
}

101
lib/libc/include/any-linux-any/drm/nova_drm.h vendored Normal file
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@ -0,0 +1,101 @@
/* SPDX-License-Identifier: MIT */
#ifndef __NOVA_DRM_H__
#define __NOVA_DRM_H__
#include "drm.h"
/* DISCLAIMER: Do not use, this is not a stable uAPI.
*
* This uAPI serves only testing purposes as long as this driver is still in
* development. It is required to implement and test infrastructure which is
* upstreamed in the context of this driver. See also [1].
*
* [1] https://lore.kernel.org/dri-devel/Zfsj0_tb-0-tNrJy@cassiopeiae/T/#u
*/
#if defined(__cplusplus)
extern "C" {
#endif
/*
* NOVA_GETPARAM_VRAM_BAR_SIZE
*
* Query the VRAM BAR size in bytes.
*/
#define NOVA_GETPARAM_VRAM_BAR_SIZE 0x1
/**
* struct drm_nova_getparam - query GPU and driver metadata
*/
struct drm_nova_getparam {
/**
* @param: The identifier of the parameter to query.
*/
__u64 param;
/**
* @value: The value for the specified parameter.
*/
__u64 value;
};
/**
* struct drm_nova_gem_create - create a new DRM GEM object
*/
struct drm_nova_gem_create {
/**
* @handle: The handle of the new DRM GEM object.
*/
__u32 handle;
/**
* @pad: 32 bit padding, should be 0.
*/
__u32 pad;
/**
* @size: The size of the new DRM GEM object.
*/
__u64 size;
};
/**
* struct drm_nova_gem_info - query DRM GEM object metadata
*/
struct drm_nova_gem_info {
/**
* @handle: The handle of the DRM GEM object to query.
*/
__u32 handle;
/**
* @pad: 32 bit padding, should be 0.
*/
__u32 pad;
/**
* @size: The size of the DRM GEM obejct.
*/
__u64 size;
};
#define DRM_NOVA_GETPARAM 0x00
#define DRM_NOVA_GEM_CREATE 0x01
#define DRM_NOVA_GEM_INFO 0x02
/* Note: this is an enum so that it can be resolved by Rust bindgen. */
enum {
DRM_IOCTL_NOVA_GETPARAM = DRM_IOWR(DRM_COMMAND_BASE + DRM_NOVA_GETPARAM,
struct drm_nova_getparam),
DRM_IOCTL_NOVA_GEM_CREATE = DRM_IOWR(DRM_COMMAND_BASE + DRM_NOVA_GEM_CREATE,
struct drm_nova_gem_create),
DRM_IOCTL_NOVA_GEM_INFO = DRM_IOWR(DRM_COMMAND_BASE + DRM_NOVA_GEM_INFO,
struct drm_nova_gem_info),
};
#if defined(__cplusplus)
}
#endif
#endif /* __NOVA_DRM_H__ */

21
lib/libc/include/any-linux-any/drm/panfrost_drm.h vendored
View File

@ -21,6 +21,7 @@ extern "C" {
#define DRM_PANFROST_PERFCNT_ENABLE 0x06
#define DRM_PANFROST_PERFCNT_DUMP 0x07
#define DRM_PANFROST_MADVISE 0x08
#define DRM_PANFROST_SET_LABEL_BO 0x09
#define DRM_IOCTL_PANFROST_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit)
#define DRM_IOCTL_PANFROST_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo)
@ -29,6 +30,7 @@ extern "C" {
#define DRM_IOCTL_PANFROST_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_PARAM, struct drm_panfrost_get_param)
#define DRM_IOCTL_PANFROST_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset)
#define DRM_IOCTL_PANFROST_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MADVISE, struct drm_panfrost_madvise)
#define DRM_IOCTL_PANFROST_SET_LABEL_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_SET_LABEL_BO, struct drm_panfrost_set_label_bo)
/*
* Unstable ioctl(s): only exposed when the unsafe unstable_ioctls module
@ -227,6 +229,25 @@ struct drm_panfrost_madvise {
__u32 retained; /* out, whether backing store still exists */
};
/**
* struct drm_panfrost_set_label_bo - ioctl argument for labelling Panfrost BOs.
*/
struct drm_panfrost_set_label_bo {
/** @handle: Handle of the buffer object to label. */
__u32 handle;
/** @pad: MBZ. */
__u32 pad;
/**
* @label: User pointer to a NUL-terminated string
*
* Length cannot be greater than 4096.
* NULL is permitted and means clear the label.
*/
__u64 label;
};
/* Definitions for coredump decoding in user space */
#define PANFROSTDUMP_MAJOR 1
#define PANFROSTDUMP_MINOR 0

159
lib/libc/include/any-linux-any/drm/panthor_drm.h vendored
View File

@ -127,50 +127,25 @@ enum drm_panthor_ioctl_id {
/** @DRM_PANTHOR_TILER_HEAP_DESTROY: Destroy a tiler heap. */
DRM_PANTHOR_TILER_HEAP_DESTROY,
/** @DRM_PANTHOR_BO_SET_LABEL: Label a BO. */
DRM_PANTHOR_BO_SET_LABEL,
/**
* @DRM_PANTHOR_SET_USER_MMIO_OFFSET: Set the offset to use as the user MMIO offset.
*
* The default behavior is to pick the MMIO offset based on the size of the pgoff_t
* type seen by the process that manipulates the FD, such that a 32-bit process can
* always map the user MMIO ranges. But this approach doesn't work well for emulators
* like FEX, where the emulator is an 64-bit binary which might be executing 32-bit
* code. In that case, the kernel thinks it's the 64-bit process and assumes
* DRM_PANTHOR_USER_MMIO_OFFSET_64BIT is in use, but the UMD library expects
* DRM_PANTHOR_USER_MMIO_OFFSET_32BIT, because it can't mmap() anything above the
* pgoff_t size.
*/
DRM_PANTHOR_SET_USER_MMIO_OFFSET,
};
/**
* DRM_IOCTL_PANTHOR() - Build a Panthor IOCTL number
* @__access: Access type. Must be R, W or RW.
* @__id: One of the DRM_PANTHOR_xxx id.
* @__type: Suffix of the type being passed to the IOCTL.
*
* Don't use this macro directly, use the DRM_IOCTL_PANTHOR_xxx
* values instead.
*
* Return: An IOCTL number to be passed to ioctl() from userspace.
*/
#define DRM_IOCTL_PANTHOR(__access, __id, __type) \
DRM_IO ## __access(DRM_COMMAND_BASE + DRM_PANTHOR_ ## __id, \
struct drm_panthor_ ## __type)
#define DRM_IOCTL_PANTHOR_DEV_QUERY \
DRM_IOCTL_PANTHOR(WR, DEV_QUERY, dev_query)
#define DRM_IOCTL_PANTHOR_VM_CREATE \
DRM_IOCTL_PANTHOR(WR, VM_CREATE, vm_create)
#define DRM_IOCTL_PANTHOR_VM_DESTROY \
DRM_IOCTL_PANTHOR(WR, VM_DESTROY, vm_destroy)
#define DRM_IOCTL_PANTHOR_VM_BIND \
DRM_IOCTL_PANTHOR(WR, VM_BIND, vm_bind)
#define DRM_IOCTL_PANTHOR_VM_GET_STATE \
DRM_IOCTL_PANTHOR(WR, VM_GET_STATE, vm_get_state)
#define DRM_IOCTL_PANTHOR_BO_CREATE \
DRM_IOCTL_PANTHOR(WR, BO_CREATE, bo_create)
#define DRM_IOCTL_PANTHOR_BO_MMAP_OFFSET \
DRM_IOCTL_PANTHOR(WR, BO_MMAP_OFFSET, bo_mmap_offset)
#define DRM_IOCTL_PANTHOR_GROUP_CREATE \
DRM_IOCTL_PANTHOR(WR, GROUP_CREATE, group_create)
#define DRM_IOCTL_PANTHOR_GROUP_DESTROY \
DRM_IOCTL_PANTHOR(WR, GROUP_DESTROY, group_destroy)
#define DRM_IOCTL_PANTHOR_GROUP_SUBMIT \
DRM_IOCTL_PANTHOR(WR, GROUP_SUBMIT, group_submit)
#define DRM_IOCTL_PANTHOR_GROUP_GET_STATE \
DRM_IOCTL_PANTHOR(WR, GROUP_GET_STATE, group_get_state)
#define DRM_IOCTL_PANTHOR_TILER_HEAP_CREATE \
DRM_IOCTL_PANTHOR(WR, TILER_HEAP_CREATE, tiler_heap_create)
#define DRM_IOCTL_PANTHOR_TILER_HEAP_DESTROY \
DRM_IOCTL_PANTHOR(WR, TILER_HEAP_DESTROY, tiler_heap_destroy)
/**
* DOC: IOCTL arguments
*/
@ -335,6 +310,9 @@ struct drm_panthor_gpu_info {
/** @as_present: Bitmask encoding the number of address-space exposed by the MMU. */
__u32 as_present;
/** @pad0: MBZ. */
__u32 pad0;
/** @shader_present: Bitmask encoding the shader cores exposed by the GPU. */
__u64 shader_present;
@ -923,6 +901,15 @@ enum drm_panthor_group_state_flags {
* When a group ends up with this flag set, no jobs can be submitted to its queues.
*/
DRM_PANTHOR_GROUP_STATE_FATAL_FAULT = 1 << 1,
/**
* @DRM_PANTHOR_GROUP_STATE_INNOCENT: Group was killed during a reset caused by other
* groups.
*
* This flag can only be set if DRM_PANTHOR_GROUP_STATE_TIMEDOUT is set and
* DRM_PANTHOR_GROUP_STATE_FATAL_FAULT is not.
*/
DRM_PANTHOR_GROUP_STATE_INNOCENT = 1 << 2,
};
/**
@ -1010,6 +997,94 @@ struct drm_panthor_tiler_heap_destroy {
__u32 pad;
};
/**
* struct drm_panthor_bo_set_label - Arguments passed to DRM_IOCTL_PANTHOR_BO_SET_LABEL
*/
struct drm_panthor_bo_set_label {
/** @handle: Handle of the buffer object to label. */
__u32 handle;
/** @pad: MBZ. */
__u32 pad;
/**
* @label: User pointer to a NUL-terminated string
*
* Length cannot be greater than 4096
*/
__u64 label;
};
/**
* struct drm_panthor_set_user_mmio_offset - Arguments passed to
* DRM_IOCTL_PANTHOR_SET_USER_MMIO_OFFSET
*
* This ioctl is only really useful if you want to support userspace
* CPU emulation environments where the size of an unsigned long differs
* between the host and the guest architectures.
*/
struct drm_panthor_set_user_mmio_offset {
/**
* @offset: User MMIO offset to use.
*
* Must be either DRM_PANTHOR_USER_MMIO_OFFSET_32BIT or
* DRM_PANTHOR_USER_MMIO_OFFSET_64BIT.
*
* Use DRM_PANTHOR_USER_MMIO_OFFSET (which selects OFFSET_32BIT or
* OFFSET_64BIT based on the size of an unsigned long) unless you
* have a very good reason to overrule this decision.
*/
__u64 offset;
};
/**
* DRM_IOCTL_PANTHOR() - Build a Panthor IOCTL number
* @__access: Access type. Must be R, W or RW.
* @__id: One of the DRM_PANTHOR_xxx id.
* @__type: Suffix of the type being passed to the IOCTL.
*
* Don't use this macro directly, use the DRM_IOCTL_PANTHOR_xxx
* values instead.
*
* Return: An IOCTL number to be passed to ioctl() from userspace.
*/
#define DRM_IOCTL_PANTHOR(__access, __id, __type) \
DRM_IO ## __access(DRM_COMMAND_BASE + DRM_PANTHOR_ ## __id, \
struct drm_panthor_ ## __type)
enum {
DRM_IOCTL_PANTHOR_DEV_QUERY =
DRM_IOCTL_PANTHOR(WR, DEV_QUERY, dev_query),
DRM_IOCTL_PANTHOR_VM_CREATE =
DRM_IOCTL_PANTHOR(WR, VM_CREATE, vm_create),
DRM_IOCTL_PANTHOR_VM_DESTROY =
DRM_IOCTL_PANTHOR(WR, VM_DESTROY, vm_destroy),
DRM_IOCTL_PANTHOR_VM_BIND =
DRM_IOCTL_PANTHOR(WR, VM_BIND, vm_bind),
DRM_IOCTL_PANTHOR_VM_GET_STATE =
DRM_IOCTL_PANTHOR(WR, VM_GET_STATE, vm_get_state),
DRM_IOCTL_PANTHOR_BO_CREATE =
DRM_IOCTL_PANTHOR(WR, BO_CREATE, bo_create),
DRM_IOCTL_PANTHOR_BO_MMAP_OFFSET =
DRM_IOCTL_PANTHOR(WR, BO_MMAP_OFFSET, bo_mmap_offset),
DRM_IOCTL_PANTHOR_GROUP_CREATE =
DRM_IOCTL_PANTHOR(WR, GROUP_CREATE, group_create),
DRM_IOCTL_PANTHOR_GROUP_DESTROY =
DRM_IOCTL_PANTHOR(WR, GROUP_DESTROY, group_destroy),
DRM_IOCTL_PANTHOR_GROUP_SUBMIT =
DRM_IOCTL_PANTHOR(WR, GROUP_SUBMIT, group_submit),
DRM_IOCTL_PANTHOR_GROUP_GET_STATE =
DRM_IOCTL_PANTHOR(WR, GROUP_GET_STATE, group_get_state),
DRM_IOCTL_PANTHOR_TILER_HEAP_CREATE =
DRM_IOCTL_PANTHOR(WR, TILER_HEAP_CREATE, tiler_heap_create),
DRM_IOCTL_PANTHOR_TILER_HEAP_DESTROY =
DRM_IOCTL_PANTHOR(WR, TILER_HEAP_DESTROY, tiler_heap_destroy),
DRM_IOCTL_PANTHOR_BO_SET_LABEL =
DRM_IOCTL_PANTHOR(WR, BO_SET_LABEL, bo_set_label),
DRM_IOCTL_PANTHOR_SET_USER_MMIO_OFFSET =
DRM_IOCTL_PANTHOR(WR, SET_USER_MMIO_OFFSET, set_user_mmio_offset),
};
#if defined(__cplusplus)
}
#endif

2
lib/libc/include/any-linux-any/drm/qaic_accel.h vendored
View File

@ -64,7 +64,7 @@ struct qaic_manage_trans_hdr {
/**
* struct qaic_manage_trans_passthrough - Defines a passthrough transaction.
* @hdr: In. Header to identify this transaction.
* @data: In. Payload of this ransaction. Opaque to the driver. Userspace must
* @data: In. Payload of this transaction. Opaque to the driver. Userspace must
* encode in little endian and align/pad to 64-bit.
*/
struct qaic_manage_trans_passthrough {

18
lib/libc/include/any-linux-any/drm/v3d_drm.h vendored
View File

@ -43,6 +43,7 @@ extern "C" {
#define DRM_V3D_PERFMON_GET_VALUES 0x0a
#define DRM_V3D_SUBMIT_CPU 0x0b
#define DRM_V3D_PERFMON_GET_COUNTER 0x0c
#define DRM_V3D_PERFMON_SET_GLOBAL 0x0d
#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
@ -61,6 +62,8 @@ extern "C" {
#define DRM_IOCTL_V3D_SUBMIT_CPU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CPU, struct drm_v3d_submit_cpu)
#define DRM_IOCTL_V3D_PERFMON_GET_COUNTER DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_COUNTER, \
struct drm_v3d_perfmon_get_counter)
#define DRM_IOCTL_V3D_PERFMON_SET_GLOBAL DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_PERFMON_SET_GLOBAL, \
struct drm_v3d_perfmon_set_global)
#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE 0x01
#define DRM_V3D_SUBMIT_EXTENSION 0x02
@ -766,6 +769,21 @@ struct drm_v3d_perfmon_get_counter {
__u8 reserved[7];
};
#define DRM_V3D_PERFMON_CLEAR_GLOBAL 0x0001
/**
* struct drm_v3d_perfmon_set_global - ioctl to define a global performance
* monitor
*
* The global performance monitor will be used for all jobs. If a global
* performance monitor is defined, jobs with a self-defined performance
* monitor won't be allowed.
*/
struct drm_v3d_perfmon_set_global {
__u32 flags;
__u32 id;
};
#if defined(__cplusplus)
}
#endif

6
lib/libc/include/any-linux-any/drm/virtgpu_drm.h vendored
View File

@ -163,6 +163,12 @@ struct drm_virtgpu_3d_wait {
__u32 flags;
};
#define VIRTGPU_DRM_CAPSET_VIRGL 1
#define VIRTGPU_DRM_CAPSET_VIRGL2 2
#define VIRTGPU_DRM_CAPSET_GFXSTREAM_VULKAN 3
#define VIRTGPU_DRM_CAPSET_VENUS 4
#define VIRTGPU_DRM_CAPSET_CROSS_DOMAIN 5
#define VIRTGPU_DRM_CAPSET_DRM 6
struct drm_virtgpu_get_caps {
__u32 cap_set_id;
__u32 cap_set_ver;

263
lib/libc/include/any-linux-any/drm/xe_drm.h vendored
View File

@ -393,6 +393,10 @@ struct drm_xe_query_mem_regions {
*
* - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device
* has usable VRAM
* - %DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY - Flag is set if the device
* has low latency hint support
* - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
* device has CPU address mirroring support
* - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
* required by this device, typically SZ_4K or SZ_64K
* - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
@ -409,6 +413,8 @@ struct drm_xe_query_config {
#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
#define DRM_XE_QUERY_CONFIG_FLAGS 1
#define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)
#define DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY (1 << 1)
#define DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR (1 << 2)
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
@ -629,6 +635,39 @@ struct drm_xe_query_uc_fw_version {
__u64 reserved;
};
/**
* struct drm_xe_query_pxp_status - query if PXP is ready
*
* If PXP is enabled and no fatal error has occurred, the status will be set to
* one of the following values:
* 0: PXP init still in progress
* 1: PXP init complete
*
* If PXP is not enabled or something has gone wrong, the query will be failed
* with one of the following error codes:
* -ENODEV: PXP not supported or disabled;
* -EIO: fatal error occurred during init, so PXP will never be enabled;
* -EINVAL: incorrect value provided as part of the query;
* -EFAULT: error copying the memory between kernel and userspace.
*
* The status can only be 0 in the first few seconds after driver load. If
* everything works as expected, the status will transition to init complete in
* less than 1 second, while in case of errors the driver might take longer to
* start returning an error code, but it should still take less than 10 seconds.
*
* The supported session type bitmask is based on the values in
* enum drm_xe_pxp_session_type. TYPE_NONE is always supported and therefore
* is not reported in the bitmask.
*
*/
struct drm_xe_query_pxp_status {
/** @status: current PXP status */
__u32 status;
/** @supported_session_types: bitmask of supported PXP session types */
__u32 supported_session_types;
};
/**
* struct drm_xe_device_query - Input of &DRM_IOCTL_XE_DEVICE_QUERY - main
* structure to query device information
@ -648,6 +687,7 @@ struct drm_xe_query_uc_fw_version {
* attributes.
* - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY
* - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES
* - %DRM_XE_DEVICE_QUERY_PXP_STATUS
*
* If size is set to 0, the driver fills it with the required size for
* the requested type of data to query. If size is equal to the required
@ -700,6 +740,8 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
#define DRM_XE_DEVICE_QUERY_OA_UNITS 8
#define DRM_XE_DEVICE_QUERY_PXP_STATUS 9
#define DRM_XE_DEVICE_QUERY_EU_STALL 10
/** @query: The type of data to query */
__u32 query;
@ -743,8 +785,23 @@ struct drm_xe_device_query {
* - %DRM_XE_GEM_CPU_CACHING_WC - Allocate the pages as write-combined. This
* is uncached. Scanout surfaces should likely use this. All objects
* that can be placed in VRAM must use this.
*
* This ioctl supports setting the following properties via the
* %DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY extension, which uses the
* generic @drm_xe_ext_set_property struct:
*
* - %DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE - set the type of PXP session
* this object will be used with. Valid values are listed in enum
* drm_xe_pxp_session_type. %DRM_XE_PXP_TYPE_NONE is the default behavior, so
* there is no need to explicitly set that. Objects used with session of type
* %DRM_XE_PXP_TYPE_HWDRM will be marked as invalid if a PXP invalidation
* event occurs after their creation. Attempting to flip an invalid object
* will cause a black frame to be displayed instead. Submissions with invalid
* objects mapped in the VM will be rejected.
*/
struct drm_xe_gem_create {
#define DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY 0
#define DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@ -811,6 +868,32 @@ struct drm_xe_gem_create {
/**
* struct drm_xe_gem_mmap_offset - Input of &DRM_IOCTL_XE_GEM_MMAP_OFFSET
*
* The @flags can be:
* - %DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER - For user to query special offset
* for use in mmap ioctl. Writing to the returned mmap address will generate a
* PCI memory barrier with low overhead (avoiding IOCTL call as well as writing
* to VRAM which would also add overhead), acting like an MI_MEM_FENCE
* instruction.
*
* Note: The mmap size can be at most 4K, due to HW limitations. As a result
* this interface is only supported on CPU architectures that support 4K page
* size. The mmap_offset ioctl will detect this and gracefully return an
* error, where userspace is expected to have a different fallback method for
* triggering a barrier.
*
* Roughly the usage would be as follows:
*
* .. code-block:: C
*
* struct drm_xe_gem_mmap_offset mmo = {
* .handle = 0, // must be set to 0
* .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
* };
*
* err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);
* map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
* map[i] = 0xdeadbeaf; // issue barrier
*/
struct drm_xe_gem_mmap_offset {
/** @extensions: Pointer to the first extension struct, if any */
@ -819,7 +902,8 @@ struct drm_xe_gem_mmap_offset {
/** @handle: Handle for the object being mapped. */
__u32 handle;
/** @flags: Must be zero */
#define DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER (1 << 0)
/** @flags: Flags */
__u32 flags;
/** @offset: The fake offset to use for subsequent mmap call */
@ -833,13 +917,17 @@ struct drm_xe_gem_mmap_offset {
* struct drm_xe_vm_create - Input of &DRM_IOCTL_XE_VM_CREATE
*
* The @flags can be:
* - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE
* - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE - Map the whole virtual address
* space of the VM to scratch page. A vm_bind would overwrite the scratch
* page mapping. This flag is mutually exclusive with the
* %DRM_XE_VM_CREATE_FLAG_FAULT_MODE flag, with an exception of on x2 and
* xe3 platform.
* - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts
* exec submissions to its exec_queues that don't have an upper time
* limit on the job execution time. But exec submissions to these
* don't allow any of the flags DRM_XE_SYNC_FLAG_SYNCOBJ,
* DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ, DRM_XE_SYNC_FLAG_DMA_BUF,
* used as out-syncobjs, that is, together with DRM_XE_SYNC_FLAG_SIGNAL.
* don't allow any of the sync types DRM_XE_SYNC_TYPE_SYNCOBJ,
* DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ, used as out-syncobjs, that is,
* together with sync flag DRM_XE_SYNC_FLAG_SIGNAL.
* LR VMs can be created in recoverable page-fault mode using
* DRM_XE_VM_CREATE_FLAG_FAULT_MODE, if the device supports it.
* If that flag is omitted, the UMD can not rely on the slightly
@ -906,6 +994,15 @@ struct drm_xe_vm_destroy {
* will only be valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
* handle MBZ, and the BO offset MBZ. This flag is intended to
* implement VK sparse bindings.
* - %DRM_XE_VM_BIND_FLAG_CHECK_PXP - If the object is encrypted via PXP,
* reject the binding if the encryption key is no longer valid. This
* flag has no effect on BOs that are not marked as using PXP.
* - %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR - When the CPU address mirror flag is
* set, no mappings are created rather the range is reserved for CPU address
* mirroring which will be populated on GPU page faults or prefetches. Only
* valid on VMs with DRM_XE_VM_CREATE_FLAG_FAULT_MODE set. The CPU address
* mirror flag are only valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
* handle MBZ, and the BO offset MBZ.
*/
struct drm_xe_vm_bind_op {
/** @extensions: Pointer to the first extension struct, if any */
@ -958,7 +1055,9 @@ struct drm_xe_vm_bind_op {
* on the @pat_index. For such mappings there is no actual memory being
* mapped (the address in the PTE is invalid), so the various PAT memory
* attributes likely do not apply. Simply leaving as zero is one
* option (still a valid pat_index).
* option (still a valid pat_index). Same applies to
* DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR bindings as for such mapping
* there is no actual memory being mapped.
*/
__u16 pat_index;
@ -974,6 +1073,14 @@ struct drm_xe_vm_bind_op {
/** @userptr: user pointer to bind on */
__u64 userptr;
/**
* @cpu_addr_mirror_offset: Offset from GPU @addr to create
* CPU address mirror mappings. MBZ with current level of
* support (e.g. 1 to 1 mapping between GPU and CPU mappings
* only supported).
*/
__s64 cpu_addr_mirror_offset;
};
/**
@ -996,6 +1103,8 @@ struct drm_xe_vm_bind_op {
#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 1)
#define DRM_XE_VM_BIND_FLAG_NULL (1 << 2)
#define DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3)
#define DRM_XE_VM_BIND_FLAG_CHECK_PXP (1 << 4)
#define DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR (1 << 5)
/** @flags: Bind flags */
__u32 flags;
@ -1087,6 +1196,29 @@ struct drm_xe_vm_bind {
/**
* struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
*
* This ioctl supports setting the following properties via the
* %DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY extension, which uses the
* generic @drm_xe_ext_set_property struct:
*
* - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY - set the queue priority.
* CAP_SYS_NICE is required to set a value above normal.
* - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE - set the queue timeslice
* duration in microseconds.
* - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE - set the type of PXP session
* this queue will be used with. Valid values are listed in enum
* drm_xe_pxp_session_type. %DRM_XE_PXP_TYPE_NONE is the default behavior, so
* there is no need to explicitly set that. When a queue of type
* %DRM_XE_PXP_TYPE_HWDRM is created, the PXP default HWDRM session
* (%XE_PXP_HWDRM_DEFAULT_SESSION) will be started, if isn't already running.
* The user is expected to query the PXP status via the query ioctl (see
* %DRM_XE_DEVICE_QUERY_PXP_STATUS) and to wait for PXP to be ready before
* attempting to create a queue with this property. When a queue is created
* before PXP is ready, the ioctl will return -EBUSY if init is still in
* progress or -EIO if init failed.
* Given that going into a power-saving state kills PXP HWDRM sessions,
* runtime PM will be blocked while queues of this type are alive.
* All PXP queues will be killed if a PXP invalidation event occurs.
*
* The example below shows how to use @drm_xe_exec_queue_create to create
* a simple exec_queue (no parallel submission) of class
* &DRM_XE_ENGINE_CLASS_RENDER.
@ -1105,12 +1237,27 @@ struct drm_xe_vm_bind {
* };
* ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);
*
* Allow users to provide a hint to kernel for cases demanding low latency
* profile. Please note it will have impact on power consumption. User can
* indicate low latency hint with flag while creating exec queue as
* mentioned below,
*
* struct drm_xe_exec_queue_create exec_queue_create = {
* .flags = DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT,
* .extensions = 0,
* .vm_id = vm,
* .num_bb_per_exec = 1,
* .num_eng_per_bb = 1,
* .instances = to_user_pointer(&instance),
* };
* ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);
*
*/
struct drm_xe_exec_queue_create {
#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE 2
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@ -1123,7 +1270,8 @@ struct drm_xe_exec_queue_create {
/** @vm_id: VM to use for this exec queue */
__u32 vm_id;
/** @flags: MBZ */
#define DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT (1 << 0)
/** @flags: flags to use for this exec queue */
__u32 flags;
/** @exec_queue_id: Returned exec queue ID */
@ -1246,7 +1394,7 @@ struct drm_xe_sync {
/**
* @timeline_value: Input for the timeline sync object. Needs to be
* different than 0 when used with %DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ.
* different than 0 when used with %DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ.
*/
__u64 timeline_value;
@ -1397,6 +1545,8 @@ struct drm_xe_wait_user_fence {
enum drm_xe_observation_type {
/** @DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type */
DRM_XE_OBSERVATION_TYPE_OA,
/** @DRM_XE_OBSERVATION_TYPE_EU_STALL: EU stall sampling observation stream type */
DRM_XE_OBSERVATION_TYPE_EU_STALL,
};
/**
@ -1467,6 +1617,9 @@ enum drm_xe_oa_unit_type {
/** @DRM_XE_OA_UNIT_TYPE_OAM: OAM OA unit */
DRM_XE_OA_UNIT_TYPE_OAM,
/** @DRM_XE_OA_UNIT_TYPE_OAM_SAG: OAM_SAG OA unit */
DRM_XE_OA_UNIT_TYPE_OAM_SAG,
};
/**
@ -1488,6 +1641,7 @@ struct drm_xe_oa_unit {
#define DRM_XE_OA_CAPS_SYNCS (1 << 1)
#define DRM_XE_OA_CAPS_OA_BUFFER_SIZE (1 << 2)
#define DRM_XE_OA_CAPS_WAIT_NUM_REPORTS (1 << 3)
#define DRM_XE_OA_CAPS_OAM (1 << 4)
/** @oa_timestamp_freq: OA timestamp freq */
__u64 oa_timestamp_freq;
@ -1729,6 +1883,97 @@ struct drm_xe_oa_stream_info {
__u64 reserved[3];
};
/**
* enum drm_xe_pxp_session_type - Supported PXP session types.
*
* We currently only support HWDRM sessions, which are used for protected
* content that ends up being displayed, but the HW supports multiple types, so
* we might extend support in the future.
*/
enum drm_xe_pxp_session_type {
/** @DRM_XE_PXP_TYPE_NONE: PXP not used */
DRM_XE_PXP_TYPE_NONE = 0,
/**
* @DRM_XE_PXP_TYPE_HWDRM: HWDRM sessions are used for content that ends
* up on the display.
*/
DRM_XE_PXP_TYPE_HWDRM = 1,
};
/* ID of the protected content session managed by Xe when PXP is active */
#define DRM_XE_PXP_HWDRM_DEFAULT_SESSION 0xf
/**
* enum drm_xe_eu_stall_property_id - EU stall sampling input property ids.
*
* These properties are passed to the driver at open as a chain of
* @drm_xe_ext_set_property structures with @property set to these
* properties' enums and @value set to the corresponding values of these
* properties. @drm_xe_user_extension base.name should be set to
* @DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY.
*
* With the file descriptor obtained from open, user space must enable
* the EU stall stream fd with @DRM_XE_OBSERVATION_IOCTL_ENABLE before
* calling read(). EIO errno from read() indicates HW dropped data
* due to full buffer.
*/
enum drm_xe_eu_stall_property_id {
#define DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY 0
/**
* @DRM_XE_EU_STALL_PROP_GT_ID: @gt_id of the GT on which
* EU stall data will be captured.
*/
DRM_XE_EU_STALL_PROP_GT_ID = 1,
/**
* @DRM_XE_EU_STALL_PROP_SAMPLE_RATE: Sampling rate in
* GPU cycles from @sampling_rates in struct @drm_xe_query_eu_stall
*/
DRM_XE_EU_STALL_PROP_SAMPLE_RATE,
/**
* @DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS: Minimum number of
* EU stall data reports to be present in the kernel buffer
* before unblocking a blocked poll or read.
*/
DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS,
};
/**
* struct drm_xe_query_eu_stall - Information about EU stall sampling.
*
* If a query is made with a struct @drm_xe_device_query where .query
* is equal to @DRM_XE_DEVICE_QUERY_EU_STALL, then the reply uses
* struct @drm_xe_query_eu_stall in .data.
*/
struct drm_xe_query_eu_stall {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @capabilities: EU stall capabilities bit-mask */
__u64 capabilities;
#define DRM_XE_EU_STALL_CAPS_BASE (1 << 0)
/** @record_size: size of each EU stall data record */
__u64 record_size;
/** @per_xecore_buf_size: internal per XeCore buffer size */
__u64 per_xecore_buf_size;
/** @reserved: Reserved */
__u64 reserved[5];
/** @num_sampling_rates: Number of sampling rates in @sampling_rates array */
__u64 num_sampling_rates;
/**
* @sampling_rates: Flexible array of sampling rates
* sorted in the fastest to slowest order.
* Sampling rates are specified in GPU clock cycles.
*/
__u64 sampling_rates[];
};
#if defined(__cplusplus)
}
#endif

56
lib/libc/include/any-linux-any/fwctl/cxl.h vendored Normal file
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@ -0,0 +1,56 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (c) 2024-2025 Intel Corporation
*
* These are definitions for the mailbox command interface of CXL subsystem.
*/
#ifndef _FWCTL_CXL_H_
#define _FWCTL_CXL_H_
#include <linux/types.h>
#include <linux/stddef.h>
#include <cxl/features.h>
/**
* struct fwctl_rpc_cxl - ioctl(FWCTL_RPC) input for CXL
* @opcode: CXL mailbox command opcode
* @flags: Flags for the command (input).
* @op_size: Size of input payload.
* @reserved1: Reserved. Must be 0s.
* @get_sup_feats_in: Get Supported Features input
* @get_feat_in: Get Feature input
* @set_feat_in: Set Feature input
*/
struct fwctl_rpc_cxl {
__struct_group(fwctl_rpc_cxl_hdr, hdr, /* no attrs */,
__u32 opcode;
__u32 flags;
__u32 op_size;
__u32 reserved1;
);
union {
struct cxl_mbox_get_sup_feats_in get_sup_feats_in;
struct cxl_mbox_get_feat_in get_feat_in;
struct cxl_mbox_set_feat_in set_feat_in;
};
};
/**
* struct fwctl_rpc_cxl_out - ioctl(FWCTL_RPC) output for CXL
* @size: Size of the output payload
* @retval: Return value from device
* @get_sup_feats_out: Get Supported Features output
* @payload: raw byte stream of payload
*/
struct fwctl_rpc_cxl_out {
__struct_group(fwctl_rpc_cxl_out_hdr, hdr, /* no attrs */,
__u32 size;
__u32 retval;
);
union {
struct cxl_mbox_get_sup_feats_out get_sup_feats_out;
__DECLARE_FLEX_ARRAY(__u8, payload);
};
};
#endif

141
lib/libc/include/any-linux-any/fwctl/fwctl.h vendored Normal file
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@ -0,0 +1,141 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/* Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES.
*/
#ifndef _FWCTL_H
#define _FWCTL_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define FWCTL_TYPE 0x9A
/**
* DOC: General ioctl format
*
* The ioctl interface follows a general format to allow for extensibility. Each
* ioctl is passed a structure pointer as the argument providing the size of
* the structure in the first u32. The kernel checks that any structure space
* beyond what it understands is 0. This allows userspace to use the backward
* compatible portion while consistently using the newer, larger, structures.
*
* ioctls use a standard meaning for common errnos:
*
* - ENOTTY: The IOCTL number itself is not supported at all
* - E2BIG: The IOCTL number is supported, but the provided structure has
* non-zero in a part the kernel does not understand.
* - EOPNOTSUPP: The IOCTL number is supported, and the structure is
* understood, however a known field has a value the kernel does not
* understand or support.
* - EINVAL: Everything about the IOCTL was understood, but a field is not
* correct.
* - ENOMEM: Out of memory.
* - ENODEV: The underlying device has been hot-unplugged and the FD is
* orphaned.
*
* As well as additional errnos, within specific ioctls.
*/
enum {
FWCTL_CMD_BASE = 0,
FWCTL_CMD_INFO = 0,
FWCTL_CMD_RPC = 1,
};
enum fwctl_device_type {
FWCTL_DEVICE_TYPE_ERROR = 0,
FWCTL_DEVICE_TYPE_MLX5 = 1,
FWCTL_DEVICE_TYPE_CXL = 2,
FWCTL_DEVICE_TYPE_PDS = 4,
};
/**
* struct fwctl_info - ioctl(FWCTL_INFO)
* @size: sizeof(struct fwctl_info)
* @flags: Must be 0
* @out_device_type: Returns the type of the device from enum fwctl_device_type
* @device_data_len: On input the length of the out_device_data memory. On
* output the size of the kernel's device_data which may be larger or
* smaller than the input. Maybe 0 on input.
* @out_device_data: Pointer to a memory of device_data_len bytes. Kernel will
* fill the entire memory, zeroing as required.
*
* Returns basic information about this fwctl instance, particularly what driver
* is being used to define the device_data format.
*/
struct fwctl_info {
__u32 size;
__u32 flags;
__u32 out_device_type;
__u32 device_data_len;
__aligned_u64 out_device_data;
};
#define FWCTL_INFO _IO(FWCTL_TYPE, FWCTL_CMD_INFO)
/**
* enum fwctl_rpc_scope - Scope of access for the RPC
*
* Refer to fwctl.rst for a more detailed discussion of these scopes.
*/
enum fwctl_rpc_scope {
/**
* @FWCTL_RPC_CONFIGURATION: Device configuration access scope
*
* Read/write access to device configuration. When configuration
* is written to the device it remains in a fully supported state.
*/
FWCTL_RPC_CONFIGURATION = 0,
/**
* @FWCTL_RPC_DEBUG_READ_ONLY: Read only access to debug information
*
* Readable debug information. Debug information is compatible with
* kernel lockdown, and does not disclose any sensitive information. For
* instance exposing any encryption secrets from this information is
* forbidden.
*/
FWCTL_RPC_DEBUG_READ_ONLY = 1,
/**
* @FWCTL_RPC_DEBUG_WRITE: Writable access to lockdown compatible debug information
*
* Allows write access to data in the device which may leave a fully
* supported state. This is intended to permit intensive and possibly
* invasive debugging. This scope will taint the kernel.
*/
FWCTL_RPC_DEBUG_WRITE = 2,
/**
* @FWCTL_RPC_DEBUG_WRITE_FULL: Write access to all debug information
*
* Allows read/write access to everything. Requires CAP_SYS_RAW_IO, so
* it is not required to follow lockdown principals. If in doubt
* debugging should be placed in this scope. This scope will taint the
* kernel.
*/
FWCTL_RPC_DEBUG_WRITE_FULL = 3,
};
/**
* struct fwctl_rpc - ioctl(FWCTL_RPC)
* @size: sizeof(struct fwctl_rpc)
* @scope: One of enum fwctl_rpc_scope, required scope for the RPC
* @in_len: Length of the in memory
* @out_len: Length of the out memory
* @in: Request message in device specific format
* @out: Response message in device specific format
*
* Deliver a Remote Procedure Call to the device FW and return the response. The
* call's parameters and return are marshaled into linear buffers of memory. Any
* errno indicates that delivery of the RPC to the device failed. Return status
* originating in the device during a successful delivery must be encoded into
* out.
*
* The format of the buffers matches the out_device_type from FWCTL_INFO.
*/
struct fwctl_rpc {
__u32 size;
__u32 scope;
__u32 in_len;
__u32 out_len;
__aligned_u64 in;
__aligned_u64 out;
};
#define FWCTL_RPC _IO(FWCTL_TYPE, FWCTL_CMD_RPC)
#endif

36
lib/libc/include/any-linux-any/fwctl/mlx5.h vendored Normal file
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@ -0,0 +1,36 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES
*
* These are definitions for the command interface for mlx5 HW. mlx5 FW has a
* User Context mechanism which allows the FW to understand a security scope.
* FWCTL binds each FD to a FW user context and then places the User Context ID
* (UID) in each command header. The created User Context has a capability set
* that is appropriate for FWCTL's security model.
*
* Command formation should use a copy of the structs in mlx5_ifc.h following
* the Programmers Reference Manual. A open release is available here:
*
* https://network.nvidia.com/files/doc-2020/ethernet-adapters-programming-manual.pdf
*
* The device_type for this file is FWCTL_DEVICE_TYPE_MLX5.
*/
#ifndef _FWCTL_MLX5_H
#define _FWCTL_MLX5_H
#include <linux/types.h>
/**
* struct fwctl_info_mlx5 - ioctl(FWCTL_INFO) out_device_data
* @uid: The FW UID this FD is bound to. Each command header will force
* this value.
* @uctx_caps: The FW capabilities that are enabled for the uid.
*
* Return basic information about the FW interface available.
*/
struct fwctl_info_mlx5 {
__u32 uid;
__u32 uctx_caps;
};
#endif

62
lib/libc/include/any-linux-any/fwctl/pds.h vendored Normal file
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@ -0,0 +1,62 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/* Copyright(c) Advanced Micro Devices, Inc */
/*
* fwctl interface info for pds_fwctl
*/
#ifndef _FWCTL_PDS_H_
#define _FWCTL_PDS_H_
#include <linux/types.h>
/**
* struct fwctl_info_pds
* @uctx_caps: bitmap of firmware capabilities
*
* Return basic information about the FW interface available.
*/
struct fwctl_info_pds {
__u32 uctx_caps;
};
/**
* enum pds_fwctl_capabilities
* @PDS_FWCTL_QUERY_CAP: firmware can be queried for information
* @PDS_FWCTL_SEND_CAP: firmware can be sent commands
*/
enum pds_fwctl_capabilities {
PDS_FWCTL_QUERY_CAP = 0,
PDS_FWCTL_SEND_CAP,
};
/**
* struct fwctl_rpc_pds
* @in.op: requested operation code
* @in.ep: firmware endpoint to operate on
* @in.rsvd: reserved
* @in.len: length of payload data
* @in.payload: address of payload buffer
* @in: rpc in parameters
* @out.retval: operation result value
* @out.rsvd: reserved
* @out.len: length of result data buffer
* @out.payload: address of payload data buffer
* @out: rpc out parameters
*/
struct fwctl_rpc_pds {
struct {
__u32 op;
__u32 ep;
__u32 rsvd;
__u32 len;
__aligned_u64 payload;
} in;
struct {
__u32 retval;
__u32 rsvd[2];
__u32 len;
__aligned_u64 payload;
} out;
};
#endif /* _FWCTL_PDS_H_ */

5
lib/libc/include/any-linux-any/linux/audit.h vendored
View File

@ -33,7 +33,7 @@
* 1100 - 1199 user space trusted application messages
* 1200 - 1299 messages internal to the audit daemon
* 1300 - 1399 audit event messages
* 1400 - 1499 SE Linux use
* 1400 - 1499 access control messages
* 1500 - 1599 kernel LSPP events
* 1600 - 1699 kernel crypto events
* 1700 - 1799 kernel anomaly records
@ -146,6 +146,8 @@
#define AUDIT_IPE_ACCESS 1420 /* IPE denial or grant */
#define AUDIT_IPE_CONFIG_CHANGE 1421 /* IPE config change */
#define AUDIT_IPE_POLICY_LOAD 1422 /* IPE policy load */
#define AUDIT_LANDLOCK_ACCESS 1423 /* Landlock denial */
#define AUDIT_LANDLOCK_DOMAIN 1424 /* Landlock domain status */
#define AUDIT_FIRST_KERN_ANOM_MSG 1700
#define AUDIT_LAST_KERN_ANOM_MSG 1799
@ -161,6 +163,7 @@
#define AUDIT_INTEGRITY_RULE 1805 /* policy rule */
#define AUDIT_INTEGRITY_EVM_XATTR 1806 /* New EVM-covered xattr */
#define AUDIT_INTEGRITY_POLICY_RULE 1807 /* IMA policy rules */
#define AUDIT_INTEGRITY_USERSPACE 1808 /* Userspace enforced data integrity */
#define AUDIT_KERNEL 2000 /* Asynchronous audit record. NOT A REQUEST. */

18
lib/libc/include/any-linux-any/linux/batman_adv.h vendored
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@ -342,7 +342,7 @@ enum batadv_nl_attrs {
BATADV_ATTR_MCAST_FLAGS_PRIV,
/**
* @BATADV_ATTR_VLANID: VLAN id on top of soft interface
* @BATADV_ATTR_VLANID: VLAN id on top of mesh interface
*/
BATADV_ATTR_VLANID,
@ -380,7 +380,7 @@ enum batadv_nl_attrs {
/**
* @BATADV_ATTR_BRIDGE_LOOP_AVOIDANCE_ENABLED: whether the bridge loop
* avoidance feature is enabled. This feature detects and avoids loops
* between the mesh and devices bridged with the soft interface
* between the mesh and devices bridged with the mesh interface
*/
BATADV_ATTR_BRIDGE_LOOP_AVOIDANCE_ENABLED,
@ -509,7 +509,7 @@ enum batadv_nl_commands {
BATADV_CMD_UNSPEC,
/**
* @BATADV_CMD_GET_MESH: Get attributes from softif/mesh
* @BATADV_CMD_GET_MESH: Get attributes from mesh(if)
*/
BATADV_CMD_GET_MESH,
@ -535,7 +535,7 @@ enum batadv_nl_commands {
/**
* @BATADV_CMD_GET_HARDIF: Get attributes from a hardif of the
* current softif
* current mesh(if)
*/
BATADV_CMD_GET_HARDIF,
@ -591,25 +591,25 @@ enum batadv_nl_commands {
BATADV_CMD_GET_MCAST_FLAGS,
/**
* @BATADV_CMD_SET_MESH: Set attributes for softif/mesh
* @BATADV_CMD_SET_MESH: Set attributes for mesh(if)
*/
BATADV_CMD_SET_MESH,
/**
* @BATADV_CMD_SET_HARDIF: Set attributes for hardif of the
* current softif
* current mesh(if)
*/
BATADV_CMD_SET_HARDIF,
/**
* @BATADV_CMD_GET_VLAN: Get attributes from a VLAN of the
* current softif
* current mesh(if)
*/
BATADV_CMD_GET_VLAN,
/**
* @BATADV_CMD_SET_VLAN: Set attributes for VLAN of the
* current softif
* current mesh(if)
*/
BATADV_CMD_SET_VLAN,
@ -691,7 +691,7 @@ enum batadv_ifla_attrs {
*/
IFLA_BATADV_ALGO_NAME,
/* add attributes above here, update the policy in soft-interface.c */
/* add attributes above here, update the policy in mesh-interface.c */
/**
* @__IFLA_BATADV_MAX: internal use

8
lib/libc/include/any-linux-any/linux/bits.h vendored
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@ -4,13 +4,9 @@
#ifndef _LINUX_BITS_H
#define _LINUX_BITS_H
#define __GENMASK(h, l) \
(((~_UL(0)) - (_UL(1) << (l)) + 1) & \
(~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
#define __GENMASK(h, l) (((~_UL(0)) << (l)) & (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
#define __GENMASK_ULL(h, l) \
(((~_ULL(0)) - (_ULL(1) << (l)) + 1) & \
(~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
#define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
#define __GENMASK_U128(h, l) \
((_BIT128((h)) << 1) - (_BIT128(l)))

44
lib/libc/include/any-linux-any/linux/blk-crypto.h vendored Normal file
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@ -0,0 +1,44 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_BLK_CRYPTO_H
#define _LINUX_BLK_CRYPTO_H
#include <linux/ioctl.h>
#include <linux/types.h>
struct blk_crypto_import_key_arg {
/* Raw key (input) */
__u64 raw_key_ptr;
__u64 raw_key_size;
/* Long-term wrapped key blob (output) */
__u64 lt_key_ptr;
__u64 lt_key_size;
__u64 reserved[4];
};
struct blk_crypto_generate_key_arg {
/* Long-term wrapped key blob (output) */
__u64 lt_key_ptr;
__u64 lt_key_size;
__u64 reserved[4];
};
struct blk_crypto_prepare_key_arg {
/* Long-term wrapped key blob (input) */
__u64 lt_key_ptr;
__u64 lt_key_size;
/* Ephemerally-wrapped key blob (output) */
__u64 eph_key_ptr;
__u64 eph_key_size;
__u64 reserved[4];
};
/*
* These ioctls share the block device ioctl space; see uapi/linux/fs.h.
* 140-141 are reserved for future blk-crypto ioctls; any more than that would
* require an additional allocation from the block device ioctl space.
*/
#define BLKCRYPTOIMPORTKEY _IOWR(0x12, 137, struct blk_crypto_import_key_arg)
#define BLKCRYPTOGENERATEKEY _IOWR(0x12, 138, struct blk_crypto_generate_key_arg)
#define BLKCRYPTOPREPAREKEY _IOWR(0x12, 139, struct blk_crypto_prepare_key_arg)
#endif /* _LINUX_BLK_CRYPTO_H */

2
lib/libc/include/any-linux-any/linux/blktrace_api.h vendored
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@ -49,7 +49,7 @@ enum blktrace_act {
__BLK_TA_UNPLUG_TIMER, /* queue was unplugged by timer */
__BLK_TA_INSERT, /* insert request */
__BLK_TA_SPLIT, /* bio was split */
__BLK_TA_BOUNCE, /* bio was bounced */
__BLK_TA_BOUNCE, /* unused, was: bio was bounced */
__BLK_TA_REMAP, /* bio was remapped */
__BLK_TA_ABORT, /* request aborted */
__BLK_TA_DRV_DATA, /* driver-specific binary data */

119
lib/libc/include/any-linux-any/linux/bpf.h vendored
View File

@ -51,6 +51,9 @@
#define BPF_XCHG (0xe0 | BPF_FETCH) /* atomic exchange */
#define BPF_CMPXCHG (0xf0 | BPF_FETCH) /* atomic compare-and-write */
#define BPF_LOAD_ACQ 0x100 /* load-acquire */
#define BPF_STORE_REL 0x110 /* store-release */
enum bpf_cond_pseudo_jmp {
BPF_MAY_GOTO = 0,
};
@ -447,6 +450,7 @@ union bpf_iter_link_info {
* * **struct bpf_map_info**
* * **struct bpf_btf_info**
* * **struct bpf_link_info**
* * **struct bpf_token_info**
*
* Return
* Returns zero on success. On error, -1 is returned and *errno*
@ -903,6 +907,17 @@ union bpf_iter_link_info {
* A new file descriptor (a nonnegative integer), or -1 if an
* error occurred (in which case, *errno* is set appropriately).
*
* BPF_PROG_STREAM_READ_BY_FD
* Description
* Read data of a program's BPF stream. The program is identified
* by *prog_fd*, and the stream is identified by the *stream_id*.
* The data is copied to a buffer pointed to by *stream_buf*, and
* filled less than or equal to *stream_buf_len* bytes.
*
* Return
* Number of bytes read from the stream on success, or -1 if an
* error occurred (in which case, *errno* is set appropriately).
*
* NOTES
* eBPF objects (maps and programs) can be shared between processes.
*
@ -958,6 +973,7 @@ enum bpf_cmd {
BPF_LINK_DETACH,
BPF_PROG_BIND_MAP,
BPF_TOKEN_CREATE,
BPF_PROG_STREAM_READ_BY_FD,
__MAX_BPF_CMD,
};
@ -1207,6 +1223,7 @@ enum bpf_perf_event_type {
#define BPF_F_BEFORE (1U << 3)
#define BPF_F_AFTER (1U << 4)
#define BPF_F_ID (1U << 5)
#define BPF_F_PREORDER (1U << 6)
#define BPF_F_LINK BPF_F_LINK /* 1 << 13 */
/* If BPF_F_STRICT_ALIGNMENT is used in BPF_PROG_LOAD command, the
@ -1459,6 +1476,11 @@ struct bpf_stack_build_id {
#define BPF_OBJ_NAME_LEN 16U
enum {
BPF_STREAM_STDOUT = 1,
BPF_STREAM_STDERR = 2,
};
union bpf_attr {
struct { /* anonymous struct used by BPF_MAP_CREATE command */
__u32 map_type; /* one of enum bpf_map_type */
@ -1502,7 +1524,7 @@ union bpf_attr {
__s32 map_token_fd;
};
struct { /* anonymous struct used by BPF_MAP_*_ELEM commands */
struct { /* anonymous struct used by BPF_MAP_*_ELEM and BPF_MAP_FREEZE commands */
__u32 map_fd;
__aligned_u64 key;
union {
@ -1573,6 +1595,16 @@ union bpf_attr {
* If provided, prog_flags should have BPF_F_TOKEN_FD flag set.
*/
__s32 prog_token_fd;
/* The fd_array_cnt can be used to pass the length of the
* fd_array array. In this case all the [map] file descriptors
* passed in this array will be bound to the program, even if
* the maps are not referenced directly. The functionality is
* similar to the BPF_PROG_BIND_MAP syscall, but maps can be
* used by the verifier during the program load. If provided,
* then the fd_array[0,...,fd_array_cnt-1] is expected to be
* continuous.
*/
__u32 fd_array_cnt;
};
struct { /* anonymous struct used by BPF_OBJ_* commands */
@ -1638,6 +1670,7 @@ union bpf_attr {
};
__u32 next_id;
__u32 open_flags;
__s32 fd_by_id_token_fd;
};
struct { /* anonymous struct used by BPF_OBJ_GET_INFO_BY_FD */
@ -1779,6 +1812,13 @@ union bpf_attr {
};
__u64 expected_revision;
} netkit;
struct {
union {
__u32 relative_fd;
__u32 relative_id;
};
__u64 expected_revision;
} cgroup;
};
} link_create;
@ -1827,6 +1867,13 @@ union bpf_attr {
__u32 bpffs_fd;
} token_create;
struct {
__aligned_u64 stream_buf;
__u32 stream_buf_len;
__u32 stream_id;
__u32 prog_fd;
} prog_stream_read;
} __attribute__((aligned(8)));
/* The description below is an attempt at providing documentation to eBPF
@ -1980,11 +2027,15 @@ union bpf_attr {
* long bpf_skb_store_bytes(struct sk_buff *skb, u32 offset, const void *from, u32 len, u64 flags)
* Description
* Store *len* bytes from address *from* into the packet
* associated to *skb*, at *offset*. *flags* are a combination of
* **BPF_F_RECOMPUTE_CSUM** (automatically recompute the
* checksum for the packet after storing the bytes) and
* **BPF_F_INVALIDATE_HASH** (set *skb*\ **->hash**, *skb*\
* **->swhash** and *skb*\ **->l4hash** to 0).
* associated to *skb*, at *offset*. The *flags* are a combination
* of the following values:
*
* **BPF_F_RECOMPUTE_CSUM**
* Automatically update *skb*\ **->csum** after storing the
* bytes.
* **BPF_F_INVALIDATE_HASH**
* Set *skb*\ **->hash**, *skb*\ **->swhash** and *skb*\
* **->l4hash** to 0.
*
* A call to this helper is susceptible to change the underlying
* packet buffer. Therefore, at load time, all checks on pointers
@ -2036,7 +2087,8 @@ union bpf_attr {
* untouched (unless **BPF_F_MARK_ENFORCE** is added as well), and
* for updates resulting in a null checksum the value is set to
* **CSUM_MANGLED_0** instead. Flag **BPF_F_PSEUDO_HDR** indicates
* the checksum is to be computed against a pseudo-header.
* that the modified header field is part of the pseudo-header.
* Flag **BPF_F_IPV6** should be set for IPv6 packets.
*
* This helper works in combination with **bpf_csum_diff**\ (),
* which does not update the checksum in-place, but offers more
@ -2383,7 +2435,7 @@ union bpf_attr {
* into it. An example is available in file
* *samples/bpf/trace_output_user.c* in the Linux kernel source
* tree (the eBPF program counterpart is in
* *samples/bpf/trace_output_kern.c*).
* *samples/bpf/trace_output.bpf.c*).
*
* **bpf_perf_event_output**\ () achieves better performance
* than **bpf_trace_printk**\ () for sharing data with user
@ -4953,6 +5005,9 @@ union bpf_attr {
* the netns switch takes place from ingress to ingress without
* going through the CPU's backlog queue.
*
* *skb*\ **->mark** and *skb*\ **->tstamp** are not cleared during
* the netns switch.
*
* The *flags* argument is reserved and must be 0. The helper is
* currently only supported for tc BPF program types at the
* ingress hook and for veth and netkit target device types. The
@ -6009,7 +6064,10 @@ union bpf_attr {
FN(user_ringbuf_drain, 209, ##ctx) \
FN(cgrp_storage_get, 210, ##ctx) \
FN(cgrp_storage_delete, 211, ##ctx) \
/* */
/* This helper list is effectively frozen. If you are trying to \
* add a new helper, you should add a kfunc instead which has \
* less stability guarantees. See Documentation/bpf/kfuncs.rst \
*/
/* backwards-compatibility macros for users of __BPF_FUNC_MAPPER that don't
* know or care about integer value that is now passed as second argument
@ -6047,6 +6105,7 @@ enum {
BPF_F_PSEUDO_HDR = (1ULL << 4),
BPF_F_MARK_MANGLED_0 = (1ULL << 5),
BPF_F_MARK_ENFORCE = (1ULL << 6),
BPF_F_IPV6 = (1ULL << 7),
};
/* BPF_FUNC_skb_set_tunnel_key and BPF_FUNC_skb_get_tunnel_key flags. */
@ -6626,11 +6685,15 @@ struct bpf_link_info {
struct {
__aligned_u64 tp_name; /* in/out: tp_name buffer ptr */
__u32 tp_name_len; /* in/out: tp_name buffer len */
__u32 :32;
__u64 cookie;
} raw_tracepoint;
struct {
__u32 attach_type;
__u32 target_obj_id; /* prog_id for PROG_EXT, otherwise btf object id */
__u32 target_btf_id; /* BTF type id inside the object */
__u32 :32;
__u64 cookie;
} tracing;
struct {
__u64 cgroup_id;
@ -6702,6 +6765,7 @@ struct bpf_link_info {
__u32 name_len;
__u32 offset; /* offset from file_name */
__u64 cookie;
__u64 ref_ctr_offset;
} uprobe; /* BPF_PERF_EVENT_UPROBE, BPF_PERF_EVENT_URETPROBE */
struct {
__aligned_u64 func_name; /* in/out */
@ -6740,6 +6804,13 @@ struct bpf_link_info {
};
} __attribute__((aligned(8)));
struct bpf_token_info {
__u64 allowed_cmds;
__u64 allowed_maps;
__u64 allowed_progs;
__u64 allowed_attachs;
} __attribute__((aligned(8)));
/* User bpf_sock_addr struct to access socket fields and sockaddr struct passed
* by user and intended to be used by socket (e.g. to bind to, depends on
* attach type).
@ -6903,6 +6974,12 @@ enum {
BPF_SOCK_OPS_ALL_CB_FLAGS = 0x7F,
};
enum {
SK_BPF_CB_TX_TIMESTAMPING = 1<<0,
SK_BPF_CB_MASK = (SK_BPF_CB_TX_TIMESTAMPING - 1) |
SK_BPF_CB_TX_TIMESTAMPING
};
/* List of known BPF sock_ops operators.
* New entries can only be added at the end
*/
@ -7015,6 +7092,29 @@ enum {
* by the kernel or the
* earlier bpf-progs.
*/
BPF_SOCK_OPS_TSTAMP_SCHED_CB, /* Called when skb is passing
* through dev layer when
* SK_BPF_CB_TX_TIMESTAMPING
* feature is on.
*/
BPF_SOCK_OPS_TSTAMP_SND_SW_CB, /* Called when skb is about to send
* to the nic when SK_BPF_CB_TX_TIMESTAMPING
* feature is on.
*/
BPF_SOCK_OPS_TSTAMP_SND_HW_CB, /* Called in hardware phase when
* SK_BPF_CB_TX_TIMESTAMPING feature
* is on.
*/
BPF_SOCK_OPS_TSTAMP_ACK_CB, /* Called when all the skbs in the
* same sendmsg call are acked
* when SK_BPF_CB_TX_TIMESTAMPING
* feature is on.
*/
BPF_SOCK_OPS_TSTAMP_SENDMSG_CB, /* Called when every sendmsg syscall
* is triggered. It's used to correlate
* sendmsg timestamp with corresponding
* tskey.
*/
};
/* List of TCP states. There is a build check in net/ipv4/tcp.c to detect
@ -7081,6 +7181,7 @@ enum {
TCP_BPF_SYN_IP = 1006, /* Copy the IP[46] and TCP header */
TCP_BPF_SYN_MAC = 1007, /* Copy the MAC, IP[46], and TCP header */
TCP_BPF_SOCK_OPS_CB_FLAGS = 1008, /* Get or Set TCP sock ops flags */
SK_BPF_CB_FLAGS = 1009, /* Get or set sock ops flags in socket */
};
enum {

3
lib/libc/include/any-linux-any/linux/btf.h vendored
View File

@ -36,7 +36,8 @@ struct btf_type {
* bits 24-28: kind (e.g. int, ptr, array...etc)
* bits 29-30: unused
* bit 31: kind_flag, currently used by
* struct, union, enum, fwd and enum64
* struct, union, enum, fwd, enum64,
* decl_tag and type_tag
*/
__u32 info;
/* "size" is used by INT, ENUM, STRUCT, UNION, DATASEC and ENUM64.

19
lib/libc/include/any-linux-any/linux/btrfs.h vendored
View File

@ -613,7 +613,12 @@ struct btrfs_ioctl_clone_range_args {
*/
#define BTRFS_DEFRAG_RANGE_COMPRESS 1
#define BTRFS_DEFRAG_RANGE_START_IO 2
#define BTRFS_DEFRAG_RANGE_COMPRESS_LEVEL 4
/* Request no compression on the range (uncompress if necessary). */
#define BTRFS_DEFRAG_RANGE_NOCOMPRESS 8
#define BTRFS_DEFRAG_RANGE_FLAGS_SUPP (BTRFS_DEFRAG_RANGE_COMPRESS | \
BTRFS_DEFRAG_RANGE_COMPRESS_LEVEL | \
BTRFS_DEFRAG_RANGE_NOCOMPRESS | \
BTRFS_DEFRAG_RANGE_START_IO)
struct btrfs_ioctl_defrag_range_args {
@ -638,10 +643,18 @@ struct btrfs_ioctl_defrag_range_args {
/*
* which compression method to use if turning on compression
* for this defrag operation. If unspecified, zlib will
* be used
* for this defrag operation. If unspecified, zlib will be
* used. If compression level is also being specified, set the
* BTRFS_DEFRAG_RANGE_COMPRESS_LEVEL flag and fill the compress
* member structure instead of the compress_type field.
*/
__u32 compress_type;
union {
__u32 compress_type;
struct {
__u8 type;
__s8 level;
} compress;
};
/* spare for later */
__u32 unused[4];

3
lib/libc/include/any-linux-any/linux/can.h vendored
View File

@ -182,7 +182,7 @@ struct canfd_frame {
/*
* defined bits for canxl_frame.flags
*
* The canxl_frame.flags element contains two bits CANXL_XLF and CANXL_SEC
* The canxl_frame.flags element contains three bits CANXL_[XLF|SEC|RRS]
* and shares the relative position of the struct can[fd]_frame.len element.
* The CANXL_XLF bit ALWAYS needs to be set to indicate a valid CAN XL frame.
* As a side effect setting this bit intentionally breaks the length checks
@ -192,6 +192,7 @@ struct canfd_frame {
*/
#define CANXL_XLF 0x80 /* mandatory CAN XL frame flag (must always be set!) */
#define CANXL_SEC 0x01 /* Simple Extended Content (security/segmentation) */
#define CANXL_RRS 0x02 /* Remote Request Substitution */
/* the 8-bit VCID is optionally placed in the canxl_frame.prio element */
#define CANXL_VCID_OFFSET 16 /* bit offset of VCID in prio element */

6
lib/libc/include/any-linux-any/linux/capability.h vendored
View File

@ -6,9 +6,10 @@
* Alexander Kjeldaas <astor@guardian.no>
* with help from Aleph1, Roland Buresund and Andrew Main.
*
* See here for the libcap library ("POSIX draft" compliance):
* See here for the libcap2 library (compliant with Section 25 of
* the withdrawn POSIX 1003.1e Draft 17):
*
* ftp://www.kernel.org/pub/linux/libs/security/linux-privs/kernel-2.6/
* https://www.kernel.org/pub/linux/libs/security/linux-privs/libcap2/
*/
#ifndef _LINUX_CAPABILITY_H
@ -273,6 +274,7 @@ struct vfs_ns_cap_data {
/* Allow setting encryption key on loopback filesystem */
/* Allow setting zone reclaim policy */
/* Allow everything under CAP_BPF and CAP_PERFMON for backward compatibility */
/* Allow setting hardware protection emergency action */
#define CAP_SYS_ADMIN 21

40
lib/libc/include/any-linux-any/linux/cec-funcs.h vendored
View File

@ -14,7 +14,7 @@
static __inline__ void cec_msg_active_source(struct cec_msg *msg, __u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_ACTIVE_SOURCE;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@ -59,7 +59,7 @@ static __inline__ void cec_msg_request_active_source(struct cec_msg *msg,
int reply)
{
msg->len = 2;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REQUEST_ACTIVE_SOURCE;
msg->reply = reply ? CEC_MSG_ACTIVE_SOURCE : 0;
}
@ -68,7 +68,7 @@ static __inline__ void cec_msg_routing_information(struct cec_msg *msg,
__u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_ROUTING_INFORMATION;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@ -86,7 +86,7 @@ static __inline__ void cec_msg_routing_change(struct cec_msg *msg,
__u16 new_phys_addr)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_ROUTING_CHANGE;
msg->msg[2] = orig_phys_addr >> 8;
msg->msg[3] = orig_phys_addr & 0xff;
@ -106,7 +106,7 @@ static __inline__ void cec_ops_routing_change(const struct cec_msg *msg,
static __inline__ void cec_msg_set_stream_path(struct cec_msg *msg, __u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_SET_STREAM_PATH;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@ -791,7 +791,7 @@ static __inline__ void cec_msg_report_physical_addr(struct cec_msg *msg,
__u16 phys_addr, __u8 prim_devtype)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REPORT_PHYSICAL_ADDR;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@ -817,7 +817,7 @@ static __inline__ void cec_msg_set_menu_language(struct cec_msg *msg,
const char *language)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_SET_MENU_LANGUAGE;
memcpy(msg->msg + 2, language, 3);
}
@ -850,7 +850,7 @@ static __inline__ void cec_msg_report_features(struct cec_msg *msg,
__u8 rc_profile, __u8 dev_features)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REPORT_FEATURES;
msg->msg[2] = cec_version;
msg->msg[3] = all_device_types;
@ -1092,7 +1092,7 @@ static __inline__ void cec_msg_tuner_step_increment(struct cec_msg *msg)
static __inline__ void cec_msg_device_vendor_id(struct cec_msg *msg, __u32 vendor_id)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_DEVICE_VENDOR_ID;
msg->msg[2] = vendor_id >> 16;
msg->msg[3] = (vendor_id >> 8) & 0xff;
@ -1655,7 +1655,7 @@ static __inline__ void cec_msg_report_current_latency(struct cec_msg *msg,
__u8 audio_out_delay)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REPORT_CURRENT_LATENCY;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@ -1687,7 +1687,7 @@ static __inline__ void cec_msg_request_current_latency(struct cec_msg *msg,
__u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REQUEST_CURRENT_LATENCY;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@ -1707,7 +1707,7 @@ static __inline__ void cec_msg_cdc_hec_inquire_state(struct cec_msg *msg,
__u16 phys_addr2)
{
msg->len = 9;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_INQUIRE_STATE;
@ -1737,7 +1737,7 @@ static __inline__ void cec_msg_cdc_hec_report_state(struct cec_msg *msg,
__u16 hec_field)
{
msg->len = has_field ? 10 : 8;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_REPORT_STATE;
@ -1782,7 +1782,7 @@ static __inline__ void cec_msg_cdc_hec_set_state(struct cec_msg *msg,
__u16 phys_addr5)
{
msg->len = 10;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_INQUIRE_STATE;
@ -1832,7 +1832,7 @@ static __inline__ void cec_msg_cdc_hec_set_state_adjacent(struct cec_msg *msg,
__u8 hec_set_state)
{
msg->len = 8;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_SET_STATE_ADJACENT;
@ -1857,7 +1857,7 @@ static __inline__ void cec_msg_cdc_hec_request_deactivation(struct cec_msg *msg,
__u16 phys_addr3)
{
msg->len = 11;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_REQUEST_DEACTIVATION;
@ -1884,7 +1884,7 @@ static __inline__ void cec_ops_cdc_hec_request_deactivation(const struct cec_msg
static __inline__ void cec_msg_cdc_hec_notify_alive(struct cec_msg *msg)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_NOTIFY_ALIVE;
@ -1899,7 +1899,7 @@ static __inline__ void cec_ops_cdc_hec_notify_alive(const struct cec_msg *msg,
static __inline__ void cec_msg_cdc_hec_discover(struct cec_msg *msg)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_DISCOVER;
@ -1916,7 +1916,7 @@ static __inline__ void cec_msg_cdc_hpd_set_state(struct cec_msg *msg,
__u8 hpd_state)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HPD_SET_STATE;
@ -1938,7 +1938,7 @@ static __inline__ void cec_msg_cdc_hpd_report_state(struct cec_msg *msg,
__u8 hpd_error)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HPD_REPORT_STATE;

2
lib/libc/include/any-linux-any/linux/const.h vendored
View File

@ -33,7 +33,7 @@
* Missing __asm__ support
*
* __BIT128() would not work in the __asm__ code, as it shifts an
* 'unsigned __init128' data type as direct representation of
* 'unsigned __int128' data type as direct representation of
* 128 bit constants is not supported in the gcc compiler, as
* they get silently truncated.
*

104
lib/libc/include/any-linux-any/linux/coredump.h vendored Normal file
View File

@ -0,0 +1,104 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_COREDUMP_H
#define _LINUX_COREDUMP_H
#include <linux/types.h>
/**
* coredump_{req,ack} flags
* @COREDUMP_KERNEL: kernel writes coredump
* @COREDUMP_USERSPACE: userspace writes coredump
* @COREDUMP_REJECT: don't generate coredump
* @COREDUMP_WAIT: wait for coredump server
*/
enum {
COREDUMP_KERNEL = (1ULL << 0),
COREDUMP_USERSPACE = (1ULL << 1),
COREDUMP_REJECT = (1ULL << 2),
COREDUMP_WAIT = (1ULL << 3),
};
/**
* struct coredump_req - message kernel sends to userspace
* @size: size of struct coredump_req
* @size_ack: known size of struct coredump_ack on this kernel
* @mask: supported features
*
* When a coredump happens the kernel will connect to the coredump
* socket and send a coredump request to the coredump server. The @size
* member is set to the size of struct coredump_req and provides a hint
* to userspace how much data can be read. Userspace may use MSG_PEEK to
* peek the size of struct coredump_req and then choose to consume it in
* one go. Userspace may also simply read a COREDUMP_ACK_SIZE_VER0
* request. If the size the kernel sends is larger userspace simply
* discards any remaining data.
*
* The coredump_req->mask member is set to the currently know features.
* Userspace may only set coredump_ack->mask to the bits raised by the
* kernel in coredump_req->mask.
*
* The coredump_req->size_ack member is set by the kernel to the size of
* struct coredump_ack the kernel knows. Userspace may only send up to
* coredump_req->size_ack bytes to the kernel and must set
* coredump_ack->size accordingly.
*/
struct coredump_req {
__u32 size;
__u32 size_ack;
__u64 mask;
};
enum {
COREDUMP_REQ_SIZE_VER0 = 16U, /* size of first published struct */
};
/**
* struct coredump_ack - message userspace sends to kernel
* @size: size of the struct
* @spare: unused
* @mask: features kernel is supposed to use
*
* The @size member must be set to the size of struct coredump_ack. It
* may never exceed what the kernel returned in coredump_req->size_ack
* but it may of course be smaller (>= COREDUMP_ACK_SIZE_VER0 and <=
* coredump_req->size_ack).
*
* The @mask member must be set to the features the coredump server
* wants the kernel to use. Only bits the kernel returned in
* coredump_req->mask may be set.
*/
struct coredump_ack {
__u32 size;
__u32 spare;
__u64 mask;
};
enum {
COREDUMP_ACK_SIZE_VER0 = 16U, /* size of first published struct */
};
/**
* enum coredump_mark - Markers for the coredump socket
*
* The kernel will place a single byte on the coredump socket. The
* markers notify userspace whether the coredump ack succeeded or
* failed.
*
* @COREDUMP_MARK_MINSIZE: the provided coredump_ack size was too small
* @COREDUMP_MARK_MAXSIZE: the provided coredump_ack size was too big
* @COREDUMP_MARK_UNSUPPORTED: the provided coredump_ack mask was invalid
* @COREDUMP_MARK_CONFLICTING: the provided coredump_ack mask has conflicting options
* @COREDUMP_MARK_REQACK: the coredump request and ack was successful
* @__COREDUMP_MARK_MAX: the maximum coredump mark value
*/
enum coredump_mark {
COREDUMP_MARK_REQACK = 0U,
COREDUMP_MARK_MINSIZE = 1U,
COREDUMP_MARK_MAXSIZE = 2U,
COREDUMP_MARK_UNSUPPORTED = 3U,
COREDUMP_MARK_CONFLICTING = 4U,
__COREDUMP_MARK_MAX = (1U << 31),
};
#endif /* _LINUX_COREDUMP_H */

2
lib/libc/include/any-linux-any/linux/counter.h vendored
View File

@ -65,6 +65,8 @@ enum counter_event_type {
COUNTER_EVENT_CHANGE_OF_STATE,
/* Count value captured */
COUNTER_EVENT_CAPTURE,
/* Direction change detected */
COUNTER_EVENT_DIRECTION_CHANGE,
};
/**

40
lib/libc/include/any-linux-any/linux/counter/microchip-tcb-capture.h vendored Normal file
View File

@ -0,0 +1,40 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Channel numbers used by the microchip-tcb-capture driver
* Copyright (C) 2025 Bence Csókás
*/
#ifndef _COUNTER_MCHP_TCB_H_
#define _COUNTER_MCHP_TCB_H_
/*
* The driver defines the following components:
*
* Count 0
* \__ Synapse 0 -- Signal 0 (Channel A, i.e. TIOA)
* \__ Synapse 1 -- Signal 1 (Channel B, i.e. TIOB)
* \__ Extension capture0 (RA register)
* \__ Extension capture1 (RB register)
*
* It also supports the following events:
*
* Channel 0:
* - CV register changed
* - CV overflowed
* - RA captured
* Channel 1:
* - RB captured
* Channel 2:
* - RC compare triggered
*/
/* Capture extensions */
#define COUNTER_MCHP_EXCAP_RA 0
#define COUNTER_MCHP_EXCAP_RB 1
/* Event channels */
#define COUNTER_MCHP_EVCHN_CV 0
#define COUNTER_MCHP_EVCHN_RA 0
#define COUNTER_MCHP_EVCHN_RB 1
#define COUNTER_MCHP_EVCHN_RC 2
#endif /* _COUNTER_MCHP_TCB_H_ */

31
lib/libc/include/any-linux-any/linux/devlink.h vendored
View File

@ -221,6 +221,11 @@ enum devlink_port_flavour {
*/
};
/* IEEE 802.1Qaz standard supported values. */
#define DEVLINK_RATE_TCS_MAX 8
#define DEVLINK_RATE_TC_INDEX_MAX (DEVLINK_RATE_TCS_MAX - 1)
enum devlink_rate_type {
DEVLINK_RATE_TYPE_LEAF,
DEVLINK_RATE_TYPE_NODE,
@ -385,6 +390,21 @@ enum devlink_linecard_state {
DEVLINK_LINECARD_STATE_MAX = __DEVLINK_LINECARD_STATE_MAX - 1
};
/* Variable attribute type. */
enum devlink_var_attr_type {
/* Following values relate to the internal NLA_* values */
DEVLINK_VAR_ATTR_TYPE_U8 = 1,
DEVLINK_VAR_ATTR_TYPE_U16,
DEVLINK_VAR_ATTR_TYPE_U32,
DEVLINK_VAR_ATTR_TYPE_U64,
DEVLINK_VAR_ATTR_TYPE_STRING,
DEVLINK_VAR_ATTR_TYPE_FLAG,
DEVLINK_VAR_ATTR_TYPE_NUL_STRING = 10,
DEVLINK_VAR_ATTR_TYPE_BINARY,
__DEVLINK_VAR_ATTR_TYPE_CUSTOM_BASE = 0x80,
/* Any possible custom types, unrelated to NLA_* values go below */
};
enum devlink_attr {
/* don't change the order or add anything between, this is ABI! */
DEVLINK_ATTR_UNSPEC,
@ -614,6 +634,8 @@ enum devlink_attr {
DEVLINK_ATTR_REGION_DIRECT, /* flag */
DEVLINK_ATTR_RATE_TC_BWS, /* nested */
/* Add new attributes above here, update the spec in
* Documentation/netlink/specs/devlink.yaml and re-generate
* net/devlink/netlink_gen.c.
@ -623,6 +645,15 @@ enum devlink_attr {
DEVLINK_ATTR_MAX = __DEVLINK_ATTR_MAX - 1
};
enum devlink_rate_tc_attr {
DEVLINK_RATE_TC_ATTR_UNSPEC,
DEVLINK_RATE_TC_ATTR_INDEX, /* u8 */
DEVLINK_RATE_TC_ATTR_BW, /* u32 */
__DEVLINK_RATE_TC_ATTR_MAX,
DEVLINK_RATE_TC_ATTR_MAX = __DEVLINK_RATE_TC_ATTR_MAX - 1
};
/* Mapping between internal resource described by the field and system
* structure
*/

9
lib/libc/include/any-linux-any/linux/dm-ioctl.h vendored
View File

@ -258,10 +258,12 @@ enum {
DM_DEV_SET_GEOMETRY_CMD,
DM_DEV_ARM_POLL_CMD,
DM_GET_TARGET_VERSION_CMD,
DM_MPATH_PROBE_PATHS_CMD,
};
#define DM_IOCTL 0xfd
/* Control device ioctls */
#define DM_VERSION _IOWR(DM_IOCTL, DM_VERSION_CMD, struct dm_ioctl)
#define DM_REMOVE_ALL _IOWR(DM_IOCTL, DM_REMOVE_ALL_CMD, struct dm_ioctl)
#define DM_LIST_DEVICES _IOWR(DM_IOCTL, DM_LIST_DEVICES_CMD, struct dm_ioctl)
@ -285,10 +287,13 @@ enum {
#define DM_TARGET_MSG _IOWR(DM_IOCTL, DM_TARGET_MSG_CMD, struct dm_ioctl)
#define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
/* Block device ioctls */
#define DM_MPATH_PROBE_PATHS _IO(DM_IOCTL, DM_MPATH_PROBE_PATHS_CMD)
#define DM_VERSION_MAJOR 4
#define DM_VERSION_MINOR 48
#define DM_VERSION_MINOR 50
#define DM_VERSION_PATCHLEVEL 0
#define DM_VERSION_EXTRA "-ioctl (2023-03-01)"
#define DM_VERSION_EXTRA "-ioctl (2025-04-28)"
/* Status bits */
#define DM_READONLY_FLAG (1 << 0) /* In/Out */

13
lib/libc/include/any-linux-any/linux/dpll.h vendored
View File

@ -192,6 +192,17 @@ enum dpll_pin_capabilities {
#define DPLL_PHASE_OFFSET_DIVIDER 1000
/**
* enum dpll_feature_state - Allow control (enable/disable) and status checking
* over features.
* @DPLL_FEATURE_STATE_DISABLE: feature shall be disabled
* @DPLL_FEATURE_STATE_ENABLE: feature shall be enabled
*/
enum dpll_feature_state {
DPLL_FEATURE_STATE_DISABLE,
DPLL_FEATURE_STATE_ENABLE,
};
enum dpll_a {
DPLL_A_ID = 1,
DPLL_A_MODULE_NAME,
@ -204,6 +215,7 @@ enum dpll_a {
DPLL_A_TYPE,
DPLL_A_LOCK_STATUS_ERROR,
DPLL_A_CLOCK_QUALITY_LEVEL,
DPLL_A_PHASE_OFFSET_MONITOR,
__DPLL_A_MAX,
DPLL_A_MAX = (__DPLL_A_MAX - 1)
@ -237,6 +249,7 @@ enum dpll_a_pin {
DPLL_A_PIN_ESYNC_FREQUENCY,
DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED,
DPLL_A_PIN_ESYNC_PULSE,
DPLL_A_PIN_REFERENCE_SYNC,
__DPLL_A_PIN_MAX,
DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1)

137
lib/libc/include/any-linux-any/linux/elf.h vendored
View File

@ -11,6 +11,7 @@ typedef __u16 Elf32_Half;
typedef __u32 Elf32_Off;
typedef __s32 Elf32_Sword;
typedef __u32 Elf32_Word;
typedef __u16 Elf32_Versym;
/* 64-bit ELF base types. */
typedef __u64 Elf64_Addr;
@ -21,6 +22,7 @@ typedef __s32 Elf64_Sword;
typedef __u32 Elf64_Word;
typedef __u64 Elf64_Xword;
typedef __s64 Elf64_Sxword;
typedef __u16 Elf64_Versym;
/* These constants are for the segment types stored in the image headers */
#define PT_NULL 0
@ -107,6 +109,7 @@ typedef __s64 Elf64_Sxword;
#define DT_VALRNGLO 0x6ffffd00
#define DT_VALRNGHI 0x6ffffdff
#define DT_ADDRRNGLO 0x6ffffe00
#define DT_GNU_HASH 0x6ffffef5
#define DT_ADDRRNGHI 0x6ffffeff
#define DT_VERSYM 0x6ffffff0
#define DT_RELACOUNT 0x6ffffff9
@ -125,6 +128,8 @@ typedef __s64 Elf64_Sxword;
#define STB_GLOBAL 1
#define STB_WEAK 2
#define STN_UNDEF 0
#define STT_NOTYPE 0
#define STT_OBJECT 1
#define STT_FUNC 2
@ -133,6 +138,9 @@ typedef __s64 Elf64_Sxword;
#define STT_COMMON 5
#define STT_TLS 6
#define VER_FLG_BASE 0x1
#define VER_FLG_WEAK 0x2
#define ELF_ST_BIND(x) ((x) >> 4)
#define ELF_ST_TYPE(x) ((x) & 0xf)
#define ELF32_ST_BIND(x) ELF_ST_BIND(x)
@ -291,8 +299,18 @@ typedef struct elf64_phdr {
#define SHF_WRITE 0x1
#define SHF_ALLOC 0x2
#define SHF_EXECINSTR 0x4
#define SHF_MERGE 0x10
#define SHF_STRINGS 0x20
#define SHF_INFO_LINK 0x40
#define SHF_LINK_ORDER 0x80
#define SHF_OS_NONCONFORMING 0x100
#define SHF_GROUP 0x200
#define SHF_TLS 0x400
#define SHF_RELA_LIVEPATCH 0x00100000
#define SHF_RO_AFTER_INIT 0x00200000
#define SHF_ORDERED 0x04000000
#define SHF_EXCLUDE 0x08000000
#define SHF_MASKOS 0x0ff00000
#define SHF_MASKPROC 0xf0000000
/* special section indexes */
@ -368,101 +386,180 @@ typedef struct elf64_shdr {
#define ELF_OSABI ELFOSABI_NONE
#endif
/* Note definitions: NN_ defines names. NT_ defines types. */
#define NN_GNU_PROPERTY_TYPE_0 "GNU"
#define NT_GNU_PROPERTY_TYPE_0 5
/*
* Notes used in ET_CORE. Architectures export some of the arch register sets
* using the corresponding note types via the PTRACE_GETREGSET and
* PTRACE_SETREGSET requests.
* The note name for these types is "LINUX", except NT_PRFPREG that is named
* "CORE".
*/
#define NN_PRSTATUS "CORE"
#define NT_PRSTATUS 1
#define NN_PRFPREG "CORE"
#define NT_PRFPREG 2
#define NN_PRPSINFO "CORE"
#define NT_PRPSINFO 3
#define NN_TASKSTRUCT "CORE"
#define NT_TASKSTRUCT 4
#define NN_AUXV "CORE"
#define NT_AUXV 6
/*
* Note to userspace developers: size of NT_SIGINFO note may increase
* in the future to accomodate more fields, don't assume it is fixed!
*/
#define NN_SIGINFO "CORE"
#define NT_SIGINFO 0x53494749
#define NN_FILE "CORE"
#define NT_FILE 0x46494c45
#define NN_PRXFPREG "LINUX"
#define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */
#define NN_PPC_VMX "LINUX"
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
#define NN_PPC_SPE "LINUX"
#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
#define NN_PPC_VSX "LINUX"
#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
#define NN_PPC_TAR "LINUX"
#define NT_PPC_TAR 0x103 /* Target Address Register */
#define NN_PPC_PPR "LINUX"
#define NT_PPC_PPR 0x104 /* Program Priority Register */
#define NN_PPC_DSCR "LINUX"
#define NT_PPC_DSCR 0x105 /* Data Stream Control Register */
#define NN_PPC_EBB "LINUX"
#define NT_PPC_EBB 0x106 /* Event Based Branch Registers */
#define NN_PPC_PMU "LINUX"
#define NT_PPC_PMU 0x107 /* Performance Monitor Registers */
#define NN_PPC_TM_CGPR "LINUX"
#define NT_PPC_TM_CGPR 0x108 /* TM checkpointed GPR Registers */
#define NN_PPC_TM_CFPR "LINUX"
#define NT_PPC_TM_CFPR 0x109 /* TM checkpointed FPR Registers */
#define NN_PPC_TM_CVMX "LINUX"
#define NT_PPC_TM_CVMX 0x10a /* TM checkpointed VMX Registers */
#define NN_PPC_TM_CVSX "LINUX"
#define NT_PPC_TM_CVSX 0x10b /* TM checkpointed VSX Registers */
#define NN_PPC_TM_SPR "LINUX"
#define NT_PPC_TM_SPR 0x10c /* TM Special Purpose Registers */
#define NN_PPC_TM_CTAR "LINUX"
#define NT_PPC_TM_CTAR 0x10d /* TM checkpointed Target Address Register */
#define NN_PPC_TM_CPPR "LINUX"
#define NT_PPC_TM_CPPR 0x10e /* TM checkpointed Program Priority Register */
#define NN_PPC_TM_CDSCR "LINUX"
#define NT_PPC_TM_CDSCR 0x10f /* TM checkpointed Data Stream Control Register */
#define NN_PPC_PKEY "LINUX"
#define NT_PPC_PKEY 0x110 /* Memory Protection Keys registers */
#define NN_PPC_DEXCR "LINUX"
#define NT_PPC_DEXCR 0x111 /* PowerPC DEXCR registers */
#define NN_PPC_HASHKEYR "LINUX"
#define NT_PPC_HASHKEYR 0x112 /* PowerPC HASHKEYR register */
#define NN_386_TLS "LINUX"
#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */
#define NN_386_IOPERM "LINUX"
#define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */
#define NN_X86_XSTATE "LINUX"
#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */
/* Old binutils treats 0x203 as a CET state */
#define NN_X86_SHSTK "LINUX"
#define NT_X86_SHSTK 0x204 /* x86 SHSTK state */
#define NN_X86_XSAVE_LAYOUT "LINUX"
#define NT_X86_XSAVE_LAYOUT 0x205 /* XSAVE layout description */
#define NN_S390_HIGH_GPRS "LINUX"
#define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */
#define NN_S390_TIMER "LINUX"
#define NT_S390_TIMER 0x301 /* s390 timer register */
#define NN_S390_TODCMP "LINUX"
#define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */
#define NN_S390_TODPREG "LINUX"
#define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */
#define NN_S390_CTRS "LINUX"
#define NT_S390_CTRS 0x304 /* s390 control registers */
#define NN_S390_PREFIX "LINUX"
#define NT_S390_PREFIX 0x305 /* s390 prefix register */
#define NN_S390_LAST_BREAK "LINUX"
#define NT_S390_LAST_BREAK 0x306 /* s390 breaking event address */
#define NN_S390_SYSTEM_CALL "LINUX"
#define NT_S390_SYSTEM_CALL 0x307 /* s390 system call restart data */
#define NN_S390_TDB "LINUX"
#define NT_S390_TDB 0x308 /* s390 transaction diagnostic block */
#define NN_S390_VXRS_LOW "LINUX"
#define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 upper half */
#define NN_S390_VXRS_HIGH "LINUX"
#define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
#define NN_S390_GS_CB "LINUX"
#define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */
#define NN_S390_GS_BC "LINUX"
#define NT_S390_GS_BC 0x30c /* s390 guarded storage broadcast control block */
#define NN_S390_RI_CB "LINUX"
#define NT_S390_RI_CB 0x30d /* s390 runtime instrumentation */
#define NN_S390_PV_CPU_DATA "LINUX"
#define NT_S390_PV_CPU_DATA 0x30e /* s390 protvirt cpu dump data */
#define NN_ARM_VFP "LINUX"
#define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */
#define NN_ARM_TLS "LINUX"
#define NT_ARM_TLS 0x401 /* ARM TLS register */
#define NN_ARM_HW_BREAK "LINUX"
#define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
#define NN_ARM_HW_WATCH "LINUX"
#define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
#define NN_ARM_SYSTEM_CALL "LINUX"
#define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
#define NN_ARM_SVE "LINUX"
#define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension registers */
#define NN_ARM_PAC_MASK "LINUX"
#define NT_ARM_PAC_MASK 0x406 /* ARM pointer authentication code masks */
#define NN_ARM_PACA_KEYS "LINUX"
#define NT_ARM_PACA_KEYS 0x407 /* ARM pointer authentication address keys */
#define NN_ARM_PACG_KEYS "LINUX"
#define NT_ARM_PACG_KEYS 0x408 /* ARM pointer authentication generic key */
#define NN_ARM_TAGGED_ADDR_CTRL "LINUX"
#define NT_ARM_TAGGED_ADDR_CTRL 0x409 /* arm64 tagged address control (prctl()) */
#define NN_ARM_PAC_ENABLED_KEYS "LINUX"
#define NT_ARM_PAC_ENABLED_KEYS 0x40a /* arm64 ptr auth enabled keys (prctl()) */
#define NN_ARM_SSVE "LINUX"
#define NT_ARM_SSVE 0x40b /* ARM Streaming SVE registers */
#define NN_ARM_ZA "LINUX"
#define NT_ARM_ZA 0x40c /* ARM SME ZA registers */
#define NN_ARM_ZT "LINUX"
#define NT_ARM_ZT 0x40d /* ARM SME ZT registers */
#define NN_ARM_FPMR "LINUX"
#define NT_ARM_FPMR 0x40e /* ARM floating point mode register */
#define NN_ARM_POE "LINUX"
#define NT_ARM_POE 0x40f /* ARM POE registers */
#define NN_ARM_GCS "LINUX"
#define NT_ARM_GCS 0x410 /* ARM GCS state */
#define NN_ARC_V2 "LINUX"
#define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */
#define NN_VMCOREDD "LINUX"
#define NT_VMCOREDD 0x700 /* Vmcore Device Dump Note */
#define NN_MIPS_DSP "LINUX"
#define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
#define NN_MIPS_FP_MODE "LINUX"
#define NT_MIPS_FP_MODE 0x801 /* MIPS floating-point mode */
#define NN_MIPS_MSA "LINUX"
#define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
#define NN_RISCV_CSR "LINUX"
#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */
#define NN_RISCV_VECTOR "LINUX"
#define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
#define NN_RISCV_TAGGED_ADDR_CTRL "LINUX"
#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */
#define NN_LOONGARCH_CPUCFG "LINUX"
#define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
#define NN_LOONGARCH_CSR "LINUX"
#define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
#define NN_LOONGARCH_LSX "LINUX"
#define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */
#define NN_LOONGARCH_LASX "LINUX"
#define NT_LOONGARCH_LASX 0xa03 /* LoongArch Loongson Advanced SIMD Extension registers */
#define NN_LOONGARCH_LBT "LINUX"
#define NT_LOONGARCH_LBT 0xa04 /* LoongArch Loongson Binary Translation registers */
#define NN_LOONGARCH_HW_BREAK "LINUX"
#define NT_LOONGARCH_HW_BREAK 0xa05 /* LoongArch hardware breakpoint registers */
#define NN_LOONGARCH_HW_WATCH "LINUX"
#define NT_LOONGARCH_HW_WATCH 0xa06 /* LoongArch hardware watchpoint registers */
/* Note types with note name "GNU" */
#define NT_GNU_PROPERTY_TYPE_0 5
/* Note header in a PT_NOTE section */
typedef struct elf32_note {
Elf32_Word n_namesz; /* Name size */
@ -483,4 +580,34 @@ typedef struct elf64_note {
/* Bits for GNU_PROPERTY_AARCH64_FEATURE_1_BTI */
#define GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1U << 0)
typedef struct {
Elf32_Half vd_version;
Elf32_Half vd_flags;
Elf32_Half vd_ndx;
Elf32_Half vd_cnt;
Elf32_Word vd_hash;
Elf32_Word vd_aux;
Elf32_Word vd_next;
} Elf32_Verdef;
typedef struct {
Elf64_Half vd_version;
Elf64_Half vd_flags;
Elf64_Half vd_ndx;
Elf64_Half vd_cnt;
Elf64_Word vd_hash;
Elf64_Word vd_aux;
Elf64_Word vd_next;
} Elf64_Verdef;
typedef struct {
Elf32_Word vda_name;
Elf32_Word vda_next;
} Elf32_Verdaux;
typedef struct {
Elf64_Word vda_name;
Elf64_Word vda_next;
} Elf64_Verdaux;
#endif /* _LINUX_ELF_H */

1
lib/libc/include/any-linux-any/linux/errqueue.h vendored
View File

@ -69,6 +69,7 @@ enum {
SCM_TSTAMP_SND, /* driver passed skb to NIC, or HW */
SCM_TSTAMP_SCHED, /* data entered the packet scheduler */
SCM_TSTAMP_ACK, /* data acknowledged by peer */
SCM_TSTAMP_COMPLETION, /* packet tx completion */
};
#endif /* _LINUX_ERRQUEUE_H */

152
lib/libc/include/any-linux-any/linux/ethtool.h vendored
View File

@ -679,6 +679,8 @@ enum ethtool_link_ext_substate_module {
* @ETH_SS_STATS_ETH_MAC: names of IEEE 802.3 MAC statistics
* @ETH_SS_STATS_ETH_CTRL: names of IEEE 802.3 MAC Control statistics
* @ETH_SS_STATS_RMON: names of RMON statistics
* @ETH_SS_STATS_PHY: names of PHY(dev) statistics
* @ETH_SS_TS_FLAGS: hardware timestamping flags
*
* @ETH_SS_COUNT: number of defined string sets
*/
@ -704,6 +706,8 @@ enum ethtool_stringset {
ETH_SS_STATS_ETH_MAC,
ETH_SS_STATS_ETH_CTRL,
ETH_SS_STATS_RMON,
ETH_SS_STATS_PHY,
ETH_SS_TS_FLAGS,
/* add new constants above here */
ETH_SS_COUNT
@ -2053,6 +2057,24 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_10baseT1S_Half_BIT = 100,
ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT = 101,
ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT = 102,
ETHTOOL_LINK_MODE_200000baseCR_Full_BIT = 103,
ETHTOOL_LINK_MODE_200000baseKR_Full_BIT = 104,
ETHTOOL_LINK_MODE_200000baseDR_Full_BIT = 105,
ETHTOOL_LINK_MODE_200000baseDR_2_Full_BIT = 106,
ETHTOOL_LINK_MODE_200000baseSR_Full_BIT = 107,
ETHTOOL_LINK_MODE_200000baseVR_Full_BIT = 108,
ETHTOOL_LINK_MODE_400000baseCR2_Full_BIT = 109,
ETHTOOL_LINK_MODE_400000baseKR2_Full_BIT = 110,
ETHTOOL_LINK_MODE_400000baseDR2_Full_BIT = 111,
ETHTOOL_LINK_MODE_400000baseDR2_2_Full_BIT = 112,
ETHTOOL_LINK_MODE_400000baseSR2_Full_BIT = 113,
ETHTOOL_LINK_MODE_400000baseVR2_Full_BIT = 114,
ETHTOOL_LINK_MODE_800000baseCR4_Full_BIT = 115,
ETHTOOL_LINK_MODE_800000baseKR4_Full_BIT = 116,
ETHTOOL_LINK_MODE_800000baseDR4_Full_BIT = 117,
ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT = 118,
ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT = 119,
ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT = 120,
/* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS
@ -2265,73 +2287,81 @@ static __inline__ int ethtool_validate_duplex(__u8 duplex)
* be exploited to reduce the RSS queue spread.
*/
#define RXH_XFRM_SYM_XOR (1 << 0)
/* Similar to SYM_XOR, except that one copy of the XOR'ed fields is replaced by
* an OR of the same fields
*/
#define RXH_XFRM_SYM_OR_XOR (1 << 1)
#define RXH_XFRM_NO_CHANGE 0xff
/* L2-L4 network traffic flow types */
#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */
#define SCTP_V4_FLOW 0x03 /* hash or spec (sctp_ip4_spec) */
#define AH_ESP_V4_FLOW 0x04 /* hash only */
#define TCP_V6_FLOW 0x05 /* hash or spec (tcp_ip6_spec; nfc only) */
#define UDP_V6_FLOW 0x06 /* hash or spec (udp_ip6_spec; nfc only) */
#define SCTP_V6_FLOW 0x07 /* hash or spec (sctp_ip6_spec; nfc only) */
#define AH_ESP_V6_FLOW 0x08 /* hash only */
#define AH_V4_FLOW 0x09 /* hash or spec (ah_ip4_spec) */
#define ESP_V4_FLOW 0x0a /* hash or spec (esp_ip4_spec) */
#define AH_V6_FLOW 0x0b /* hash or spec (ah_ip6_spec; nfc only) */
#define ESP_V6_FLOW 0x0c /* hash or spec (esp_ip6_spec; nfc only) */
#define IPV4_USER_FLOW 0x0d /* spec only (usr_ip4_spec) */
#define IP_USER_FLOW IPV4_USER_FLOW
#define IPV6_USER_FLOW 0x0e /* spec only (usr_ip6_spec; nfc only) */
#define IPV4_FLOW 0x10 /* hash only */
#define IPV6_FLOW 0x11 /* hash only */
#define ETHER_FLOW 0x12 /* spec only (ether_spec) */
enum {
/* L2-L4 network traffic flow types */
TCP_V4_FLOW = 0x01, /* hash or spec (tcp_ip4_spec) */
UDP_V4_FLOW = 0x02, /* hash or spec (udp_ip4_spec) */
SCTP_V4_FLOW = 0x03, /* hash or spec (sctp_ip4_spec) */
AH_ESP_V4_FLOW = 0x04, /* hash only */
TCP_V6_FLOW = 0x05, /* hash or spec (tcp_ip6_spec; nfc only) */
UDP_V6_FLOW = 0x06, /* hash or spec (udp_ip6_spec; nfc only) */
SCTP_V6_FLOW = 0x07, /* hash or spec (sctp_ip6_spec; nfc only) */
AH_ESP_V6_FLOW = 0x08, /* hash only */
AH_V4_FLOW = 0x09, /* hash or spec (ah_ip4_spec) */
ESP_V4_FLOW = 0x0a, /* hash or spec (esp_ip4_spec) */
AH_V6_FLOW = 0x0b, /* hash or spec (ah_ip6_spec; nfc only) */
ESP_V6_FLOW = 0x0c, /* hash or spec (esp_ip6_spec; nfc only) */
IPV4_USER_FLOW = 0x0d, /* spec only (usr_ip4_spec) */
IP_USER_FLOW = IPV4_USER_FLOW,
IPV6_USER_FLOW = 0x0e, /* spec only (usr_ip6_spec; nfc only) */
IPV4_FLOW = 0x10, /* hash only */
IPV6_FLOW = 0x11, /* hash only */
ETHER_FLOW = 0x12, /* hash or spec (ether_spec) */
/* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes
* elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE.
*/
#define GTPU_V4_FLOW 0x13 /* hash only */
#define GTPU_V6_FLOW 0x14 /* hash only */
/* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes
* elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE.
*/
GTPU_V4_FLOW = 0x13, /* hash only */
GTPU_V6_FLOW = 0x14, /* hash only */
/* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication
* to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request).
*/
#define GTPC_V4_FLOW 0x15 /* hash only */
#define GTPC_V6_FLOW 0x16 /* hash only */
/* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication
* to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request).
*/
GTPC_V4_FLOW = 0x15, /* hash only */
GTPC_V6_FLOW = 0x16, /* hash only */
/* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover.
*/
#define GTPC_TEID_V4_FLOW 0x17 /* hash only */
#define GTPC_TEID_V6_FLOW 0x18 /* hash only */
/* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover.
*/
GTPC_TEID_V4_FLOW = 0x17, /* hash only */
GTPC_TEID_V6_FLOW = 0x18, /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed.
*/
#define GTPU_EH_V4_FLOW 0x19 /* hash only */
#define GTPU_EH_V6_FLOW 0x1a /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed.
*/
GTPU_EH_V4_FLOW = 0x19, /* hash only */
GTPU_EH_V6_FLOW = 0x1a, /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets.
* The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc.
*/
#define GTPU_UL_V4_FLOW 0x1b /* hash only */
#define GTPU_UL_V6_FLOW 0x1c /* hash only */
#define GTPU_DL_V4_FLOW 0x1d /* hash only */
#define GTPU_DL_V6_FLOW 0x1e /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets.
* The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc.
*/
GTPU_UL_V4_FLOW = 0x1b, /* hash only */
GTPU_UL_V6_FLOW = 0x1c, /* hash only */
GTPU_DL_V4_FLOW = 0x1d, /* hash only */
GTPU_DL_V6_FLOW = 0x1e, /* hash only */
__FLOW_TYPE_COUNT,
};
/* Flag to enable additional fields in struct ethtool_rx_flow_spec */
#define FLOW_EXT 0x80000000
@ -2339,7 +2369,7 @@ static __inline__ int ethtool_validate_duplex(__u8 duplex)
/* Flag to enable RSS spreading of traffic matching rule (nfc only) */
#define FLOW_RSS 0x20000000
/* L3-L4 network traffic flow hash options */
/* L2-L4 network traffic flow hash options */
#define RXH_L2DA (1 << 1)
#define RXH_VLAN (1 << 2)
#define RXH_L3_PROTO (1 << 3)

905
lib/libc/include/any-linux-any/linux/ethtool_netlink.h vendored
View File

@ -10,545 +10,12 @@
#define _LINUX_ETHTOOL_NETLINK_H_
#include <linux/ethtool.h>
/* message types - userspace to kernel */
enum {
ETHTOOL_MSG_USER_NONE,
ETHTOOL_MSG_STRSET_GET,
ETHTOOL_MSG_LINKINFO_GET,
ETHTOOL_MSG_LINKINFO_SET,
ETHTOOL_MSG_LINKMODES_GET,
ETHTOOL_MSG_LINKMODES_SET,
ETHTOOL_MSG_LINKSTATE_GET,
ETHTOOL_MSG_DEBUG_GET,
ETHTOOL_MSG_DEBUG_SET,
ETHTOOL_MSG_WOL_GET,
ETHTOOL_MSG_WOL_SET,
ETHTOOL_MSG_FEATURES_GET,
ETHTOOL_MSG_FEATURES_SET,
ETHTOOL_MSG_PRIVFLAGS_GET,
ETHTOOL_MSG_PRIVFLAGS_SET,
ETHTOOL_MSG_RINGS_GET,
ETHTOOL_MSG_RINGS_SET,
ETHTOOL_MSG_CHANNELS_GET,
ETHTOOL_MSG_CHANNELS_SET,
ETHTOOL_MSG_COALESCE_GET,
ETHTOOL_MSG_COALESCE_SET,
ETHTOOL_MSG_PAUSE_GET,
ETHTOOL_MSG_PAUSE_SET,
ETHTOOL_MSG_EEE_GET,
ETHTOOL_MSG_EEE_SET,
ETHTOOL_MSG_TSINFO_GET,
ETHTOOL_MSG_CABLE_TEST_ACT,
ETHTOOL_MSG_CABLE_TEST_TDR_ACT,
ETHTOOL_MSG_TUNNEL_INFO_GET,
ETHTOOL_MSG_FEC_GET,
ETHTOOL_MSG_FEC_SET,
ETHTOOL_MSG_MODULE_EEPROM_GET,
ETHTOOL_MSG_STATS_GET,
ETHTOOL_MSG_PHC_VCLOCKS_GET,
ETHTOOL_MSG_MODULE_GET,
ETHTOOL_MSG_MODULE_SET,
ETHTOOL_MSG_PSE_GET,
ETHTOOL_MSG_PSE_SET,
ETHTOOL_MSG_RSS_GET,
ETHTOOL_MSG_PLCA_GET_CFG,
ETHTOOL_MSG_PLCA_SET_CFG,
ETHTOOL_MSG_PLCA_GET_STATUS,
ETHTOOL_MSG_MM_GET,
ETHTOOL_MSG_MM_SET,
ETHTOOL_MSG_MODULE_FW_FLASH_ACT,
ETHTOOL_MSG_PHY_GET,
/* add new constants above here */
__ETHTOOL_MSG_USER_CNT,
ETHTOOL_MSG_USER_MAX = __ETHTOOL_MSG_USER_CNT - 1
};
/* message types - kernel to userspace */
enum {
ETHTOOL_MSG_KERNEL_NONE,
ETHTOOL_MSG_STRSET_GET_REPLY,
ETHTOOL_MSG_LINKINFO_GET_REPLY,
ETHTOOL_MSG_LINKINFO_NTF,
ETHTOOL_MSG_LINKMODES_GET_REPLY,
ETHTOOL_MSG_LINKMODES_NTF,
ETHTOOL_MSG_LINKSTATE_GET_REPLY,
ETHTOOL_MSG_DEBUG_GET_REPLY,
ETHTOOL_MSG_DEBUG_NTF,
ETHTOOL_MSG_WOL_GET_REPLY,
ETHTOOL_MSG_WOL_NTF,
ETHTOOL_MSG_FEATURES_GET_REPLY,
ETHTOOL_MSG_FEATURES_SET_REPLY,
ETHTOOL_MSG_FEATURES_NTF,
ETHTOOL_MSG_PRIVFLAGS_GET_REPLY,
ETHTOOL_MSG_PRIVFLAGS_NTF,
ETHTOOL_MSG_RINGS_GET_REPLY,
ETHTOOL_MSG_RINGS_NTF,
ETHTOOL_MSG_CHANNELS_GET_REPLY,
ETHTOOL_MSG_CHANNELS_NTF,
ETHTOOL_MSG_COALESCE_GET_REPLY,
ETHTOOL_MSG_COALESCE_NTF,
ETHTOOL_MSG_PAUSE_GET_REPLY,
ETHTOOL_MSG_PAUSE_NTF,
ETHTOOL_MSG_EEE_GET_REPLY,
ETHTOOL_MSG_EEE_NTF,
ETHTOOL_MSG_TSINFO_GET_REPLY,
ETHTOOL_MSG_CABLE_TEST_NTF,
ETHTOOL_MSG_CABLE_TEST_TDR_NTF,
ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY,
ETHTOOL_MSG_FEC_GET_REPLY,
ETHTOOL_MSG_FEC_NTF,
ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY,
ETHTOOL_MSG_STATS_GET_REPLY,
ETHTOOL_MSG_PHC_VCLOCKS_GET_REPLY,
ETHTOOL_MSG_MODULE_GET_REPLY,
ETHTOOL_MSG_MODULE_NTF,
ETHTOOL_MSG_PSE_GET_REPLY,
ETHTOOL_MSG_RSS_GET_REPLY,
ETHTOOL_MSG_PLCA_GET_CFG_REPLY,
ETHTOOL_MSG_PLCA_GET_STATUS_REPLY,
ETHTOOL_MSG_PLCA_NTF,
ETHTOOL_MSG_MM_GET_REPLY,
ETHTOOL_MSG_MM_NTF,
ETHTOOL_MSG_MODULE_FW_FLASH_NTF,
ETHTOOL_MSG_PHY_GET_REPLY,
ETHTOOL_MSG_PHY_NTF,
/* add new constants above here */
__ETHTOOL_MSG_KERNEL_CNT,
ETHTOOL_MSG_KERNEL_MAX = __ETHTOOL_MSG_KERNEL_CNT - 1
};
/* request header */
enum ethtool_header_flags {
ETHTOOL_FLAG_COMPACT_BITSETS = 1 << 0, /* use compact bitsets in reply */
ETHTOOL_FLAG_OMIT_REPLY = 1 << 1, /* provide optional reply for SET or ACT requests */
ETHTOOL_FLAG_STATS = 1 << 2, /* request statistics, if supported by the driver */
};
#include <linux/ethtool_netlink_generated.h>
#define ETHTOOL_FLAG_ALL (ETHTOOL_FLAG_COMPACT_BITSETS | \
ETHTOOL_FLAG_OMIT_REPLY | \
ETHTOOL_FLAG_STATS)
enum {
ETHTOOL_A_HEADER_UNSPEC,
ETHTOOL_A_HEADER_DEV_INDEX, /* u32 */
ETHTOOL_A_HEADER_DEV_NAME, /* string */
ETHTOOL_A_HEADER_FLAGS, /* u32 - ETHTOOL_FLAG_* */
ETHTOOL_A_HEADER_PHY_INDEX, /* u32 */
/* add new constants above here */
__ETHTOOL_A_HEADER_CNT,
ETHTOOL_A_HEADER_MAX = __ETHTOOL_A_HEADER_CNT - 1
};
/* bit sets */
enum {
ETHTOOL_A_BITSET_BIT_UNSPEC,
ETHTOOL_A_BITSET_BIT_INDEX, /* u32 */
ETHTOOL_A_BITSET_BIT_NAME, /* string */
ETHTOOL_A_BITSET_BIT_VALUE, /* flag */
/* add new constants above here */
__ETHTOOL_A_BITSET_BIT_CNT,
ETHTOOL_A_BITSET_BIT_MAX = __ETHTOOL_A_BITSET_BIT_CNT - 1
};
enum {
ETHTOOL_A_BITSET_BITS_UNSPEC,
ETHTOOL_A_BITSET_BITS_BIT, /* nest - _A_BITSET_BIT_* */
/* add new constants above here */
__ETHTOOL_A_BITSET_BITS_CNT,
ETHTOOL_A_BITSET_BITS_MAX = __ETHTOOL_A_BITSET_BITS_CNT - 1
};
enum {
ETHTOOL_A_BITSET_UNSPEC,
ETHTOOL_A_BITSET_NOMASK, /* flag */
ETHTOOL_A_BITSET_SIZE, /* u32 */
ETHTOOL_A_BITSET_BITS, /* nest - _A_BITSET_BITS_* */
ETHTOOL_A_BITSET_VALUE, /* binary */
ETHTOOL_A_BITSET_MASK, /* binary */
/* add new constants above here */
__ETHTOOL_A_BITSET_CNT,
ETHTOOL_A_BITSET_MAX = __ETHTOOL_A_BITSET_CNT - 1
};
/* string sets */
enum {
ETHTOOL_A_STRING_UNSPEC,
ETHTOOL_A_STRING_INDEX, /* u32 */
ETHTOOL_A_STRING_VALUE, /* string */
/* add new constants above here */
__ETHTOOL_A_STRING_CNT,
ETHTOOL_A_STRING_MAX = __ETHTOOL_A_STRING_CNT - 1
};
enum {
ETHTOOL_A_STRINGS_UNSPEC,
ETHTOOL_A_STRINGS_STRING, /* nest - _A_STRINGS_* */
/* add new constants above here */
__ETHTOOL_A_STRINGS_CNT,
ETHTOOL_A_STRINGS_MAX = __ETHTOOL_A_STRINGS_CNT - 1
};
enum {
ETHTOOL_A_STRINGSET_UNSPEC,
ETHTOOL_A_STRINGSET_ID, /* u32 */
ETHTOOL_A_STRINGSET_COUNT, /* u32 */
ETHTOOL_A_STRINGSET_STRINGS, /* nest - _A_STRINGS_* */
/* add new constants above here */
__ETHTOOL_A_STRINGSET_CNT,
ETHTOOL_A_STRINGSET_MAX = __ETHTOOL_A_STRINGSET_CNT - 1
};
enum {
ETHTOOL_A_STRINGSETS_UNSPEC,
ETHTOOL_A_STRINGSETS_STRINGSET, /* nest - _A_STRINGSET_* */
/* add new constants above here */
__ETHTOOL_A_STRINGSETS_CNT,
ETHTOOL_A_STRINGSETS_MAX = __ETHTOOL_A_STRINGSETS_CNT - 1
};
/* STRSET */
enum {
ETHTOOL_A_STRSET_UNSPEC,
ETHTOOL_A_STRSET_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_STRSET_STRINGSETS, /* nest - _A_STRINGSETS_* */
ETHTOOL_A_STRSET_COUNTS_ONLY, /* flag */
/* add new constants above here */
__ETHTOOL_A_STRSET_CNT,
ETHTOOL_A_STRSET_MAX = __ETHTOOL_A_STRSET_CNT - 1
};
/* LINKINFO */
enum {
ETHTOOL_A_LINKINFO_UNSPEC,
ETHTOOL_A_LINKINFO_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_LINKINFO_PORT, /* u8 */
ETHTOOL_A_LINKINFO_PHYADDR, /* u8 */
ETHTOOL_A_LINKINFO_TP_MDIX, /* u8 */
ETHTOOL_A_LINKINFO_TP_MDIX_CTRL, /* u8 */
ETHTOOL_A_LINKINFO_TRANSCEIVER, /* u8 */
/* add new constants above here */
__ETHTOOL_A_LINKINFO_CNT,
ETHTOOL_A_LINKINFO_MAX = __ETHTOOL_A_LINKINFO_CNT - 1
};
/* LINKMODES */
enum {
ETHTOOL_A_LINKMODES_UNSPEC,
ETHTOOL_A_LINKMODES_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_LINKMODES_AUTONEG, /* u8 */
ETHTOOL_A_LINKMODES_OURS, /* bitset */
ETHTOOL_A_LINKMODES_PEER, /* bitset */
ETHTOOL_A_LINKMODES_SPEED, /* u32 */
ETHTOOL_A_LINKMODES_DUPLEX, /* u8 */
ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG, /* u8 */
ETHTOOL_A_LINKMODES_MASTER_SLAVE_STATE, /* u8 */
ETHTOOL_A_LINKMODES_LANES, /* u32 */
ETHTOOL_A_LINKMODES_RATE_MATCHING, /* u8 */
/* add new constants above here */
__ETHTOOL_A_LINKMODES_CNT,
ETHTOOL_A_LINKMODES_MAX = __ETHTOOL_A_LINKMODES_CNT - 1
};
/* LINKSTATE */
enum {
ETHTOOL_A_LINKSTATE_UNSPEC,
ETHTOOL_A_LINKSTATE_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_LINKSTATE_LINK, /* u8 */
ETHTOOL_A_LINKSTATE_SQI, /* u32 */
ETHTOOL_A_LINKSTATE_SQI_MAX, /* u32 */
ETHTOOL_A_LINKSTATE_EXT_STATE, /* u8 */
ETHTOOL_A_LINKSTATE_EXT_SUBSTATE, /* u8 */
ETHTOOL_A_LINKSTATE_EXT_DOWN_CNT, /* u32 */
/* add new constants above here */
__ETHTOOL_A_LINKSTATE_CNT,
ETHTOOL_A_LINKSTATE_MAX = __ETHTOOL_A_LINKSTATE_CNT - 1
};
/* DEBUG */
enum {
ETHTOOL_A_DEBUG_UNSPEC,
ETHTOOL_A_DEBUG_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_DEBUG_MSGMASK, /* bitset */
/* add new constants above here */
__ETHTOOL_A_DEBUG_CNT,
ETHTOOL_A_DEBUG_MAX = __ETHTOOL_A_DEBUG_CNT - 1
};
/* WOL */
enum {
ETHTOOL_A_WOL_UNSPEC,
ETHTOOL_A_WOL_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_WOL_MODES, /* bitset */
ETHTOOL_A_WOL_SOPASS, /* binary */
/* add new constants above here */
__ETHTOOL_A_WOL_CNT,
ETHTOOL_A_WOL_MAX = __ETHTOOL_A_WOL_CNT - 1
};
/* FEATURES */
enum {
ETHTOOL_A_FEATURES_UNSPEC,
ETHTOOL_A_FEATURES_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_FEATURES_HW, /* bitset */
ETHTOOL_A_FEATURES_WANTED, /* bitset */
ETHTOOL_A_FEATURES_ACTIVE, /* bitset */
ETHTOOL_A_FEATURES_NOCHANGE, /* bitset */
/* add new constants above here */
__ETHTOOL_A_FEATURES_CNT,
ETHTOOL_A_FEATURES_MAX = __ETHTOOL_A_FEATURES_CNT - 1
};
/* PRIVFLAGS */
enum {
ETHTOOL_A_PRIVFLAGS_UNSPEC,
ETHTOOL_A_PRIVFLAGS_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PRIVFLAGS_FLAGS, /* bitset */
/* add new constants above here */
__ETHTOOL_A_PRIVFLAGS_CNT,
ETHTOOL_A_PRIVFLAGS_MAX = __ETHTOOL_A_PRIVFLAGS_CNT - 1
};
/* RINGS */
enum {
ETHTOOL_TCP_DATA_SPLIT_UNKNOWN = 0,
ETHTOOL_TCP_DATA_SPLIT_DISABLED,
ETHTOOL_TCP_DATA_SPLIT_ENABLED,
};
enum {
ETHTOOL_A_RINGS_UNSPEC,
ETHTOOL_A_RINGS_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_RINGS_RX_MAX, /* u32 */
ETHTOOL_A_RINGS_RX_MINI_MAX, /* u32 */
ETHTOOL_A_RINGS_RX_JUMBO_MAX, /* u32 */
ETHTOOL_A_RINGS_TX_MAX, /* u32 */
ETHTOOL_A_RINGS_RX, /* u32 */
ETHTOOL_A_RINGS_RX_MINI, /* u32 */
ETHTOOL_A_RINGS_RX_JUMBO, /* u32 */
ETHTOOL_A_RINGS_TX, /* u32 */
ETHTOOL_A_RINGS_RX_BUF_LEN, /* u32 */
ETHTOOL_A_RINGS_TCP_DATA_SPLIT, /* u8 */
ETHTOOL_A_RINGS_CQE_SIZE, /* u32 */
ETHTOOL_A_RINGS_TX_PUSH, /* u8 */
ETHTOOL_A_RINGS_RX_PUSH, /* u8 */
ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN, /* u32 */
ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN_MAX, /* u32 */
/* add new constants above here */
__ETHTOOL_A_RINGS_CNT,
ETHTOOL_A_RINGS_MAX = (__ETHTOOL_A_RINGS_CNT - 1)
};
/* CHANNELS */
enum {
ETHTOOL_A_CHANNELS_UNSPEC,
ETHTOOL_A_CHANNELS_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_CHANNELS_RX_MAX, /* u32 */
ETHTOOL_A_CHANNELS_TX_MAX, /* u32 */
ETHTOOL_A_CHANNELS_OTHER_MAX, /* u32 */
ETHTOOL_A_CHANNELS_COMBINED_MAX, /* u32 */
ETHTOOL_A_CHANNELS_RX_COUNT, /* u32 */
ETHTOOL_A_CHANNELS_TX_COUNT, /* u32 */
ETHTOOL_A_CHANNELS_OTHER_COUNT, /* u32 */
ETHTOOL_A_CHANNELS_COMBINED_COUNT, /* u32 */
/* add new constants above here */
__ETHTOOL_A_CHANNELS_CNT,
ETHTOOL_A_CHANNELS_MAX = (__ETHTOOL_A_CHANNELS_CNT - 1)
};
/* COALESCE */
enum {
ETHTOOL_A_COALESCE_UNSPEC,
ETHTOOL_A_COALESCE_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_COALESCE_RX_USECS, /* u32 */
ETHTOOL_A_COALESCE_RX_MAX_FRAMES, /* u32 */
ETHTOOL_A_COALESCE_RX_USECS_IRQ, /* u32 */
ETHTOOL_A_COALESCE_RX_MAX_FRAMES_IRQ, /* u32 */
ETHTOOL_A_COALESCE_TX_USECS, /* u32 */
ETHTOOL_A_COALESCE_TX_MAX_FRAMES, /* u32 */
ETHTOOL_A_COALESCE_TX_USECS_IRQ, /* u32 */
ETHTOOL_A_COALESCE_TX_MAX_FRAMES_IRQ, /* u32 */
ETHTOOL_A_COALESCE_STATS_BLOCK_USECS, /* u32 */
ETHTOOL_A_COALESCE_USE_ADAPTIVE_RX, /* u8 */
ETHTOOL_A_COALESCE_USE_ADAPTIVE_TX, /* u8 */
ETHTOOL_A_COALESCE_PKT_RATE_LOW, /* u32 */
ETHTOOL_A_COALESCE_RX_USECS_LOW, /* u32 */
ETHTOOL_A_COALESCE_RX_MAX_FRAMES_LOW, /* u32 */
ETHTOOL_A_COALESCE_TX_USECS_LOW, /* u32 */
ETHTOOL_A_COALESCE_TX_MAX_FRAMES_LOW, /* u32 */
ETHTOOL_A_COALESCE_PKT_RATE_HIGH, /* u32 */
ETHTOOL_A_COALESCE_RX_USECS_HIGH, /* u32 */
ETHTOOL_A_COALESCE_RX_MAX_FRAMES_HIGH, /* u32 */
ETHTOOL_A_COALESCE_TX_USECS_HIGH, /* u32 */
ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH, /* u32 */
ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL, /* u32 */
ETHTOOL_A_COALESCE_USE_CQE_MODE_TX, /* u8 */
ETHTOOL_A_COALESCE_USE_CQE_MODE_RX, /* u8 */
ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES, /* u32 */
ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES, /* u32 */
ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS, /* u32 */
/* nest - _A_PROFILE_IRQ_MODERATION */
ETHTOOL_A_COALESCE_RX_PROFILE,
/* nest - _A_PROFILE_IRQ_MODERATION */
ETHTOOL_A_COALESCE_TX_PROFILE,
/* add new constants above here */
__ETHTOOL_A_COALESCE_CNT,
ETHTOOL_A_COALESCE_MAX = (__ETHTOOL_A_COALESCE_CNT - 1)
};
enum {
ETHTOOL_A_PROFILE_UNSPEC,
/* nest, _A_IRQ_MODERATION_* */
ETHTOOL_A_PROFILE_IRQ_MODERATION,
__ETHTOOL_A_PROFILE_CNT,
ETHTOOL_A_PROFILE_MAX = (__ETHTOOL_A_PROFILE_CNT - 1)
};
enum {
ETHTOOL_A_IRQ_MODERATION_UNSPEC,
ETHTOOL_A_IRQ_MODERATION_USEC, /* u32 */
ETHTOOL_A_IRQ_MODERATION_PKTS, /* u32 */
ETHTOOL_A_IRQ_MODERATION_COMPS, /* u32 */
__ETHTOOL_A_IRQ_MODERATION_CNT,
ETHTOOL_A_IRQ_MODERATION_MAX = (__ETHTOOL_A_IRQ_MODERATION_CNT - 1)
};
/* PAUSE */
enum {
ETHTOOL_A_PAUSE_UNSPEC,
ETHTOOL_A_PAUSE_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PAUSE_AUTONEG, /* u8 */
ETHTOOL_A_PAUSE_RX, /* u8 */
ETHTOOL_A_PAUSE_TX, /* u8 */
ETHTOOL_A_PAUSE_STATS, /* nest - _PAUSE_STAT_* */
ETHTOOL_A_PAUSE_STATS_SRC, /* u32 */
/* add new constants above here */
__ETHTOOL_A_PAUSE_CNT,
ETHTOOL_A_PAUSE_MAX = (__ETHTOOL_A_PAUSE_CNT - 1)
};
enum {
ETHTOOL_A_PAUSE_STAT_UNSPEC,
ETHTOOL_A_PAUSE_STAT_PAD,
ETHTOOL_A_PAUSE_STAT_TX_FRAMES,
ETHTOOL_A_PAUSE_STAT_RX_FRAMES,
/* add new constants above here
* adjust ETHTOOL_PAUSE_STAT_CNT if adding non-stats!
*/
__ETHTOOL_A_PAUSE_STAT_CNT,
ETHTOOL_A_PAUSE_STAT_MAX = (__ETHTOOL_A_PAUSE_STAT_CNT - 1)
};
/* EEE */
enum {
ETHTOOL_A_EEE_UNSPEC,
ETHTOOL_A_EEE_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_EEE_MODES_OURS, /* bitset */
ETHTOOL_A_EEE_MODES_PEER, /* bitset */
ETHTOOL_A_EEE_ACTIVE, /* u8 */
ETHTOOL_A_EEE_ENABLED, /* u8 */
ETHTOOL_A_EEE_TX_LPI_ENABLED, /* u8 */
ETHTOOL_A_EEE_TX_LPI_TIMER, /* u32 */
/* add new constants above here */
__ETHTOOL_A_EEE_CNT,
ETHTOOL_A_EEE_MAX = (__ETHTOOL_A_EEE_CNT - 1)
};
/* TSINFO */
enum {
ETHTOOL_A_TSINFO_UNSPEC,
ETHTOOL_A_TSINFO_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_TSINFO_TIMESTAMPING, /* bitset */
ETHTOOL_A_TSINFO_TX_TYPES, /* bitset */
ETHTOOL_A_TSINFO_RX_FILTERS, /* bitset */
ETHTOOL_A_TSINFO_PHC_INDEX, /* u32 */
ETHTOOL_A_TSINFO_STATS, /* nest - _A_TSINFO_STAT */
/* add new constants above here */
__ETHTOOL_A_TSINFO_CNT,
ETHTOOL_A_TSINFO_MAX = (__ETHTOOL_A_TSINFO_CNT - 1)
};
enum {
ETHTOOL_A_TS_STAT_UNSPEC,
ETHTOOL_A_TS_STAT_TX_PKTS, /* uint */
ETHTOOL_A_TS_STAT_TX_LOST, /* uint */
ETHTOOL_A_TS_STAT_TX_ERR, /* uint */
/* add new constants above here */
__ETHTOOL_A_TS_STAT_CNT,
ETHTOOL_A_TS_STAT_MAX = (__ETHTOOL_A_TS_STAT_CNT - 1)
};
/* PHC VCLOCKS */
enum {
ETHTOOL_A_PHC_VCLOCKS_UNSPEC,
ETHTOOL_A_PHC_VCLOCKS_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PHC_VCLOCKS_NUM, /* u32 */
ETHTOOL_A_PHC_VCLOCKS_INDEX, /* array, s32 */
/* add new constants above here */
__ETHTOOL_A_PHC_VCLOCKS_CNT,
ETHTOOL_A_PHC_VCLOCKS_MAX = (__ETHTOOL_A_PHC_VCLOCKS_CNT - 1)
};
/* CABLE TEST */
enum {
ETHTOOL_A_CABLE_TEST_UNSPEC,
ETHTOOL_A_CABLE_TEST_HEADER, /* nest - _A_HEADER_* */
/* add new constants above here */
__ETHTOOL_A_CABLE_TEST_CNT,
ETHTOOL_A_CABLE_TEST_MAX = __ETHTOOL_A_CABLE_TEST_CNT - 1
};
/* CABLE TEST NOTIFY */
enum {
ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC,
@ -582,74 +49,12 @@ enum {
ETHTOOL_A_CABLE_INF_SRC_ALCD,
};
enum {
ETHTOOL_A_CABLE_RESULT_UNSPEC,
ETHTOOL_A_CABLE_RESULT_PAIR, /* u8 ETHTOOL_A_CABLE_PAIR_ */
ETHTOOL_A_CABLE_RESULT_CODE, /* u8 ETHTOOL_A_CABLE_RESULT_CODE_ */
ETHTOOL_A_CABLE_RESULT_SRC, /* u32 ETHTOOL_A_CABLE_INF_SRC_ */
__ETHTOOL_A_CABLE_RESULT_CNT,
ETHTOOL_A_CABLE_RESULT_MAX = (__ETHTOOL_A_CABLE_RESULT_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_FAULT_LENGTH_UNSPEC,
ETHTOOL_A_CABLE_FAULT_LENGTH_PAIR, /* u8 ETHTOOL_A_CABLE_PAIR_ */
ETHTOOL_A_CABLE_FAULT_LENGTH_CM, /* u32 */
ETHTOOL_A_CABLE_FAULT_LENGTH_SRC, /* u32 ETHTOOL_A_CABLE_INF_SRC_ */
__ETHTOOL_A_CABLE_FAULT_LENGTH_CNT,
ETHTOOL_A_CABLE_FAULT_LENGTH_MAX = (__ETHTOOL_A_CABLE_FAULT_LENGTH_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_NTF_STATUS_UNSPEC,
ETHTOOL_A_CABLE_TEST_NTF_STATUS_STARTED,
ETHTOOL_A_CABLE_TEST_NTF_STATUS_COMPLETED
};
enum {
ETHTOOL_A_CABLE_NEST_UNSPEC,
ETHTOOL_A_CABLE_NEST_RESULT, /* nest - ETHTOOL_A_CABLE_RESULT_ */
ETHTOOL_A_CABLE_NEST_FAULT_LENGTH, /* nest - ETHTOOL_A_CABLE_FAULT_LENGTH_ */
__ETHTOOL_A_CABLE_NEST_CNT,
ETHTOOL_A_CABLE_NEST_MAX = (__ETHTOOL_A_CABLE_NEST_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_NTF_UNSPEC,
ETHTOOL_A_CABLE_TEST_NTF_HEADER, /* nest - ETHTOOL_A_HEADER_* */
ETHTOOL_A_CABLE_TEST_NTF_STATUS, /* u8 - _STARTED/_COMPLETE */
ETHTOOL_A_CABLE_TEST_NTF_NEST, /* nest - of results: */
__ETHTOOL_A_CABLE_TEST_NTF_CNT,
ETHTOOL_A_CABLE_TEST_NTF_MAX = (__ETHTOOL_A_CABLE_TEST_NTF_CNT - 1)
};
/* CABLE TEST TDR */
enum {
ETHTOOL_A_CABLE_TEST_TDR_CFG_UNSPEC,
ETHTOOL_A_CABLE_TEST_TDR_CFG_FIRST, /* u32 */
ETHTOOL_A_CABLE_TEST_TDR_CFG_LAST, /* u32 */
ETHTOOL_A_CABLE_TEST_TDR_CFG_STEP, /* u32 */
ETHTOOL_A_CABLE_TEST_TDR_CFG_PAIR, /* u8 */
/* add new constants above here */
__ETHTOOL_A_CABLE_TEST_TDR_CFG_CNT,
ETHTOOL_A_CABLE_TEST_TDR_CFG_MAX = __ETHTOOL_A_CABLE_TEST_TDR_CFG_CNT - 1
};
enum {
ETHTOOL_A_CABLE_TEST_TDR_UNSPEC,
ETHTOOL_A_CABLE_TEST_TDR_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_CABLE_TEST_TDR_CFG, /* nest - *_TDR_CFG_* */
/* add new constants above here */
__ETHTOOL_A_CABLE_TEST_TDR_CNT,
ETHTOOL_A_CABLE_TEST_TDR_MAX = __ETHTOOL_A_CABLE_TEST_TDR_CNT - 1
};
/* CABLE TEST TDR NOTIFY */
enum {
@ -689,163 +94,17 @@ enum {
ETHTOOL_A_CABLE_TDR_NEST_MAX = (__ETHTOOL_A_CABLE_TDR_NEST_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_TDR_NTF_UNSPEC,
ETHTOOL_A_CABLE_TEST_TDR_NTF_HEADER, /* nest - ETHTOOL_A_HEADER_* */
ETHTOOL_A_CABLE_TEST_TDR_NTF_STATUS, /* u8 - _STARTED/_COMPLETE */
ETHTOOL_A_CABLE_TEST_TDR_NTF_NEST, /* nest - of results: */
/* add new constants above here */
__ETHTOOL_A_CABLE_TEST_TDR_NTF_CNT,
ETHTOOL_A_CABLE_TEST_TDR_NTF_MAX = __ETHTOOL_A_CABLE_TEST_TDR_NTF_CNT - 1
};
/* TUNNEL INFO */
enum {
ETHTOOL_UDP_TUNNEL_TYPE_VXLAN,
ETHTOOL_UDP_TUNNEL_TYPE_GENEVE,
ETHTOOL_UDP_TUNNEL_TYPE_VXLAN_GPE,
__ETHTOOL_UDP_TUNNEL_TYPE_CNT
};
enum {
ETHTOOL_A_TUNNEL_UDP_ENTRY_UNSPEC,
ETHTOOL_A_TUNNEL_UDP_ENTRY_PORT, /* be16 */
ETHTOOL_A_TUNNEL_UDP_ENTRY_TYPE, /* u32 */
/* add new constants above here */
__ETHTOOL_A_TUNNEL_UDP_ENTRY_CNT,
ETHTOOL_A_TUNNEL_UDP_ENTRY_MAX = (__ETHTOOL_A_TUNNEL_UDP_ENTRY_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_UDP_TABLE_UNSPEC,
ETHTOOL_A_TUNNEL_UDP_TABLE_SIZE, /* u32 */
ETHTOOL_A_TUNNEL_UDP_TABLE_TYPES, /* bitset */
ETHTOOL_A_TUNNEL_UDP_TABLE_ENTRY, /* nest - _UDP_ENTRY_* */
/* add new constants above here */
__ETHTOOL_A_TUNNEL_UDP_TABLE_CNT,
ETHTOOL_A_TUNNEL_UDP_TABLE_MAX = (__ETHTOOL_A_TUNNEL_UDP_TABLE_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_UDP_UNSPEC,
ETHTOOL_A_TUNNEL_UDP_TABLE, /* nest - _UDP_TABLE_* */
/* add new constants above here */
__ETHTOOL_A_TUNNEL_UDP_CNT,
ETHTOOL_A_TUNNEL_UDP_MAX = (__ETHTOOL_A_TUNNEL_UDP_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_INFO_UNSPEC,
ETHTOOL_A_TUNNEL_INFO_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_TUNNEL_INFO_UDP_PORTS, /* nest - _UDP_TABLE */
/* add new constants above here */
__ETHTOOL_A_TUNNEL_INFO_CNT,
ETHTOOL_A_TUNNEL_INFO_MAX = (__ETHTOOL_A_TUNNEL_INFO_CNT - 1)
};
/* FEC */
enum {
ETHTOOL_A_FEC_UNSPEC,
ETHTOOL_A_FEC_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_FEC_MODES, /* bitset */
ETHTOOL_A_FEC_AUTO, /* u8 */
ETHTOOL_A_FEC_ACTIVE, /* u32 */
ETHTOOL_A_FEC_STATS, /* nest - _A_FEC_STAT */
__ETHTOOL_A_FEC_CNT,
ETHTOOL_A_FEC_MAX = (__ETHTOOL_A_FEC_CNT - 1)
};
enum {
ETHTOOL_A_FEC_STAT_UNSPEC,
ETHTOOL_A_FEC_STAT_PAD,
ETHTOOL_A_FEC_STAT_CORRECTED, /* array, u64 */
ETHTOOL_A_FEC_STAT_UNCORR, /* array, u64 */
ETHTOOL_A_FEC_STAT_CORR_BITS, /* array, u64 */
/* add new constants above here */
__ETHTOOL_A_FEC_STAT_CNT,
ETHTOOL_A_FEC_STAT_MAX = (__ETHTOOL_A_FEC_STAT_CNT - 1)
};
/* MODULE EEPROM */
enum {
ETHTOOL_A_MODULE_EEPROM_UNSPEC,
ETHTOOL_A_MODULE_EEPROM_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_MODULE_EEPROM_OFFSET, /* u32 */
ETHTOOL_A_MODULE_EEPROM_LENGTH, /* u32 */
ETHTOOL_A_MODULE_EEPROM_PAGE, /* u8 */
ETHTOOL_A_MODULE_EEPROM_BANK, /* u8 */
ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS, /* u8 */
ETHTOOL_A_MODULE_EEPROM_DATA, /* binary */
__ETHTOOL_A_MODULE_EEPROM_CNT,
ETHTOOL_A_MODULE_EEPROM_MAX = (__ETHTOOL_A_MODULE_EEPROM_CNT - 1)
};
/* STATS */
enum {
ETHTOOL_A_STATS_UNSPEC,
ETHTOOL_A_STATS_PAD,
ETHTOOL_A_STATS_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_STATS_GROUPS, /* bitset */
ETHTOOL_A_STATS_GRP, /* nest - _A_STATS_GRP_* */
ETHTOOL_A_STATS_SRC, /* u32 */
/* add new constants above here */
__ETHTOOL_A_STATS_CNT,
ETHTOOL_A_STATS_MAX = (__ETHTOOL_A_STATS_CNT - 1)
};
enum {
ETHTOOL_STATS_ETH_PHY,
ETHTOOL_STATS_ETH_MAC,
ETHTOOL_STATS_ETH_CTRL,
ETHTOOL_STATS_RMON,
ETHTOOL_STATS_PHY,
/* add new constants above here */
__ETHTOOL_STATS_CNT
};
enum {
ETHTOOL_A_STATS_GRP_UNSPEC,
ETHTOOL_A_STATS_GRP_PAD,
ETHTOOL_A_STATS_GRP_ID, /* u32 */
ETHTOOL_A_STATS_GRP_SS_ID, /* u32 */
ETHTOOL_A_STATS_GRP_STAT, /* nest */
ETHTOOL_A_STATS_GRP_HIST_RX, /* nest */
ETHTOOL_A_STATS_GRP_HIST_TX, /* nest */
ETHTOOL_A_STATS_GRP_HIST_BKT_LOW, /* u32 */
ETHTOOL_A_STATS_GRP_HIST_BKT_HI, /* u32 */
ETHTOOL_A_STATS_GRP_HIST_VAL, /* u64 */
/* add new constants above here */
__ETHTOOL_A_STATS_GRP_CNT,
ETHTOOL_A_STATS_GRP_MAX = (__ETHTOOL_A_STATS_GRP_CNT - 1)
};
enum {
/* 30.3.2.1.5 aSymbolErrorDuringCarrier */
ETHTOOL_A_STATS_ETH_PHY_5_SYM_ERR,
@ -935,160 +194,18 @@ enum {
ETHTOOL_A_STATS_RMON_MAX = (__ETHTOOL_A_STATS_RMON_CNT - 1)
};
/* MODULE */
enum {
ETHTOOL_A_MODULE_UNSPEC,
ETHTOOL_A_MODULE_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_MODULE_POWER_MODE_POLICY, /* u8 */
ETHTOOL_A_MODULE_POWER_MODE, /* u8 */
/* Basic packet counters if PHY has separate counters from the MAC */
ETHTOOL_A_STATS_PHY_RX_PKTS,
ETHTOOL_A_STATS_PHY_RX_BYTES,
ETHTOOL_A_STATS_PHY_RX_ERRORS,
ETHTOOL_A_STATS_PHY_TX_PKTS,
ETHTOOL_A_STATS_PHY_TX_BYTES,
ETHTOOL_A_STATS_PHY_TX_ERRORS,
/* add new constants above here */
__ETHTOOL_A_MODULE_CNT,
ETHTOOL_A_MODULE_MAX = (__ETHTOOL_A_MODULE_CNT - 1)
__ETHTOOL_A_STATS_PHY_CNT,
ETHTOOL_A_STATS_PHY_MAX = (__ETHTOOL_A_STATS_PHY_CNT - 1)
};
/* Power Sourcing Equipment */
enum {
ETHTOOL_A_C33_PSE_PW_LIMIT_UNSPEC,
ETHTOOL_A_C33_PSE_PW_LIMIT_MIN, /* u32 */
ETHTOOL_A_C33_PSE_PW_LIMIT_MAX, /* u32 */
};
enum {
ETHTOOL_A_PSE_UNSPEC,
ETHTOOL_A_PSE_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PODL_PSE_ADMIN_STATE, /* u32 */
ETHTOOL_A_PODL_PSE_ADMIN_CONTROL, /* u32 */
ETHTOOL_A_PODL_PSE_PW_D_STATUS, /* u32 */
ETHTOOL_A_C33_PSE_ADMIN_STATE, /* u32 */
ETHTOOL_A_C33_PSE_ADMIN_CONTROL, /* u32 */
ETHTOOL_A_C33_PSE_PW_D_STATUS, /* u32 */
ETHTOOL_A_C33_PSE_PW_CLASS, /* u32 */
ETHTOOL_A_C33_PSE_ACTUAL_PW, /* u32 */
ETHTOOL_A_C33_PSE_EXT_STATE, /* u32 */
ETHTOOL_A_C33_PSE_EXT_SUBSTATE, /* u32 */
ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, /* u32 */
ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */
/* add new constants above here */
__ETHTOOL_A_PSE_CNT,
ETHTOOL_A_PSE_MAX = (__ETHTOOL_A_PSE_CNT - 1)
};
enum {
ETHTOOL_A_RSS_UNSPEC,
ETHTOOL_A_RSS_HEADER,
ETHTOOL_A_RSS_CONTEXT, /* u32 */
ETHTOOL_A_RSS_HFUNC, /* u32 */
ETHTOOL_A_RSS_INDIR, /* binary */
ETHTOOL_A_RSS_HKEY, /* binary */
ETHTOOL_A_RSS_INPUT_XFRM, /* u32 */
ETHTOOL_A_RSS_START_CONTEXT, /* u32 */
__ETHTOOL_A_RSS_CNT,
ETHTOOL_A_RSS_MAX = (__ETHTOOL_A_RSS_CNT - 1),
};
/* PLCA */
enum {
ETHTOOL_A_PLCA_UNSPEC,
ETHTOOL_A_PLCA_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PLCA_VERSION, /* u16 */
ETHTOOL_A_PLCA_ENABLED, /* u8 */
ETHTOOL_A_PLCA_STATUS, /* u8 */
ETHTOOL_A_PLCA_NODE_CNT, /* u32 */
ETHTOOL_A_PLCA_NODE_ID, /* u32 */
ETHTOOL_A_PLCA_TO_TMR, /* u32 */
ETHTOOL_A_PLCA_BURST_CNT, /* u32 */
ETHTOOL_A_PLCA_BURST_TMR, /* u32 */
/* add new constants above here */
__ETHTOOL_A_PLCA_CNT,
ETHTOOL_A_PLCA_MAX = (__ETHTOOL_A_PLCA_CNT - 1)
};
/* MAC Merge (802.3) */
enum {
ETHTOOL_A_MM_STAT_UNSPEC,
ETHTOOL_A_MM_STAT_PAD,
/* aMACMergeFrameAssErrorCount */
ETHTOOL_A_MM_STAT_REASSEMBLY_ERRORS, /* u64 */
/* aMACMergeFrameSmdErrorCount */
ETHTOOL_A_MM_STAT_SMD_ERRORS, /* u64 */
/* aMACMergeFrameAssOkCount */
ETHTOOL_A_MM_STAT_REASSEMBLY_OK, /* u64 */
/* aMACMergeFragCountRx */
ETHTOOL_A_MM_STAT_RX_FRAG_COUNT, /* u64 */
/* aMACMergeFragCountTx */
ETHTOOL_A_MM_STAT_TX_FRAG_COUNT, /* u64 */
/* aMACMergeHoldCount */
ETHTOOL_A_MM_STAT_HOLD_COUNT, /* u64 */
/* add new constants above here */
__ETHTOOL_A_MM_STAT_CNT,
ETHTOOL_A_MM_STAT_MAX = (__ETHTOOL_A_MM_STAT_CNT - 1)
};
enum {
ETHTOOL_A_MM_UNSPEC,
ETHTOOL_A_MM_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_MM_PMAC_ENABLED, /* u8 */
ETHTOOL_A_MM_TX_ENABLED, /* u8 */
ETHTOOL_A_MM_TX_ACTIVE, /* u8 */
ETHTOOL_A_MM_TX_MIN_FRAG_SIZE, /* u32 */
ETHTOOL_A_MM_RX_MIN_FRAG_SIZE, /* u32 */
ETHTOOL_A_MM_VERIFY_ENABLED, /* u8 */
ETHTOOL_A_MM_VERIFY_STATUS, /* u8 */
ETHTOOL_A_MM_VERIFY_TIME, /* u32 */
ETHTOOL_A_MM_MAX_VERIFY_TIME, /* u32 */
ETHTOOL_A_MM_STATS, /* nest - _A_MM_STAT_* */
/* add new constants above here */
__ETHTOOL_A_MM_CNT,
ETHTOOL_A_MM_MAX = (__ETHTOOL_A_MM_CNT - 1)
};
/* MODULE_FW_FLASH */
enum {
ETHTOOL_A_MODULE_FW_FLASH_UNSPEC,
ETHTOOL_A_MODULE_FW_FLASH_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_MODULE_FW_FLASH_FILE_NAME, /* string */
ETHTOOL_A_MODULE_FW_FLASH_PASSWORD, /* u32 */
ETHTOOL_A_MODULE_FW_FLASH_STATUS, /* u32 */
ETHTOOL_A_MODULE_FW_FLASH_STATUS_MSG, /* string */
ETHTOOL_A_MODULE_FW_FLASH_DONE, /* uint */
ETHTOOL_A_MODULE_FW_FLASH_TOTAL, /* uint */
/* add new constants above here */
__ETHTOOL_A_MODULE_FW_FLASH_CNT,
ETHTOOL_A_MODULE_FW_FLASH_MAX = (__ETHTOOL_A_MODULE_FW_FLASH_CNT - 1)
};
enum {
ETHTOOL_A_PHY_UNSPEC,
ETHTOOL_A_PHY_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PHY_INDEX, /* u32 */
ETHTOOL_A_PHY_DRVNAME, /* string */
ETHTOOL_A_PHY_NAME, /* string */
ETHTOOL_A_PHY_UPSTREAM_TYPE, /* u32 */
ETHTOOL_A_PHY_UPSTREAM_INDEX, /* u32 */
ETHTOOL_A_PHY_UPSTREAM_SFP_NAME, /* string */
ETHTOOL_A_PHY_DOWNSTREAM_SFP_NAME, /* string */
/* add new constants above here */
__ETHTOOL_A_PHY_CNT,
ETHTOOL_A_PHY_MAX = (__ETHTOOL_A_PHY_CNT - 1)
};
/* generic netlink info */
#define ETHTOOL_GENL_NAME "ethtool"
#define ETHTOOL_GENL_VERSION 1
#define ETHTOOL_MCGRP_MONITOR_NAME "monitor"
#endif /* _LINUX_ETHTOOL_NETLINK_H_ */

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/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/ethtool.yaml */
/* YNL-GEN uapi header */
#ifndef _LINUX_ETHTOOL_NETLINK_GENERATED_H
#define _LINUX_ETHTOOL_NETLINK_GENERATED_H
#define ETHTOOL_GENL_NAME "ethtool"
#define ETHTOOL_GENL_VERSION 1
enum {
ETHTOOL_UDP_TUNNEL_TYPE_VXLAN,
ETHTOOL_UDP_TUNNEL_TYPE_GENEVE,
ETHTOOL_UDP_TUNNEL_TYPE_VXLAN_GPE,
/* private: */
__ETHTOOL_UDP_TUNNEL_TYPE_CNT,
ETHTOOL_UDP_TUNNEL_TYPE_MAX = (__ETHTOOL_UDP_TUNNEL_TYPE_CNT - 1)
};
/**
* enum ethtool_header_flags - common ethtool header flags
* @ETHTOOL_FLAG_COMPACT_BITSETS: use compact bitsets in reply
* @ETHTOOL_FLAG_OMIT_REPLY: provide optional reply for SET or ACT requests
* @ETHTOOL_FLAG_STATS: request statistics, if supported by the driver
*/
enum ethtool_header_flags {
ETHTOOL_FLAG_COMPACT_BITSETS = 1,
ETHTOOL_FLAG_OMIT_REPLY = 2,
ETHTOOL_FLAG_STATS = 4,
};
enum ethtool_tcp_data_split {
ETHTOOL_TCP_DATA_SPLIT_UNKNOWN,
ETHTOOL_TCP_DATA_SPLIT_DISABLED,
ETHTOOL_TCP_DATA_SPLIT_ENABLED,
};
/**
* enum hwtstamp_source - Source of the hardware timestamp
* @HWTSTAMP_SOURCE_NETDEV: Hardware timestamp comes from a MAC or a device
* which has MAC and PHY integrated
* @HWTSTAMP_SOURCE_PHYLIB: Hardware timestamp comes from one PHY device of the
* network topology
*/
enum hwtstamp_source {
HWTSTAMP_SOURCE_NETDEV = 1,
HWTSTAMP_SOURCE_PHYLIB,
};
/**
* enum ethtool_pse_event - PSE event list for the PSE controller
* @ETHTOOL_PSE_EVENT_OVER_CURRENT: PSE output current is too high
* @ETHTOOL_PSE_EVENT_OVER_TEMP: PSE in over temperature state
* @ETHTOOL_C33_PSE_EVENT_DETECTION: detection process occur on the PSE. IEEE
* 802.3-2022 33.2.5 and 145.2.6 PSE detection of PDs. IEEE 802.3-202
* 30.9.1.1.5 aPSEPowerDetectionStatus
* @ETHTOOL_C33_PSE_EVENT_CLASSIFICATION: classification process occur on the
* PSE. IEEE 802.3-2022 33.2.6 and 145.2.8 classification of PDs mutual
* identification. IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification.
* @ETHTOOL_C33_PSE_EVENT_DISCONNECTION: PD has been disconnected on the PSE.
* IEEE 802.3-2022 33.3.8 and 145.3.9 PD Maintain Power Signature. IEEE
* 802.3-2022 33.5.1.2.9 MPS Absent. IEEE 802.3-2022 30.9.1.1.20
* aPSEMPSAbsentCounter.
* @ETHTOOL_PSE_EVENT_OVER_BUDGET: PSE turned off due to over budget situation
* @ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR: PSE faced an error managing the
* power control from software
*/
enum ethtool_pse_event {
ETHTOOL_PSE_EVENT_OVER_CURRENT = 1,
ETHTOOL_PSE_EVENT_OVER_TEMP = 2,
ETHTOOL_C33_PSE_EVENT_DETECTION = 4,
ETHTOOL_C33_PSE_EVENT_CLASSIFICATION = 8,
ETHTOOL_C33_PSE_EVENT_DISCONNECTION = 16,
ETHTOOL_PSE_EVENT_OVER_BUDGET = 32,
ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR = 64,
};
enum {
ETHTOOL_A_HEADER_UNSPEC,
ETHTOOL_A_HEADER_DEV_INDEX,
ETHTOOL_A_HEADER_DEV_NAME,
ETHTOOL_A_HEADER_FLAGS,
ETHTOOL_A_HEADER_PHY_INDEX,
__ETHTOOL_A_HEADER_CNT,
ETHTOOL_A_HEADER_MAX = (__ETHTOOL_A_HEADER_CNT - 1)
};
enum {
ETHTOOL_A_BITSET_BIT_UNSPEC,
ETHTOOL_A_BITSET_BIT_INDEX,
ETHTOOL_A_BITSET_BIT_NAME,
ETHTOOL_A_BITSET_BIT_VALUE,
__ETHTOOL_A_BITSET_BIT_CNT,
ETHTOOL_A_BITSET_BIT_MAX = (__ETHTOOL_A_BITSET_BIT_CNT - 1)
};
enum {
ETHTOOL_A_BITSET_BITS_UNSPEC,
ETHTOOL_A_BITSET_BITS_BIT,
__ETHTOOL_A_BITSET_BITS_CNT,
ETHTOOL_A_BITSET_BITS_MAX = (__ETHTOOL_A_BITSET_BITS_CNT - 1)
};
enum {
ETHTOOL_A_BITSET_UNSPEC,
ETHTOOL_A_BITSET_NOMASK,
ETHTOOL_A_BITSET_SIZE,
ETHTOOL_A_BITSET_BITS,
ETHTOOL_A_BITSET_VALUE,
ETHTOOL_A_BITSET_MASK,
__ETHTOOL_A_BITSET_CNT,
ETHTOOL_A_BITSET_MAX = (__ETHTOOL_A_BITSET_CNT - 1)
};
enum {
ETHTOOL_A_STRING_UNSPEC,
ETHTOOL_A_STRING_INDEX,
ETHTOOL_A_STRING_VALUE,
__ETHTOOL_A_STRING_CNT,
ETHTOOL_A_STRING_MAX = (__ETHTOOL_A_STRING_CNT - 1)
};
enum {
ETHTOOL_A_STRINGS_UNSPEC,
ETHTOOL_A_STRINGS_STRING,
__ETHTOOL_A_STRINGS_CNT,
ETHTOOL_A_STRINGS_MAX = (__ETHTOOL_A_STRINGS_CNT - 1)
};
enum {
ETHTOOL_A_STRINGSET_UNSPEC,
ETHTOOL_A_STRINGSET_ID,
ETHTOOL_A_STRINGSET_COUNT,
ETHTOOL_A_STRINGSET_STRINGS,
__ETHTOOL_A_STRINGSET_CNT,
ETHTOOL_A_STRINGSET_MAX = (__ETHTOOL_A_STRINGSET_CNT - 1)
};
enum {
ETHTOOL_A_STRINGSETS_UNSPEC,
ETHTOOL_A_STRINGSETS_STRINGSET,
__ETHTOOL_A_STRINGSETS_CNT,
ETHTOOL_A_STRINGSETS_MAX = (__ETHTOOL_A_STRINGSETS_CNT - 1)
};
enum {
ETHTOOL_A_STRSET_UNSPEC,
ETHTOOL_A_STRSET_HEADER,
ETHTOOL_A_STRSET_STRINGSETS,
ETHTOOL_A_STRSET_COUNTS_ONLY,
__ETHTOOL_A_STRSET_CNT,
ETHTOOL_A_STRSET_MAX = (__ETHTOOL_A_STRSET_CNT - 1)
};
enum {
ETHTOOL_A_PRIVFLAGS_UNSPEC,
ETHTOOL_A_PRIVFLAGS_HEADER,
ETHTOOL_A_PRIVFLAGS_FLAGS,
__ETHTOOL_A_PRIVFLAGS_CNT,
ETHTOOL_A_PRIVFLAGS_MAX = (__ETHTOOL_A_PRIVFLAGS_CNT - 1)
};
enum {
ETHTOOL_A_RINGS_UNSPEC,
ETHTOOL_A_RINGS_HEADER,
ETHTOOL_A_RINGS_RX_MAX,
ETHTOOL_A_RINGS_RX_MINI_MAX,
ETHTOOL_A_RINGS_RX_JUMBO_MAX,
ETHTOOL_A_RINGS_TX_MAX,
ETHTOOL_A_RINGS_RX,
ETHTOOL_A_RINGS_RX_MINI,
ETHTOOL_A_RINGS_RX_JUMBO,
ETHTOOL_A_RINGS_TX,
ETHTOOL_A_RINGS_RX_BUF_LEN,
ETHTOOL_A_RINGS_TCP_DATA_SPLIT,
ETHTOOL_A_RINGS_CQE_SIZE,
ETHTOOL_A_RINGS_TX_PUSH,
ETHTOOL_A_RINGS_RX_PUSH,
ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN,
ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN_MAX,
ETHTOOL_A_RINGS_HDS_THRESH,
ETHTOOL_A_RINGS_HDS_THRESH_MAX,
__ETHTOOL_A_RINGS_CNT,
ETHTOOL_A_RINGS_MAX = (__ETHTOOL_A_RINGS_CNT - 1)
};
enum {
ETHTOOL_A_MM_STAT_UNSPEC,
ETHTOOL_A_MM_STAT_PAD,
ETHTOOL_A_MM_STAT_REASSEMBLY_ERRORS,
ETHTOOL_A_MM_STAT_SMD_ERRORS,
ETHTOOL_A_MM_STAT_REASSEMBLY_OK,
ETHTOOL_A_MM_STAT_RX_FRAG_COUNT,
ETHTOOL_A_MM_STAT_TX_FRAG_COUNT,
ETHTOOL_A_MM_STAT_HOLD_COUNT,
__ETHTOOL_A_MM_STAT_CNT,
ETHTOOL_A_MM_STAT_MAX = (__ETHTOOL_A_MM_STAT_CNT - 1)
};
enum {
ETHTOOL_A_MM_UNSPEC,
ETHTOOL_A_MM_HEADER,
ETHTOOL_A_MM_PMAC_ENABLED,
ETHTOOL_A_MM_TX_ENABLED,
ETHTOOL_A_MM_TX_ACTIVE,
ETHTOOL_A_MM_TX_MIN_FRAG_SIZE,
ETHTOOL_A_MM_RX_MIN_FRAG_SIZE,
ETHTOOL_A_MM_VERIFY_ENABLED,
ETHTOOL_A_MM_VERIFY_STATUS,
ETHTOOL_A_MM_VERIFY_TIME,
ETHTOOL_A_MM_MAX_VERIFY_TIME,
ETHTOOL_A_MM_STATS,
__ETHTOOL_A_MM_CNT,
ETHTOOL_A_MM_MAX = (__ETHTOOL_A_MM_CNT - 1)
};
enum {
ETHTOOL_A_LINKINFO_UNSPEC,
ETHTOOL_A_LINKINFO_HEADER,
ETHTOOL_A_LINKINFO_PORT,
ETHTOOL_A_LINKINFO_PHYADDR,
ETHTOOL_A_LINKINFO_TP_MDIX,
ETHTOOL_A_LINKINFO_TP_MDIX_CTRL,
ETHTOOL_A_LINKINFO_TRANSCEIVER,
__ETHTOOL_A_LINKINFO_CNT,
ETHTOOL_A_LINKINFO_MAX = (__ETHTOOL_A_LINKINFO_CNT - 1)
};
enum {
ETHTOOL_A_LINKMODES_UNSPEC,
ETHTOOL_A_LINKMODES_HEADER,
ETHTOOL_A_LINKMODES_AUTONEG,
ETHTOOL_A_LINKMODES_OURS,
ETHTOOL_A_LINKMODES_PEER,
ETHTOOL_A_LINKMODES_SPEED,
ETHTOOL_A_LINKMODES_DUPLEX,
ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG,
ETHTOOL_A_LINKMODES_MASTER_SLAVE_STATE,
ETHTOOL_A_LINKMODES_LANES,
ETHTOOL_A_LINKMODES_RATE_MATCHING,
__ETHTOOL_A_LINKMODES_CNT,
ETHTOOL_A_LINKMODES_MAX = (__ETHTOOL_A_LINKMODES_CNT - 1)
};
enum {
ETHTOOL_A_LINKSTATE_UNSPEC,
ETHTOOL_A_LINKSTATE_HEADER,
ETHTOOL_A_LINKSTATE_LINK,
ETHTOOL_A_LINKSTATE_SQI,
ETHTOOL_A_LINKSTATE_SQI_MAX,
ETHTOOL_A_LINKSTATE_EXT_STATE,
ETHTOOL_A_LINKSTATE_EXT_SUBSTATE,
ETHTOOL_A_LINKSTATE_EXT_DOWN_CNT,
__ETHTOOL_A_LINKSTATE_CNT,
ETHTOOL_A_LINKSTATE_MAX = (__ETHTOOL_A_LINKSTATE_CNT - 1)
};
enum {
ETHTOOL_A_DEBUG_UNSPEC,
ETHTOOL_A_DEBUG_HEADER,
ETHTOOL_A_DEBUG_MSGMASK,
__ETHTOOL_A_DEBUG_CNT,
ETHTOOL_A_DEBUG_MAX = (__ETHTOOL_A_DEBUG_CNT - 1)
};
enum {
ETHTOOL_A_WOL_UNSPEC,
ETHTOOL_A_WOL_HEADER,
ETHTOOL_A_WOL_MODES,
ETHTOOL_A_WOL_SOPASS,
__ETHTOOL_A_WOL_CNT,
ETHTOOL_A_WOL_MAX = (__ETHTOOL_A_WOL_CNT - 1)
};
enum {
ETHTOOL_A_FEATURES_UNSPEC,
ETHTOOL_A_FEATURES_HEADER,
ETHTOOL_A_FEATURES_HW,
ETHTOOL_A_FEATURES_WANTED,
ETHTOOL_A_FEATURES_ACTIVE,
ETHTOOL_A_FEATURES_NOCHANGE,
__ETHTOOL_A_FEATURES_CNT,
ETHTOOL_A_FEATURES_MAX = (__ETHTOOL_A_FEATURES_CNT - 1)
};
enum {
ETHTOOL_A_CHANNELS_UNSPEC,
ETHTOOL_A_CHANNELS_HEADER,
ETHTOOL_A_CHANNELS_RX_MAX,
ETHTOOL_A_CHANNELS_TX_MAX,
ETHTOOL_A_CHANNELS_OTHER_MAX,
ETHTOOL_A_CHANNELS_COMBINED_MAX,
ETHTOOL_A_CHANNELS_RX_COUNT,
ETHTOOL_A_CHANNELS_TX_COUNT,
ETHTOOL_A_CHANNELS_OTHER_COUNT,
ETHTOOL_A_CHANNELS_COMBINED_COUNT,
__ETHTOOL_A_CHANNELS_CNT,
ETHTOOL_A_CHANNELS_MAX = (__ETHTOOL_A_CHANNELS_CNT - 1)
};
enum {
ETHTOOL_A_IRQ_MODERATION_UNSPEC,
ETHTOOL_A_IRQ_MODERATION_USEC,
ETHTOOL_A_IRQ_MODERATION_PKTS,
ETHTOOL_A_IRQ_MODERATION_COMPS,
__ETHTOOL_A_IRQ_MODERATION_CNT,
ETHTOOL_A_IRQ_MODERATION_MAX = (__ETHTOOL_A_IRQ_MODERATION_CNT - 1)
};
enum {
ETHTOOL_A_PROFILE_UNSPEC,
ETHTOOL_A_PROFILE_IRQ_MODERATION,
__ETHTOOL_A_PROFILE_CNT,
ETHTOOL_A_PROFILE_MAX = (__ETHTOOL_A_PROFILE_CNT - 1)
};
enum {
ETHTOOL_A_COALESCE_UNSPEC,
ETHTOOL_A_COALESCE_HEADER,
ETHTOOL_A_COALESCE_RX_USECS,
ETHTOOL_A_COALESCE_RX_MAX_FRAMES,
ETHTOOL_A_COALESCE_RX_USECS_IRQ,
ETHTOOL_A_COALESCE_RX_MAX_FRAMES_IRQ,
ETHTOOL_A_COALESCE_TX_USECS,
ETHTOOL_A_COALESCE_TX_MAX_FRAMES,
ETHTOOL_A_COALESCE_TX_USECS_IRQ,
ETHTOOL_A_COALESCE_TX_MAX_FRAMES_IRQ,
ETHTOOL_A_COALESCE_STATS_BLOCK_USECS,
ETHTOOL_A_COALESCE_USE_ADAPTIVE_RX,
ETHTOOL_A_COALESCE_USE_ADAPTIVE_TX,
ETHTOOL_A_COALESCE_PKT_RATE_LOW,
ETHTOOL_A_COALESCE_RX_USECS_LOW,
ETHTOOL_A_COALESCE_RX_MAX_FRAMES_LOW,
ETHTOOL_A_COALESCE_TX_USECS_LOW,
ETHTOOL_A_COALESCE_TX_MAX_FRAMES_LOW,
ETHTOOL_A_COALESCE_PKT_RATE_HIGH,
ETHTOOL_A_COALESCE_RX_USECS_HIGH,
ETHTOOL_A_COALESCE_RX_MAX_FRAMES_HIGH,
ETHTOOL_A_COALESCE_TX_USECS_HIGH,
ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH,
ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL,
ETHTOOL_A_COALESCE_USE_CQE_MODE_TX,
ETHTOOL_A_COALESCE_USE_CQE_MODE_RX,
ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES,
ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES,
ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS,
ETHTOOL_A_COALESCE_RX_PROFILE,
ETHTOOL_A_COALESCE_TX_PROFILE,
__ETHTOOL_A_COALESCE_CNT,
ETHTOOL_A_COALESCE_MAX = (__ETHTOOL_A_COALESCE_CNT - 1)
};
enum {
ETHTOOL_A_PAUSE_STAT_UNSPEC,
ETHTOOL_A_PAUSE_STAT_PAD,
ETHTOOL_A_PAUSE_STAT_TX_FRAMES,
ETHTOOL_A_PAUSE_STAT_RX_FRAMES,
__ETHTOOL_A_PAUSE_STAT_CNT,
ETHTOOL_A_PAUSE_STAT_MAX = (__ETHTOOL_A_PAUSE_STAT_CNT - 1)
};
enum {
ETHTOOL_A_PAUSE_UNSPEC,
ETHTOOL_A_PAUSE_HEADER,
ETHTOOL_A_PAUSE_AUTONEG,
ETHTOOL_A_PAUSE_RX,
ETHTOOL_A_PAUSE_TX,
ETHTOOL_A_PAUSE_STATS,
ETHTOOL_A_PAUSE_STATS_SRC,
__ETHTOOL_A_PAUSE_CNT,
ETHTOOL_A_PAUSE_MAX = (__ETHTOOL_A_PAUSE_CNT - 1)
};
enum {
ETHTOOL_A_EEE_UNSPEC,
ETHTOOL_A_EEE_HEADER,
ETHTOOL_A_EEE_MODES_OURS,
ETHTOOL_A_EEE_MODES_PEER,
ETHTOOL_A_EEE_ACTIVE,
ETHTOOL_A_EEE_ENABLED,
ETHTOOL_A_EEE_TX_LPI_ENABLED,
ETHTOOL_A_EEE_TX_LPI_TIMER,
__ETHTOOL_A_EEE_CNT,
ETHTOOL_A_EEE_MAX = (__ETHTOOL_A_EEE_CNT - 1)
};
enum {
ETHTOOL_A_TS_STAT_UNSPEC,
ETHTOOL_A_TS_STAT_TX_PKTS,
ETHTOOL_A_TS_STAT_TX_LOST,
ETHTOOL_A_TS_STAT_TX_ERR,
ETHTOOL_A_TS_STAT_TX_ONESTEP_PKTS_UNCONFIRMED,
__ETHTOOL_A_TS_STAT_CNT,
ETHTOOL_A_TS_STAT_MAX = (__ETHTOOL_A_TS_STAT_CNT - 1)
};
enum {
ETHTOOL_A_TS_HWTSTAMP_PROVIDER_UNSPEC,
ETHTOOL_A_TS_HWTSTAMP_PROVIDER_INDEX,
ETHTOOL_A_TS_HWTSTAMP_PROVIDER_QUALIFIER,
__ETHTOOL_A_TS_HWTSTAMP_PROVIDER_CNT,
ETHTOOL_A_TS_HWTSTAMP_PROVIDER_MAX = (__ETHTOOL_A_TS_HWTSTAMP_PROVIDER_CNT - 1)
};
enum {
ETHTOOL_A_TSINFO_UNSPEC,
ETHTOOL_A_TSINFO_HEADER,
ETHTOOL_A_TSINFO_TIMESTAMPING,
ETHTOOL_A_TSINFO_TX_TYPES,
ETHTOOL_A_TSINFO_RX_FILTERS,
ETHTOOL_A_TSINFO_PHC_INDEX,
ETHTOOL_A_TSINFO_STATS,
ETHTOOL_A_TSINFO_HWTSTAMP_PROVIDER,
ETHTOOL_A_TSINFO_HWTSTAMP_SOURCE,
ETHTOOL_A_TSINFO_HWTSTAMP_PHYINDEX,
__ETHTOOL_A_TSINFO_CNT,
ETHTOOL_A_TSINFO_MAX = (__ETHTOOL_A_TSINFO_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_RESULT_UNSPEC,
ETHTOOL_A_CABLE_RESULT_PAIR,
ETHTOOL_A_CABLE_RESULT_CODE,
ETHTOOL_A_CABLE_RESULT_SRC,
__ETHTOOL_A_CABLE_RESULT_CNT,
ETHTOOL_A_CABLE_RESULT_MAX = (__ETHTOOL_A_CABLE_RESULT_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_FAULT_LENGTH_UNSPEC,
ETHTOOL_A_CABLE_FAULT_LENGTH_PAIR,
ETHTOOL_A_CABLE_FAULT_LENGTH_CM,
ETHTOOL_A_CABLE_FAULT_LENGTH_SRC,
__ETHTOOL_A_CABLE_FAULT_LENGTH_CNT,
ETHTOOL_A_CABLE_FAULT_LENGTH_MAX = (__ETHTOOL_A_CABLE_FAULT_LENGTH_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_NEST_UNSPEC,
ETHTOOL_A_CABLE_NEST_RESULT,
ETHTOOL_A_CABLE_NEST_FAULT_LENGTH,
__ETHTOOL_A_CABLE_NEST_CNT,
ETHTOOL_A_CABLE_NEST_MAX = (__ETHTOOL_A_CABLE_NEST_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_UNSPEC,
ETHTOOL_A_CABLE_TEST_HEADER,
__ETHTOOL_A_CABLE_TEST_CNT,
ETHTOOL_A_CABLE_TEST_MAX = (__ETHTOOL_A_CABLE_TEST_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_NTF_UNSPEC,
ETHTOOL_A_CABLE_TEST_NTF_HEADER,
ETHTOOL_A_CABLE_TEST_NTF_STATUS,
ETHTOOL_A_CABLE_TEST_NTF_NEST,
__ETHTOOL_A_CABLE_TEST_NTF_CNT,
ETHTOOL_A_CABLE_TEST_NTF_MAX = (__ETHTOOL_A_CABLE_TEST_NTF_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_TDR_CFG_UNSPEC,
ETHTOOL_A_CABLE_TEST_TDR_CFG_FIRST,
ETHTOOL_A_CABLE_TEST_TDR_CFG_LAST,
ETHTOOL_A_CABLE_TEST_TDR_CFG_STEP,
ETHTOOL_A_CABLE_TEST_TDR_CFG_PAIR,
__ETHTOOL_A_CABLE_TEST_TDR_CFG_CNT,
ETHTOOL_A_CABLE_TEST_TDR_CFG_MAX = (__ETHTOOL_A_CABLE_TEST_TDR_CFG_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_TDR_NTF_UNSPEC,
ETHTOOL_A_CABLE_TEST_TDR_NTF_HEADER,
ETHTOOL_A_CABLE_TEST_TDR_NTF_STATUS,
ETHTOOL_A_CABLE_TEST_TDR_NTF_NEST,
__ETHTOOL_A_CABLE_TEST_TDR_NTF_CNT,
ETHTOOL_A_CABLE_TEST_TDR_NTF_MAX = (__ETHTOOL_A_CABLE_TEST_TDR_NTF_CNT - 1)
};
enum {
ETHTOOL_A_CABLE_TEST_TDR_UNSPEC,
ETHTOOL_A_CABLE_TEST_TDR_HEADER,
ETHTOOL_A_CABLE_TEST_TDR_CFG,
__ETHTOOL_A_CABLE_TEST_TDR_CNT,
ETHTOOL_A_CABLE_TEST_TDR_MAX = (__ETHTOOL_A_CABLE_TEST_TDR_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_UDP_ENTRY_UNSPEC,
ETHTOOL_A_TUNNEL_UDP_ENTRY_PORT,
ETHTOOL_A_TUNNEL_UDP_ENTRY_TYPE,
__ETHTOOL_A_TUNNEL_UDP_ENTRY_CNT,
ETHTOOL_A_TUNNEL_UDP_ENTRY_MAX = (__ETHTOOL_A_TUNNEL_UDP_ENTRY_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_UDP_TABLE_UNSPEC,
ETHTOOL_A_TUNNEL_UDP_TABLE_SIZE,
ETHTOOL_A_TUNNEL_UDP_TABLE_TYPES,
ETHTOOL_A_TUNNEL_UDP_TABLE_ENTRY,
__ETHTOOL_A_TUNNEL_UDP_TABLE_CNT,
ETHTOOL_A_TUNNEL_UDP_TABLE_MAX = (__ETHTOOL_A_TUNNEL_UDP_TABLE_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_UDP_UNSPEC,
ETHTOOL_A_TUNNEL_UDP_TABLE,
__ETHTOOL_A_TUNNEL_UDP_CNT,
ETHTOOL_A_TUNNEL_UDP_MAX = (__ETHTOOL_A_TUNNEL_UDP_CNT - 1)
};
enum {
ETHTOOL_A_TUNNEL_INFO_UNSPEC,
ETHTOOL_A_TUNNEL_INFO_HEADER,
ETHTOOL_A_TUNNEL_INFO_UDP_PORTS,
__ETHTOOL_A_TUNNEL_INFO_CNT,
ETHTOOL_A_TUNNEL_INFO_MAX = (__ETHTOOL_A_TUNNEL_INFO_CNT - 1)
};
enum {
ETHTOOL_A_FEC_STAT_UNSPEC,
ETHTOOL_A_FEC_STAT_PAD,
ETHTOOL_A_FEC_STAT_CORRECTED,
ETHTOOL_A_FEC_STAT_UNCORR,
ETHTOOL_A_FEC_STAT_CORR_BITS,
__ETHTOOL_A_FEC_STAT_CNT,
ETHTOOL_A_FEC_STAT_MAX = (__ETHTOOL_A_FEC_STAT_CNT - 1)
};
enum {
ETHTOOL_A_FEC_UNSPEC,
ETHTOOL_A_FEC_HEADER,
ETHTOOL_A_FEC_MODES,
ETHTOOL_A_FEC_AUTO,
ETHTOOL_A_FEC_ACTIVE,
ETHTOOL_A_FEC_STATS,
__ETHTOOL_A_FEC_CNT,
ETHTOOL_A_FEC_MAX = (__ETHTOOL_A_FEC_CNT - 1)
};
enum {
ETHTOOL_A_MODULE_EEPROM_UNSPEC,
ETHTOOL_A_MODULE_EEPROM_HEADER,
ETHTOOL_A_MODULE_EEPROM_OFFSET,
ETHTOOL_A_MODULE_EEPROM_LENGTH,
ETHTOOL_A_MODULE_EEPROM_PAGE,
ETHTOOL_A_MODULE_EEPROM_BANK,
ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS,
ETHTOOL_A_MODULE_EEPROM_DATA,
__ETHTOOL_A_MODULE_EEPROM_CNT,
ETHTOOL_A_MODULE_EEPROM_MAX = (__ETHTOOL_A_MODULE_EEPROM_CNT - 1)
};
enum {
ETHTOOL_A_STATS_GRP_UNSPEC,
ETHTOOL_A_STATS_GRP_PAD,
ETHTOOL_A_STATS_GRP_ID,
ETHTOOL_A_STATS_GRP_SS_ID,
ETHTOOL_A_STATS_GRP_STAT,
ETHTOOL_A_STATS_GRP_HIST_RX,
ETHTOOL_A_STATS_GRP_HIST_TX,
ETHTOOL_A_STATS_GRP_HIST_BKT_LOW,
ETHTOOL_A_STATS_GRP_HIST_BKT_HI,
ETHTOOL_A_STATS_GRP_HIST_VAL,
__ETHTOOL_A_STATS_GRP_CNT,
ETHTOOL_A_STATS_GRP_MAX = (__ETHTOOL_A_STATS_GRP_CNT - 1)
};
enum {
ETHTOOL_A_STATS_UNSPEC,
ETHTOOL_A_STATS_PAD,
ETHTOOL_A_STATS_HEADER,
ETHTOOL_A_STATS_GROUPS,
ETHTOOL_A_STATS_GRP,
ETHTOOL_A_STATS_SRC,
__ETHTOOL_A_STATS_CNT,
ETHTOOL_A_STATS_MAX = (__ETHTOOL_A_STATS_CNT - 1)
};
enum {
ETHTOOL_A_PHC_VCLOCKS_UNSPEC,
ETHTOOL_A_PHC_VCLOCKS_HEADER,
ETHTOOL_A_PHC_VCLOCKS_NUM,
ETHTOOL_A_PHC_VCLOCKS_INDEX,
__ETHTOOL_A_PHC_VCLOCKS_CNT,
ETHTOOL_A_PHC_VCLOCKS_MAX = (__ETHTOOL_A_PHC_VCLOCKS_CNT - 1)
};
enum {
ETHTOOL_A_MODULE_UNSPEC,
ETHTOOL_A_MODULE_HEADER,
ETHTOOL_A_MODULE_POWER_MODE_POLICY,
ETHTOOL_A_MODULE_POWER_MODE,
__ETHTOOL_A_MODULE_CNT,
ETHTOOL_A_MODULE_MAX = (__ETHTOOL_A_MODULE_CNT - 1)
};
enum {
ETHTOOL_A_C33_PSE_PW_LIMIT_UNSPEC,
ETHTOOL_A_C33_PSE_PW_LIMIT_MIN,
ETHTOOL_A_C33_PSE_PW_LIMIT_MAX,
__ETHTOOL_A_C33_PSE_PW_LIMIT_CNT,
__ETHTOOL_A_C33_PSE_PW_LIMIT_MAX = (__ETHTOOL_A_C33_PSE_PW_LIMIT_CNT - 1)
};
enum {
ETHTOOL_A_PSE_UNSPEC,
ETHTOOL_A_PSE_HEADER,
ETHTOOL_A_PODL_PSE_ADMIN_STATE,
ETHTOOL_A_PODL_PSE_ADMIN_CONTROL,
ETHTOOL_A_PODL_PSE_PW_D_STATUS,
ETHTOOL_A_C33_PSE_ADMIN_STATE,
ETHTOOL_A_C33_PSE_ADMIN_CONTROL,
ETHTOOL_A_C33_PSE_PW_D_STATUS,
ETHTOOL_A_C33_PSE_PW_CLASS,
ETHTOOL_A_C33_PSE_ACTUAL_PW,
ETHTOOL_A_C33_PSE_EXT_STATE,
ETHTOOL_A_C33_PSE_EXT_SUBSTATE,
ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT,
ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES,
ETHTOOL_A_PSE_PW_D_ID,
ETHTOOL_A_PSE_PRIO_MAX,
ETHTOOL_A_PSE_PRIO,
__ETHTOOL_A_PSE_CNT,
ETHTOOL_A_PSE_MAX = (__ETHTOOL_A_PSE_CNT - 1)
};
enum {
ETHTOOL_A_FLOW_ETHER = 1,
ETHTOOL_A_FLOW_IP4,
ETHTOOL_A_FLOW_IP6,
ETHTOOL_A_FLOW_TCP4,
ETHTOOL_A_FLOW_TCP6,
ETHTOOL_A_FLOW_UDP4,
ETHTOOL_A_FLOW_UDP6,
ETHTOOL_A_FLOW_SCTP4,
ETHTOOL_A_FLOW_SCTP6,
ETHTOOL_A_FLOW_AH4,
ETHTOOL_A_FLOW_AH6,
ETHTOOL_A_FLOW_ESP4,
ETHTOOL_A_FLOW_ESP6,
ETHTOOL_A_FLOW_AH_ESP4,
ETHTOOL_A_FLOW_AH_ESP6,
ETHTOOL_A_FLOW_GTPU4,
ETHTOOL_A_FLOW_GTPU6,
ETHTOOL_A_FLOW_GTPC4,
ETHTOOL_A_FLOW_GTPC6,
ETHTOOL_A_FLOW_GTPC_TEID4,
ETHTOOL_A_FLOW_GTPC_TEID6,
ETHTOOL_A_FLOW_GTPU_EH4,
ETHTOOL_A_FLOW_GTPU_EH6,
ETHTOOL_A_FLOW_GTPU_UL4,
ETHTOOL_A_FLOW_GTPU_UL6,
ETHTOOL_A_FLOW_GTPU_DL4,
ETHTOOL_A_FLOW_GTPU_DL6,
__ETHTOOL_A_FLOW_CNT,
ETHTOOL_A_FLOW_MAX = (__ETHTOOL_A_FLOW_CNT - 1)
};
enum {
ETHTOOL_A_RSS_UNSPEC,
ETHTOOL_A_RSS_HEADER,
ETHTOOL_A_RSS_CONTEXT,
ETHTOOL_A_RSS_HFUNC,
ETHTOOL_A_RSS_INDIR,
ETHTOOL_A_RSS_HKEY,
ETHTOOL_A_RSS_INPUT_XFRM,
ETHTOOL_A_RSS_START_CONTEXT,
ETHTOOL_A_RSS_FLOW_HASH,
__ETHTOOL_A_RSS_CNT,
ETHTOOL_A_RSS_MAX = (__ETHTOOL_A_RSS_CNT - 1)
};
enum {
ETHTOOL_A_PLCA_UNSPEC,
ETHTOOL_A_PLCA_HEADER,
ETHTOOL_A_PLCA_VERSION,
ETHTOOL_A_PLCA_ENABLED,
ETHTOOL_A_PLCA_STATUS,
ETHTOOL_A_PLCA_NODE_CNT,
ETHTOOL_A_PLCA_NODE_ID,
ETHTOOL_A_PLCA_TO_TMR,
ETHTOOL_A_PLCA_BURST_CNT,
ETHTOOL_A_PLCA_BURST_TMR,
__ETHTOOL_A_PLCA_CNT,
ETHTOOL_A_PLCA_MAX = (__ETHTOOL_A_PLCA_CNT - 1)
};
enum {
ETHTOOL_A_MODULE_FW_FLASH_UNSPEC,
ETHTOOL_A_MODULE_FW_FLASH_HEADER,
ETHTOOL_A_MODULE_FW_FLASH_FILE_NAME,
ETHTOOL_A_MODULE_FW_FLASH_PASSWORD,
ETHTOOL_A_MODULE_FW_FLASH_STATUS,
ETHTOOL_A_MODULE_FW_FLASH_STATUS_MSG,
ETHTOOL_A_MODULE_FW_FLASH_DONE,
ETHTOOL_A_MODULE_FW_FLASH_TOTAL,
__ETHTOOL_A_MODULE_FW_FLASH_CNT,
ETHTOOL_A_MODULE_FW_FLASH_MAX = (__ETHTOOL_A_MODULE_FW_FLASH_CNT - 1)
};
enum {
ETHTOOL_A_PHY_UNSPEC,
ETHTOOL_A_PHY_HEADER,
ETHTOOL_A_PHY_INDEX,
ETHTOOL_A_PHY_DRVNAME,
ETHTOOL_A_PHY_NAME,
ETHTOOL_A_PHY_UPSTREAM_TYPE,
ETHTOOL_A_PHY_UPSTREAM_INDEX,
ETHTOOL_A_PHY_UPSTREAM_SFP_NAME,
ETHTOOL_A_PHY_DOWNSTREAM_SFP_NAME,
__ETHTOOL_A_PHY_CNT,
ETHTOOL_A_PHY_MAX = (__ETHTOOL_A_PHY_CNT - 1)
};
enum {
ETHTOOL_A_TSCONFIG_UNSPEC,
ETHTOOL_A_TSCONFIG_HEADER,
ETHTOOL_A_TSCONFIG_HWTSTAMP_PROVIDER,
ETHTOOL_A_TSCONFIG_TX_TYPES,
ETHTOOL_A_TSCONFIG_RX_FILTERS,
ETHTOOL_A_TSCONFIG_HWTSTAMP_FLAGS,
__ETHTOOL_A_TSCONFIG_CNT,
ETHTOOL_A_TSCONFIG_MAX = (__ETHTOOL_A_TSCONFIG_CNT - 1)
};
enum {
ETHTOOL_A_PSE_NTF_HEADER = 1,
ETHTOOL_A_PSE_NTF_EVENTS,
__ETHTOOL_A_PSE_NTF_CNT,
ETHTOOL_A_PSE_NTF_MAX = (__ETHTOOL_A_PSE_NTF_CNT - 1)
};
enum {
ETHTOOL_MSG_USER_NONE = 0,
ETHTOOL_MSG_STRSET_GET = 1,
ETHTOOL_MSG_LINKINFO_GET,
ETHTOOL_MSG_LINKINFO_SET,
ETHTOOL_MSG_LINKMODES_GET,
ETHTOOL_MSG_LINKMODES_SET,
ETHTOOL_MSG_LINKSTATE_GET,
ETHTOOL_MSG_DEBUG_GET,
ETHTOOL_MSG_DEBUG_SET,
ETHTOOL_MSG_WOL_GET,
ETHTOOL_MSG_WOL_SET,
ETHTOOL_MSG_FEATURES_GET,
ETHTOOL_MSG_FEATURES_SET,
ETHTOOL_MSG_PRIVFLAGS_GET,
ETHTOOL_MSG_PRIVFLAGS_SET,
ETHTOOL_MSG_RINGS_GET,
ETHTOOL_MSG_RINGS_SET,
ETHTOOL_MSG_CHANNELS_GET,
ETHTOOL_MSG_CHANNELS_SET,
ETHTOOL_MSG_COALESCE_GET,
ETHTOOL_MSG_COALESCE_SET,
ETHTOOL_MSG_PAUSE_GET,
ETHTOOL_MSG_PAUSE_SET,
ETHTOOL_MSG_EEE_GET,
ETHTOOL_MSG_EEE_SET,
ETHTOOL_MSG_TSINFO_GET,
ETHTOOL_MSG_CABLE_TEST_ACT,
ETHTOOL_MSG_CABLE_TEST_TDR_ACT,
ETHTOOL_MSG_TUNNEL_INFO_GET,
ETHTOOL_MSG_FEC_GET,
ETHTOOL_MSG_FEC_SET,
ETHTOOL_MSG_MODULE_EEPROM_GET,
ETHTOOL_MSG_STATS_GET,
ETHTOOL_MSG_PHC_VCLOCKS_GET,
ETHTOOL_MSG_MODULE_GET,
ETHTOOL_MSG_MODULE_SET,
ETHTOOL_MSG_PSE_GET,
ETHTOOL_MSG_PSE_SET,
ETHTOOL_MSG_RSS_GET,
ETHTOOL_MSG_PLCA_GET_CFG,
ETHTOOL_MSG_PLCA_SET_CFG,
ETHTOOL_MSG_PLCA_GET_STATUS,
ETHTOOL_MSG_MM_GET,
ETHTOOL_MSG_MM_SET,
ETHTOOL_MSG_MODULE_FW_FLASH_ACT,
ETHTOOL_MSG_PHY_GET,
ETHTOOL_MSG_TSCONFIG_GET,
ETHTOOL_MSG_TSCONFIG_SET,
ETHTOOL_MSG_RSS_SET,
ETHTOOL_MSG_RSS_CREATE_ACT,
ETHTOOL_MSG_RSS_DELETE_ACT,
__ETHTOOL_MSG_USER_CNT,
ETHTOOL_MSG_USER_MAX = (__ETHTOOL_MSG_USER_CNT - 1)
};
enum {
ETHTOOL_MSG_KERNEL_NONE = 0,
ETHTOOL_MSG_STRSET_GET_REPLY = 1,
ETHTOOL_MSG_LINKINFO_GET_REPLY,
ETHTOOL_MSG_LINKINFO_NTF,
ETHTOOL_MSG_LINKMODES_GET_REPLY,
ETHTOOL_MSG_LINKMODES_NTF,
ETHTOOL_MSG_LINKSTATE_GET_REPLY,
ETHTOOL_MSG_DEBUG_GET_REPLY,
ETHTOOL_MSG_DEBUG_NTF,
ETHTOOL_MSG_WOL_GET_REPLY,
ETHTOOL_MSG_WOL_NTF,
ETHTOOL_MSG_FEATURES_GET_REPLY,
ETHTOOL_MSG_FEATURES_SET_REPLY,
ETHTOOL_MSG_FEATURES_NTF,
ETHTOOL_MSG_PRIVFLAGS_GET_REPLY,
ETHTOOL_MSG_PRIVFLAGS_NTF,
ETHTOOL_MSG_RINGS_GET_REPLY,
ETHTOOL_MSG_RINGS_NTF,
ETHTOOL_MSG_CHANNELS_GET_REPLY,
ETHTOOL_MSG_CHANNELS_NTF,
ETHTOOL_MSG_COALESCE_GET_REPLY,
ETHTOOL_MSG_COALESCE_NTF,
ETHTOOL_MSG_PAUSE_GET_REPLY,
ETHTOOL_MSG_PAUSE_NTF,
ETHTOOL_MSG_EEE_GET_REPLY,
ETHTOOL_MSG_EEE_NTF,
ETHTOOL_MSG_TSINFO_GET_REPLY,
ETHTOOL_MSG_CABLE_TEST_NTF,
ETHTOOL_MSG_CABLE_TEST_TDR_NTF,
ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY,
ETHTOOL_MSG_FEC_GET_REPLY,
ETHTOOL_MSG_FEC_NTF,
ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY,
ETHTOOL_MSG_STATS_GET_REPLY,
ETHTOOL_MSG_PHC_VCLOCKS_GET_REPLY,
ETHTOOL_MSG_MODULE_GET_REPLY,
ETHTOOL_MSG_MODULE_NTF,
ETHTOOL_MSG_PSE_GET_REPLY,
ETHTOOL_MSG_RSS_GET_REPLY,
ETHTOOL_MSG_PLCA_GET_CFG_REPLY,
ETHTOOL_MSG_PLCA_GET_STATUS_REPLY,
ETHTOOL_MSG_PLCA_NTF,
ETHTOOL_MSG_MM_GET_REPLY,
ETHTOOL_MSG_MM_NTF,
ETHTOOL_MSG_MODULE_FW_FLASH_NTF,
ETHTOOL_MSG_PHY_GET_REPLY,
ETHTOOL_MSG_PHY_NTF,
ETHTOOL_MSG_TSCONFIG_GET_REPLY,
ETHTOOL_MSG_TSCONFIG_SET_REPLY,
ETHTOOL_MSG_PSE_NTF,
ETHTOOL_MSG_RSS_NTF,
ETHTOOL_MSG_RSS_CREATE_ACT_REPLY,
ETHTOOL_MSG_RSS_CREATE_NTF,
ETHTOOL_MSG_RSS_DELETE_NTF,
__ETHTOOL_MSG_KERNEL_CNT,
ETHTOOL_MSG_KERNEL_MAX = (__ETHTOOL_MSG_KERNEL_CNT - 1)
};
#define ETHTOOL_MCGRP_MONITOR_NAME "monitor"
#endif /* _LINUX_ETHTOOL_NETLINK_GENERATED_H */

7
lib/libc/include/any-linux-any/linux/f2fs.h vendored
View File

@ -44,6 +44,7 @@
#define F2FS_IOC_COMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 24)
#define F2FS_IOC_START_ATOMIC_REPLACE _IO(F2FS_IOCTL_MAGIC, 25)
#define F2FS_IOC_GET_DEV_ALIAS_FILE _IOR(F2FS_IOCTL_MAGIC, 26, __u32)
#define F2FS_IOC_IO_PRIO _IOW(F2FS_IOCTL_MAGIC, 27, __u32)
/*
* should be same as XFS_IOC_GOINGDOWN.
@ -63,6 +64,12 @@
#define F2FS_TRIM_FILE_ZEROOUT 0x2 /* zero out */
#define F2FS_TRIM_FILE_MASK 0x3
/* for F2FS_IOC_IO_PRIO */
enum {
F2FS_IOPRIO_WRITE = 1, /* high write priority */
F2FS_IOPRIO_MAX,
};
struct f2fs_gc_range {
__u32 sync;
__u64 start;

17
lib/libc/include/any-linux-any/linux/falloc.h vendored
View File

@ -78,4 +78,21 @@
*/
#define FALLOC_FL_UNSHARE_RANGE 0x40
/*
* FALLOC_FL_WRITE_ZEROES zeroes a specified file range in such a way that
* subsequent writes to that range do not require further changes to the file
* mapping metadata. This flag is beneficial for subsequent pure overwriting
* within this range, as it can save on block allocation and, consequently,
* significant metadata changes. Therefore, filesystems that always require
* out-of-place writes should not support this flag.
*
* Different filesystems may implement different limitations on the
* granularity of the zeroing operation. Most will preferably be accelerated
* by submitting write zeroes command if the backing storage supports, which
* may not physically write zeros to the media.
*
* This flag cannot be specified in conjunction with the FALLOC_FL_KEEP_SIZE.
*/
#define FALLOC_FL_WRITE_ZEROES 0x80
#endif /* _FALLOC_H_ */

28
lib/libc/include/any-linux-any/linux/fanotify.h vendored
View File

@ -25,6 +25,11 @@
#define FAN_OPEN_PERM 0x00010000 /* File open in perm check */
#define FAN_ACCESS_PERM 0x00020000 /* File accessed in perm check */
#define FAN_OPEN_EXEC_PERM 0x00040000 /* File open/exec in perm check */
/* #define FAN_DIR_MODIFY 0x00080000 */ /* Deprecated (reserved) */
#define FAN_PRE_ACCESS 0x00100000 /* Pre-content access hook */
#define FAN_MNT_ATTACH 0x01000000 /* Mount was attached */
#define FAN_MNT_DETACH 0x02000000 /* Mount was detached */
#define FAN_EVENT_ON_CHILD 0x08000000 /* Interested in child events */
@ -61,6 +66,7 @@
#define FAN_REPORT_NAME 0x00000800 /* Report events with name */
#define FAN_REPORT_TARGET_FID 0x00001000 /* Report dirent target id */
#define FAN_REPORT_FD_ERROR 0x00002000 /* event->fd can report error */
#define FAN_REPORT_MNT 0x00004000 /* Report mount events */
/* Convenience macro - FAN_REPORT_NAME requires FAN_REPORT_DIR_FID */
#define FAN_REPORT_DFID_NAME (FAN_REPORT_DIR_FID | FAN_REPORT_NAME)
@ -91,6 +97,7 @@
#define FAN_MARK_INODE 0x00000000
#define FAN_MARK_MOUNT 0x00000010
#define FAN_MARK_FILESYSTEM 0x00000100
#define FAN_MARK_MNTNS 0x00000110
/*
* Convenience macro - FAN_MARK_IGNORE requires FAN_MARK_IGNORED_SURV_MODIFY
@ -143,6 +150,8 @@ struct fanotify_event_metadata {
#define FAN_EVENT_INFO_TYPE_DFID 3
#define FAN_EVENT_INFO_TYPE_PIDFD 4
#define FAN_EVENT_INFO_TYPE_ERROR 5
#define FAN_EVENT_INFO_TYPE_RANGE 6
#define FAN_EVENT_INFO_TYPE_MNT 7
/* Special info types for FAN_RENAME */
#define FAN_EVENT_INFO_TYPE_OLD_DFID_NAME 10
@ -189,6 +198,18 @@ struct fanotify_event_info_error {
__u32 error_count;
};
struct fanotify_event_info_range {
struct fanotify_event_info_header hdr;
__u32 pad;
__u64 offset;
__u64 count;
};
struct fanotify_event_info_mnt {
struct fanotify_event_info_header hdr;
__u64 mnt_id;
};
/*
* User space may need to record additional information about its decision.
* The extra information type records what kind of information is included.
@ -224,6 +245,13 @@ struct fanotify_response_info_audit_rule {
/* Legit userspace responses to a _PERM event */
#define FAN_ALLOW 0x01
#define FAN_DENY 0x02
/* errno other than EPERM can specified in upper byte of deny response */
#define FAN_ERRNO_BITS 8
#define FAN_ERRNO_SHIFT (32 - FAN_ERRNO_BITS)
#define FAN_ERRNO_MASK ((1 << FAN_ERRNO_BITS) - 1)
#define FAN_DENY_ERRNO(err) \
(FAN_DENY | ((((__u32)(err)) & FAN_ERRNO_MASK) << FAN_ERRNO_SHIFT))
#define FAN_AUDIT 0x10 /* Bitmask to create audit record for result */
#define FAN_INFO 0x20 /* Bitmask to indicate additional information */

22
lib/libc/include/any-linux-any/linux/fcntl.h vendored
View File

@ -90,10 +90,28 @@
#define DN_ATTRIB 0x00000020 /* File changed attibutes */
#define DN_MULTISHOT 0x80000000 /* Don't remove notifier */
/* Reserved kernel ranges [-100], [-10000, -40000]. */
#define AT_FDCWD -100 /* Special value for dirfd used to
indicate openat should use the
current working directory. */
/*
* The concept of process and threads in userland and the kernel is a confusing
* one - within the kernel every thread is a 'task' with its own individual PID,
* however from userland's point of view threads are grouped by a single PID,
* which is that of the 'thread group leader', typically the first thread
* spawned.
*
* To cut the Gideon knot, for internal kernel usage, we refer to
* PIDFD_SELF_THREAD to refer to the current thread (or task from a kernel
* perspective), and PIDFD_SELF_THREAD_GROUP to refer to the current thread
* group leader...
*/
#define PIDFD_SELF_THREAD -10000 /* Current thread. */
#define PIDFD_SELF_THREAD_GROUP -10001 /* Current thread group leader. */
#define FD_PIDFS_ROOT -10002 /* Root of the pidfs filesystem */
#define FD_INVALID -10009 /* Invalid file descriptor: -10000 - EBADF = -10009 */
/* Generic flags for the *at(2) family of syscalls. */
@ -155,4 +173,8 @@
#define AT_HANDLE_MNT_ID_UNIQUE 0x001 /* Return the u64 unique mount ID. */
#define AT_HANDLE_CONNECTABLE 0x002 /* Request a connectable file handle */
/* Flags for execveat2(2). */
#define AT_EXECVE_CHECK 0x10000 /* Only perform a check if execution
would be allowed. */
#endif /* _LINUX_FCNTL_H */

5
lib/libc/include/any-linux-any/linux/fib_rules.h vendored
View File

@ -68,6 +68,11 @@ enum {
FRA_SPORT_RANGE, /* sport */
FRA_DPORT_RANGE, /* dport */
FRA_DSCP, /* dscp */
FRA_FLOWLABEL, /* flowlabel */
FRA_FLOWLABEL_MASK, /* flowlabel mask */
FRA_SPORT_MASK, /* sport mask */
FRA_DPORT_MASK, /* dport mask */
FRA_DSCP_MASK, /* dscp mask */
__FRA_MAX
};

47
lib/libc/include/any-linux-any/linux/fiemap.h vendored
View File

@ -14,37 +14,56 @@
#include <linux/types.h>
/**
* struct fiemap_extent - description of one fiemap extent
* @fe_logical: byte offset of the extent in the file
* @fe_physical: byte offset of extent on disk
* @fe_length: length in bytes for this extent
* @fe_flags: FIEMAP_EXTENT_* flags for this extent
*/
struct fiemap_extent {
__u64 fe_logical; /* logical offset in bytes for the start of
* the extent from the beginning of the file */
__u64 fe_physical; /* physical offset in bytes for the start
* of the extent from the beginning of the disk */
__u64 fe_length; /* length in bytes for this extent */
__u64 fe_logical;
__u64 fe_physical;
__u64 fe_length;
/* private: */
__u64 fe_reserved64[2];
__u32 fe_flags; /* FIEMAP_EXTENT_* flags for this extent */
/* public: */
__u32 fe_flags;
/* private: */
__u32 fe_reserved[3];
};
/**
* struct fiemap - file extent mappings
* @fm_start: byte offset (inclusive) at which to start mapping (in)
* @fm_length: logical length of mapping which userspace wants (in)
* @fm_flags: FIEMAP_FLAG_* flags for request (in/out)
* @fm_mapped_extents: number of extents that were mapped (out)
* @fm_extent_count: size of fm_extents array (in)
* @fm_extents: array of mapped extents (out)
*/
struct fiemap {
__u64 fm_start; /* logical offset (inclusive) at
* which to start mapping (in) */
__u64 fm_length; /* logical length of mapping which
* userspace wants (in) */
__u32 fm_flags; /* FIEMAP_FLAG_* flags for request (in/out) */
__u32 fm_mapped_extents;/* number of extents that were mapped (out) */
__u32 fm_extent_count; /* size of fm_extents array (in) */
__u64 fm_start;
__u64 fm_length;
__u32 fm_flags;
__u32 fm_mapped_extents;
__u32 fm_extent_count;
/* private: */
__u32 fm_reserved;
struct fiemap_extent fm_extents[]; /* array of mapped extents (out) */
/* public: */
struct fiemap_extent fm_extents[];
};
#define FIEMAP_MAX_OFFSET (~0ULL)
/* flags used in fm_flags: */
#define FIEMAP_FLAG_SYNC 0x00000001 /* sync file data before map */
#define FIEMAP_FLAG_XATTR 0x00000002 /* map extended attribute tree */
#define FIEMAP_FLAG_CACHE 0x00000004 /* request caching of the extents */
#define FIEMAP_FLAGS_COMPAT (FIEMAP_FLAG_SYNC | FIEMAP_FLAG_XATTR)
/* flags used in fe_flags: */
#define FIEMAP_EXTENT_LAST 0x00000001 /* Last extent in file. */
#define FIEMAP_EXTENT_UNKNOWN 0x00000002 /* Data location unknown. */
#define FIEMAP_EXTENT_DELALLOC 0x00000004 /* Location still pending.

3
lib/libc/include/any-linux-any/linux/firewire-cdev.h vendored
View File

@ -449,7 +449,8 @@ struct fw_cdev_event_phy_packet {
* which the packet arrived. For %FW_CDEV_EVENT_PHY_PACKET_SENT2 and non-ping packet,
* the time stamp of isochronous cycle at which the packet was sent. For ping packet,
* the tick count for round-trip time measured by 1394 OHCI controller.
* The time stamp of isochronous cycle at which either the response was sent for
*
* The time stamp of isochronous cycle at which either the response was sent for
* %FW_CDEV_EVENT_PHY_PACKET_SENT2 or the request arrived for
* %FW_CDEV_EVENT_PHY_PACKET_RECEIVED2.
* @data: Incoming data

110
lib/libc/include/any-linux-any/linux/fs.h vendored
View File

@ -36,6 +36,15 @@
#define BLOCK_SIZE_BITS 10
#define BLOCK_SIZE (1<<BLOCK_SIZE_BITS)
/* flags for integrity meta */
#define IO_INTEGRITY_CHK_GUARD (1U << 0) /* enforce guard check */
#define IO_INTEGRITY_CHK_REFTAG (1U << 1) /* enforce ref check */
#define IO_INTEGRITY_CHK_APPTAG (1U << 2) /* enforce app check */
#define IO_INTEGRITY_VALID_FLAGS (IO_INTEGRITY_CHK_GUARD | \
IO_INTEGRITY_CHK_REFTAG | \
IO_INTEGRITY_CHK_APPTAG)
#define SEEK_SET 0 /* seek relative to beginning of file */
#define SEEK_CUR 1 /* seek relative to current file position */
#define SEEK_END 2 /* seek relative to end of file */
@ -47,6 +56,17 @@
#define RENAME_EXCHANGE (1 << 1) /* Exchange source and dest */
#define RENAME_WHITEOUT (1 << 2) /* Whiteout source */
/*
* The root inode of procfs is guaranteed to always have the same inode number.
* For programs that make heavy use of procfs, verifying that the root is a
* real procfs root and using openat2(RESOLVE_{NO_{XDEV,MAGICLINKS},BENEATH})
* will allow you to make sure you are never tricked into operating on the
* wrong procfs file.
*/
enum procfs_ino {
PROCFS_ROOT_INO = 1,
};
struct file_clone_range {
__s64 src_fd;
__u64 src_offset;
@ -78,6 +98,63 @@ struct fs_sysfs_path {
__u8 name[128];
};
/* Protection info capability flags */
#define LBMD_PI_CAP_INTEGRITY (1 << 0)
#define LBMD_PI_CAP_REFTAG (1 << 1)
/* Checksum types for Protection Information */
#define LBMD_PI_CSUM_NONE 0
#define LBMD_PI_CSUM_IP 1
#define LBMD_PI_CSUM_CRC16_T10DIF 2
#define LBMD_PI_CSUM_CRC64_NVME 4
/* sizeof first published struct */
#define LBMD_SIZE_VER0 16
/*
* Logical block metadata capability descriptor
* If the device does not support metadata, all the fields will be zero.
* Applications must check lbmd_flags to determine whether metadata is
* supported or not.
*/
struct logical_block_metadata_cap {
/* Bitmask of logical block metadata capability flags */
__u32 lbmd_flags;
/*
* The amount of data described by each unit of logical block
* metadata
*/
__u16 lbmd_interval;
/*
* Size in bytes of the logical block metadata associated with each
* interval
*/
__u8 lbmd_size;
/*
* Size in bytes of the opaque block tag associated with each
* interval
*/
__u8 lbmd_opaque_size;
/*
* Offset in bytes of the opaque block tag within the logical block
* metadata
*/
__u8 lbmd_opaque_offset;
/* Size in bytes of the T10 PI tuple associated with each interval */
__u8 lbmd_pi_size;
/* Offset in bytes of T10 PI tuple within the logical block metadata */
__u8 lbmd_pi_offset;
/* T10 PI guard tag type */
__u8 lbmd_guard_tag_type;
/* Size in bytes of the T10 PI application tag */
__u8 lbmd_app_tag_size;
/* Size in bytes of the T10 PI reference tag */
__u8 lbmd_ref_tag_size;
/* Size in bytes of the T10 PI storage tag */
__u8 lbmd_storage_tag_size;
__u8 pad;
};
/* extent-same (dedupe) ioctls; these MUST match the btrfs ioctl definitions */
#define FILE_DEDUPE_RANGE_SAME 0
#define FILE_DEDUPE_RANGE_DIFFERS 1
@ -135,6 +212,24 @@ struct fsxattr {
unsigned char fsx_pad[8];
};
/*
* Variable size structure for file_[sg]et_attr().
*
* Note. This is alternative to the structure 'struct file_kattr'/'struct fsxattr'.
* As this structure is passed to/from userspace with its size, this can
* be versioned based on the size.
*/
struct file_attr {
__u64 fa_xflags; /* xflags field value (get/set) */
__u32 fa_extsize; /* extsize field value (get/set)*/
__u32 fa_nextents; /* nextents field value (get) */
__u32 fa_projid; /* project identifier (get/set) */
__u32 fa_cowextsize; /* CoW extsize field value (get/set) */
};
#define FILE_ATTR_SIZE_VER0 24
#define FILE_ATTR_SIZE_LATEST FILE_ATTR_SIZE_VER0
/*
* Flags for the fsx_xflags field
*/
@ -199,10 +294,8 @@ struct fsxattr {
#define BLKROTATIONAL _IO(0x12,126)
#define BLKZEROOUT _IO(0x12,127)
#define BLKGETDISKSEQ _IOR(0x12,128,__u64)
/*
* A jump here: 130-136 are reserved for zoned block devices
* (see uapi/linux/blkzoned.h)
*/
/* 130-136 are used by zoned block device ioctls (uapi/linux/blkzoned.h) */
/* 137-141 are used by blk-crypto ioctls (uapi/linux/blk-crypto.h) */
#define BMAP_IOCTL 1 /* obsolete - kept for compatibility */
#define FIBMAP _IO(0x00,1) /* bmap access */
@ -236,6 +329,8 @@ struct fsxattr {
* also /sys/kernel/debug/ for filesystems with debugfs exports
*/
#define FS_IOC_GETFSSYSFSPATH _IOR(0x15, 1, struct fs_sysfs_path)
/* Get logical block metadata capability details */
#define FS_IOC_GETLBMD_CAP _IOWR(0x15, 2, struct logical_block_metadata_cap)
/*
* Inode flags (FS_IOC_GETFLAGS / FS_IOC_SETFLAGS)
@ -328,9 +423,13 @@ typedef int __bitwise __kernel_rwf_t;
/* Atomic Write */
#define RWF_ATOMIC ((__kernel_rwf_t)0x00000040)
/* buffered IO that drops the cache after reading or writing data */
#define RWF_DONTCACHE ((__kernel_rwf_t)0x00000080)
/* mask of flags supported by the kernel */
#define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\
RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC)
RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC |\
RWF_DONTCACHE)
#define PROCFS_IOCTL_MAGIC 'f'
@ -346,6 +445,7 @@ typedef int __bitwise __kernel_rwf_t;
#define PAGE_IS_PFNZERO (1 << 5)
#define PAGE_IS_HUGE (1 << 6)
#define PAGE_IS_SOFT_DIRTY (1 << 7)
#define PAGE_IS_GUARD (1 << 8)
/*
* struct page_region - Page region with flags

6
lib/libc/include/any-linux-any/linux/fscrypt.h vendored
View File

@ -119,7 +119,7 @@ struct fscrypt_key_specifier {
*/
struct fscrypt_provisioning_key_payload {
__u32 type;
__u32 __reserved;
__u32 flags;
__u8 raw[];
};
@ -128,7 +128,9 @@ struct fscrypt_add_key_arg {
struct fscrypt_key_specifier key_spec;
__u32 raw_size;
__u32 key_id;
__u32 __reserved[8];
#define FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED 0x00000001
__u32 flags;
__u32 __reserved[7];
__u8 raw[];
};

90
lib/libc/include/any-linux-any/linux/fuse.h vendored
View File

@ -220,6 +220,21 @@
*
* 7.41
* - add FUSE_ALLOW_IDMAP
* 7.42
* - Add FUSE_OVER_IO_URING and all other io-uring related flags and data
* structures:
* - struct fuse_uring_ent_in_out
* - struct fuse_uring_req_header
* - struct fuse_uring_cmd_req
* - FUSE_URING_IN_OUT_HEADER_SZ
* - FUSE_URING_OP_IN_OUT_SZ
* - enum fuse_uring_cmd
*
* 7.43
* - add FUSE_REQUEST_TIMEOUT
*
* 7.44
* - add FUSE_NOTIFY_INC_EPOCH
*/
#ifndef _LINUX_FUSE_H
@ -251,7 +266,7 @@
#define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 41
#define FUSE_KERNEL_MINOR_VERSION 44
/** The node ID of the root inode */
#define FUSE_ROOT_ID 1
@ -421,6 +436,9 @@ struct fuse_file_lock {
* FUSE_HAS_RESEND: kernel supports resending pending requests, and the high bit
* of the request ID indicates resend requests
* FUSE_ALLOW_IDMAP: allow creation of idmapped mounts
* FUSE_OVER_IO_URING: Indicate that client supports io-uring
* FUSE_REQUEST_TIMEOUT: kernel supports timing out requests.
* init_out.request_timeout contains the timeout (in secs)
*/
#define FUSE_ASYNC_READ (1 << 0)
#define FUSE_POSIX_LOCKS (1 << 1)
@ -463,10 +481,11 @@ struct fuse_file_lock {
#define FUSE_PASSTHROUGH (1ULL << 37)
#define FUSE_NO_EXPORT_SUPPORT (1ULL << 38)
#define FUSE_HAS_RESEND (1ULL << 39)
/* Obsolete alias for FUSE_DIRECT_IO_ALLOW_MMAP */
#define FUSE_DIRECT_IO_RELAX FUSE_DIRECT_IO_ALLOW_MMAP
#define FUSE_ALLOW_IDMAP (1ULL << 40)
#define FUSE_OVER_IO_URING (1ULL << 41)
#define FUSE_REQUEST_TIMEOUT (1ULL << 42)
/**
* CUSE INIT request/reply flags
@ -651,6 +670,7 @@ enum fuse_notify_code {
FUSE_NOTIFY_RETRIEVE = 5,
FUSE_NOTIFY_DELETE = 6,
FUSE_NOTIFY_RESEND = 7,
FUSE_NOTIFY_INC_EPOCH = 8,
FUSE_NOTIFY_CODE_MAX,
};
@ -894,7 +914,8 @@ struct fuse_init_out {
uint16_t map_alignment;
uint32_t flags2;
uint32_t max_stack_depth;
uint32_t unused[6];
uint16_t request_timeout;
uint16_t unused[11];
};
#define CUSE_INIT_INFO_MAX 4096
@ -1202,4 +1223,67 @@ struct fuse_supp_groups {
uint32_t groups[];
};
/**
* Size of the ring buffer header
*/
#define FUSE_URING_IN_OUT_HEADER_SZ 128
#define FUSE_URING_OP_IN_OUT_SZ 128
/* Used as part of the fuse_uring_req_header */
struct fuse_uring_ent_in_out {
uint64_t flags;
/*
* commit ID to be used in a reply to a ring request (see also
* struct fuse_uring_cmd_req)
*/
uint64_t commit_id;
/* size of user payload buffer */
uint32_t payload_sz;
uint32_t padding;
uint64_t reserved;
};
/**
* Header for all fuse-io-uring requests
*/
struct fuse_uring_req_header {
/* struct fuse_in_header / struct fuse_out_header */
char in_out[FUSE_URING_IN_OUT_HEADER_SZ];
/* per op code header */
char op_in[FUSE_URING_OP_IN_OUT_SZ];
struct fuse_uring_ent_in_out ring_ent_in_out;
};
/**
* sqe commands to the kernel
*/
enum fuse_uring_cmd {
FUSE_IO_URING_CMD_INVALID = 0,
/* register the request buffer and fetch a fuse request */
FUSE_IO_URING_CMD_REGISTER = 1,
/* commit fuse request result and fetch next request */
FUSE_IO_URING_CMD_COMMIT_AND_FETCH = 2,
};
/**
* In the 80B command area of the SQE.
*/
struct fuse_uring_cmd_req {
uint64_t flags;
/* entry identifier for commits */
uint64_t commit_id;
/* queue the command is for (queue index) */
uint16_t qid;
uint8_t padding[6];
};
#endif /* _LINUX_FUSE_H */

9
lib/libc/include/any-linux-any/linux/futex.h vendored
View File

@ -63,7 +63,7 @@
#define FUTEX2_SIZE_U32 0x02
#define FUTEX2_SIZE_U64 0x03
#define FUTEX2_NUMA 0x04
/* 0x08 */
#define FUTEX2_MPOL 0x08
/* 0x10 */
/* 0x20 */
/* 0x40 */
@ -74,6 +74,13 @@
/* do not use */
#define FUTEX_32 FUTEX2_SIZE_U32 /* historical accident :-( */
/*
* When FUTEX2_NUMA doubles the futex word, the second word is a node value.
* The special value -1 indicates no-node. This is the same value as
* NUMA_NO_NODE, except that value is not ABI, this is.
*/
#define FUTEX_NO_NODE (-1)
/*
* Max numbers of elements in a futex_waitv array
*/

1
lib/libc/include/any-linux-any/linux/handshake.h vendored
View File

@ -45,6 +45,7 @@ enum {
HANDSHAKE_A_ACCEPT_PEER_IDENTITY,
HANDSHAKE_A_ACCEPT_CERTIFICATE,
HANDSHAKE_A_ACCEPT_PEERNAME,
HANDSHAKE_A_ACCEPT_KEYRING,
__HANDSHAKE_A_ACCEPT_MAX,
HANDSHAKE_A_ACCEPT_MAX = (__HANDSHAKE_A_ACCEPT_MAX - 1)

3
lib/libc/include/any-linux-any/linux/i2c.h vendored
View File

@ -21,7 +21,8 @@
*
* @flags:
* Supported by all adapters:
* %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
* %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001! If
* not set, the transaction is interpreted as write.
*
* Optional:
* %I2C_M_DMA_SAFE: the buffer of this message is DMA safe. Makes only sense

10
lib/libc/include/any-linux-any/linux/if_bridge.h vendored
View File

@ -699,10 +699,11 @@ struct br_mdb_entry {
#define MDB_TEMPORARY 0
#define MDB_PERMANENT 1
__u8 state;
#define MDB_FLAGS_OFFLOAD (1 << 0)
#define MDB_FLAGS_FAST_LEAVE (1 << 1)
#define MDB_FLAGS_STAR_EXCL (1 << 2)
#define MDB_FLAGS_BLOCKED (1 << 3)
#define MDB_FLAGS_OFFLOAD (1 << 0)
#define MDB_FLAGS_FAST_LEAVE (1 << 1)
#define MDB_FLAGS_STAR_EXCL (1 << 2)
#define MDB_FLAGS_BLOCKED (1 << 3)
#define MDB_FLAGS_OFFLOAD_FAILED (1 << 4)
__u8 flags;
__u16 vid;
struct {
@ -830,6 +831,7 @@ enum br_boolopt_id {
BR_BOOLOPT_NO_LL_LEARN,
BR_BOOLOPT_MCAST_VLAN_SNOOPING,
BR_BOOLOPT_MST_ENABLE,
BR_BOOLOPT_MDB_OFFLOAD_FAIL_NOTIFICATION,
BR_BOOLOPT_MAX
};

23
lib/libc/include/any-linux-any/linux/if_cablemodem.h vendored
View File

@ -1,23 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
#ifndef _LINUX_CABLEMODEM_H_
#define _LINUX_CABLEMODEM_H_
/*
* Author: Franco Venturi <fventuri@mediaone.net>
* Copyright 1998 Franco Venturi
*
* This program is free software; you can redistribute it
* and/or modify it under the terms of the GNU General
* Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
/* some useful defines for sb1000.c e cmconfig.c - fv */
#define SIOCGCMSTATS (SIOCDEVPRIVATE+0) /* get cable modem stats */
#define SIOCGCMFIRMWARE (SIOCDEVPRIVATE+1) /* get cm firmware version */
#define SIOCGCMFREQUENCY (SIOCDEVPRIVATE+2) /* get cable modem frequency */
#define SIOCSCMFREQUENCY (SIOCDEVPRIVATE+3) /* set cable modem frequency */
#define SIOCGCMPIDS (SIOCDEVPRIVATE+4) /* get cable modem PIDs */
#define SIOCSCMPIDS (SIOCDEVPRIVATE+5) /* set cable modem PIDs */
#endif

27
lib/libc/include/any-linux-any/linux/if_link.h vendored
View File

@ -378,6 +378,7 @@ enum {
IFLA_GRO_IPV4_MAX_SIZE,
IFLA_DPLL_PIN,
IFLA_MAX_PACING_OFFLOAD_HORIZON,
IFLA_NETNS_IMMUTABLE,
__IFLA_MAX
};
@ -1313,6 +1314,8 @@ enum {
IFLA_NETKIT_MODE,
IFLA_NETKIT_SCRUB,
IFLA_NETKIT_PEER_SCRUB,
IFLA_NETKIT_HEADROOM,
IFLA_NETKIT_TAILROOM,
__IFLA_NETKIT_MAX,
};
#define IFLA_NETKIT_MAX (__IFLA_NETKIT_MAX - 1)
@ -1392,6 +1395,8 @@ enum {
IFLA_VXLAN_VNIFILTER, /* only applicable with COLLECT_METADATA mode */
IFLA_VXLAN_LOCALBYPASS,
IFLA_VXLAN_LABEL_POLICY, /* IPv6 flow label policy; ifla_vxlan_label_policy */
IFLA_VXLAN_RESERVED_BITS,
IFLA_VXLAN_MC_ROUTE,
__IFLA_VXLAN_MAX
};
#define IFLA_VXLAN_MAX (__IFLA_VXLAN_MAX - 1)
@ -1433,6 +1438,7 @@ enum {
IFLA_GENEVE_TTL_INHERIT,
IFLA_GENEVE_DF,
IFLA_GENEVE_INNER_PROTO_INHERIT,
IFLA_GENEVE_PORT_RANGE,
__IFLA_GENEVE_MAX
};
#define IFLA_GENEVE_MAX (__IFLA_GENEVE_MAX - 1)
@ -1445,6 +1451,11 @@ enum ifla_geneve_df {
GENEVE_DF_MAX = __GENEVE_DF_END - 1,
};
struct ifla_geneve_port_range {
__be16 low;
__be16 high;
};
/* Bareudp section */
enum {
IFLA_BAREUDP_UNSPEC,
@ -1522,6 +1533,7 @@ enum {
IFLA_BOND_MISSED_MAX,
IFLA_BOND_NS_IP6_TARGET,
IFLA_BOND_COUPLED_CONTROL,
IFLA_BOND_BROADCAST_NEIGH,
__IFLA_BOND_MAX,
};
@ -1974,4 +1986,19 @@ enum {
#define IFLA_DSA_MAX (__IFLA_DSA_MAX - 1)
/* OVPN section */
enum ovpn_mode {
OVPN_MODE_P2P,
OVPN_MODE_MP,
};
enum {
IFLA_OVPN_UNSPEC,
IFLA_OVPN_MODE,
__IFLA_OVPN_MAX,
};
#define IFLA_OVPN_MAX (__IFLA_OVPN_MAX - 1)
#endif /* _LINUX_IF_LINK_H */

9
lib/libc/include/any-linux-any/linux/if_tun.h vendored
View File

@ -93,6 +93,15 @@
#define TUN_F_USO4 0x20 /* I can handle USO for IPv4 packets */
#define TUN_F_USO6 0x40 /* I can handle USO for IPv6 packets */
/* I can handle TSO/USO for UDP tunneled packets */
#define TUN_F_UDP_TUNNEL_GSO 0x080
/*
* I can handle TSO/USO for UDP tunneled packets requiring csum offload for
* the outer header
*/
#define TUN_F_UDP_TUNNEL_GSO_CSUM 0x100
/* Protocol info prepended to the packets (when IFF_NO_PI is not set) */
#define TUN_PKT_STRIP 0x0001
struct tun_pi {

11
lib/libc/include/any-linux-any/linux/if_xdp.h vendored
View File

@ -79,6 +79,7 @@ struct xdp_mmap_offsets {
#define XDP_UMEM_COMPLETION_RING 6
#define XDP_STATISTICS 7
#define XDP_OPTIONS 8
#define XDP_MAX_TX_SKB_BUDGET 9
struct xdp_umem_reg {
__u64 addr; /* Start of packet data area */
@ -127,6 +128,12 @@ struct xdp_options {
*/
#define XDP_TXMD_FLAGS_CHECKSUM (1 << 1)
/* Request launch time hardware offload. The device will schedule the packet for
* transmission at a pre-determined time called launch time. The value of
* launch time is communicated via launch_time field of struct xsk_tx_metadata.
*/
#define XDP_TXMD_FLAGS_LAUNCH_TIME (1 << 2)
/* AF_XDP offloads request. 'request' union member is consumed by the driver
* when the packet is being transmitted. 'completion' union member is
* filled by the driver when the transmit completion arrives.
@ -142,6 +149,10 @@ struct xsk_tx_metadata {
__u16 csum_start;
/* Offset from csum_start where checksum should be stored. */
__u16 csum_offset;
/* XDP_TXMD_FLAGS_LAUNCH_TIME */
/* Launch time in nanosecond against the PTP HW Clock */
__u64 launch_time;
} request;
struct {

2
lib/libc/include/any-linux-any/linux/iio/types.h vendored
View File

@ -119,6 +119,7 @@ enum iio_event_type {
IIO_EV_TYPE_CHANGE,
IIO_EV_TYPE_MAG_REFERENCED,
IIO_EV_TYPE_GESTURE,
IIO_EV_TYPE_FAULT,
};
enum iio_event_direction {
@ -128,6 +129,7 @@ enum iio_event_direction {
IIO_EV_DIR_NONE,
IIO_EV_DIR_SINGLETAP,
IIO_EV_DIR_DOUBLETAP,
IIO_EV_DIR_FAULT_OPENWIRE,
};
#endif /* _IIO_TYPES_H_ */

2
lib/libc/include/any-linux-any/linux/in.h vendored
View File

@ -79,6 +79,8 @@ enum {
#define IPPROTO_MPLS IPPROTO_MPLS
IPPROTO_ETHERNET = 143, /* Ethernet-within-IPv6 Encapsulation */
#define IPPROTO_ETHERNET IPPROTO_ETHERNET
IPPROTO_AGGFRAG = 144, /* AGGFRAG in ESP (RFC 9347) */
#define IPPROTO_AGGFRAG IPPROTO_AGGFRAG
IPPROTO_RAW = 255, /* Raw IP packets */
#define IPPROTO_RAW IPPROTO_RAW
IPPROTO_SMC = 256, /* Shared Memory Communications */

4
lib/libc/include/any-linux-any/linux/in6.h vendored
View File

@ -152,7 +152,6 @@ struct in6_flowlabel_req {
/*
* IPV6 socket options
*/
#if __UAPI_DEF_IPV6_OPTIONS
#define IPV6_ADDRFORM 1
#define IPV6_2292PKTINFO 2
#define IPV6_2292HOPOPTS 3
@ -169,8 +168,10 @@ struct in6_flowlabel_req {
#define IPV6_MULTICAST_IF 17
#define IPV6_MULTICAST_HOPS 18
#define IPV6_MULTICAST_LOOP 19
#if __UAPI_DEF_IPV6_OPTIONS
#define IPV6_ADD_MEMBERSHIP 20
#define IPV6_DROP_MEMBERSHIP 21
#endif
#define IPV6_ROUTER_ALERT 22
#define IPV6_MTU_DISCOVER 23
#define IPV6_MTU 24
@ -203,7 +204,6 @@ struct in6_flowlabel_req {
#define IPV6_IPSEC_POLICY 34
#define IPV6_XFRM_POLICY 35
#define IPV6_HDRINCL 36
#endif
/*
* Multicast:

11
lib/libc/include/any-linux-any/linux/input-event-codes.h vendored
View File

@ -601,6 +601,11 @@
#define BTN_DPAD_LEFT 0x222
#define BTN_DPAD_RIGHT 0x223
#define BTN_GRIPL 0x224
#define BTN_GRIPR 0x225
#define BTN_GRIPL2 0x226
#define BTN_GRIPR2 0x227
#define KEY_ALS_TOGGLE 0x230 /* Ambient light sensor */
#define KEY_ROTATE_LOCK_TOGGLE 0x231 /* Display rotation lock */
#define KEY_REFRESH_RATE_TOGGLE 0x232 /* Display refresh rate toggle */
@ -765,6 +770,9 @@
#define KEY_KBD_LCD_MENU4 0x2bb
#define KEY_KBD_LCD_MENU5 0x2bc
/* Performance Boost key (Alienware)/G-Mode key (Dell) */
#define KEY_PERFORMANCE 0x2bd
#define BTN_TRIGGER_HAPPY 0x2c0
#define BTN_TRIGGER_HAPPY1 0x2c0
#define BTN_TRIGGER_HAPPY2 0x2c1
@ -925,7 +933,8 @@
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MACHINE_COVER 0x10 /* set = cover closed */
#define SW_MAX 0x10
#define SW_USB_INSERT 0x11 /* set = USB audio device connected */
#define SW_MAX 0x11
#define SW_CNT (SW_MAX+1)
/*

1
lib/libc/include/any-linux-any/linux/input.h vendored
View File

@ -273,6 +273,7 @@ struct input_mask {
#define BUS_CEC 0x1E
#define BUS_INTEL_ISHTP 0x1F
#define BUS_AMD_SFH 0x20
#define BUS_SDW 0x21
/*
* MT_TOOL types

113
lib/libc/include/any-linux-any/linux/io_uring.h vendored
View File

@ -50,7 +50,7 @@ struct io_uring_sqe {
};
__u32 len; /* buffer size or number of iovecs */
union {
__kernel_rwf_t rw_flags;
__u32 rw_flags;
__u32 fsync_flags;
__u16 poll_events; /* compatibility */
__u32 poll32_events; /* word-reversed for BE */
@ -73,6 +73,7 @@ struct io_uring_sqe {
__u32 futex_flags;
__u32 install_fd_flags;
__u32 nop_flags;
__u32 pipe_flags;
};
__u64 user_data; /* data to be passed back at completion time */
/* pack this to avoid bogus arm OABI complaints */
@ -87,17 +88,26 @@ struct io_uring_sqe {
union {
__s32 splice_fd_in;
__u32 file_index;
__u32 zcrx_ifq_idx;
__u32 optlen;
struct {
__u16 addr_len;
__u16 __pad3[1];
};
struct {
__u8 write_stream;
__u8 __pad4[3];
};
};
union {
struct {
__u64 addr3;
__u64 __pad2[1];
};
struct {
__u64 attr_ptr; /* pointer to attribute information */
__u64 attr_type_mask; /* bit mask of attributes */
};
__u64 optval;
/*
* If the ring is initialized with IORING_SETUP_SQE128, then
@ -107,6 +117,18 @@ struct io_uring_sqe {
};
};
/* sqe->attr_type_mask flags */
#define IORING_RW_ATTR_FLAG_PI (1U << 0)
/* PI attribute information */
struct io_uring_attr_pi {
__u16 flags;
__u16 app_tag;
__u32 len;
__u64 addr;
__u64 seed;
__u64 rsvd;
};
/*
* If sqe->file_index is set to this for opcodes that instantiate a new
* direct descriptor (like openat/openat2/accept), then io_uring will allocate
@ -262,6 +284,11 @@ enum io_uring_op {
IORING_OP_FTRUNCATE,
IORING_OP_BIND,
IORING_OP_LISTEN,
IORING_OP_RECV_ZC,
IORING_OP_EPOLL_WAIT,
IORING_OP_READV_FIXED,
IORING_OP_WRITEV_FIXED,
IORING_OP_PIPE,
/* this goes last, obviously */
IORING_OP_LAST,
@ -364,13 +391,17 @@ enum io_uring_op {
* result will be the number of buffers send, with
* the starting buffer ID in cqe->flags as per
* usual for provided buffer usage. The buffers
* will be contigious from the starting buffer ID.
* will be contiguous from the starting buffer ID.
*
* IORING_SEND_VECTORIZED If set, SEND[_ZC] will take a pointer to a io_vec
* to allow vectorized send operations.
*/
#define IORING_RECVSEND_POLL_FIRST (1U << 0)
#define IORING_RECV_MULTISHOT (1U << 1)
#define IORING_RECVSEND_FIXED_BUF (1U << 2)
#define IORING_SEND_ZC_REPORT_USAGE (1U << 3)
#define IORING_RECVSEND_BUNDLE (1U << 4)
#define IORING_SEND_VECTORIZED (1U << 5)
/*
* cqe.res for IORING_CQE_F_NOTIF if
@ -422,6 +453,7 @@ enum io_uring_msg_ring_flags {
#define IORING_NOP_FILE (1U << 1)
#define IORING_NOP_FIXED_FILE (1U << 2)
#define IORING_NOP_FIXED_BUFFER (1U << 3)
#define IORING_NOP_TW (1U << 4)
/*
* IO completion data structure (Completion Queue Entry)
@ -525,6 +557,7 @@ struct io_cqring_offsets {
#define IORING_ENTER_REGISTERED_RING (1U << 4)
#define IORING_ENTER_ABS_TIMER (1U << 5)
#define IORING_ENTER_EXT_ARG_REG (1U << 6)
#define IORING_ENTER_NO_IOWAIT (1U << 7)
/*
* Passed in for io_uring_setup(2). Copied back with updated info on success
@ -561,6 +594,8 @@ struct io_uring_params {
#define IORING_FEAT_REG_REG_RING (1U << 13)
#define IORING_FEAT_RECVSEND_BUNDLE (1U << 14)
#define IORING_FEAT_MIN_TIMEOUT (1U << 15)
#define IORING_FEAT_RW_ATTR (1U << 16)
#define IORING_FEAT_NO_IOWAIT (1U << 17)
/*
* io_uring_register(2) opcodes and arguments
@ -622,7 +657,8 @@ enum io_uring_register_op {
/* send MSG_RING without having a ring */
IORING_REGISTER_SEND_MSG_RING = 31,
/* 32 reserved for zc rx */
/* register a netdev hw rx queue for zerocopy */
IORING_REGISTER_ZCRX_IFQ = 32,
/* resize CQ ring */
IORING_REGISTER_RESIZE_RINGS = 33,
@ -937,6 +973,77 @@ enum io_uring_socket_op {
SOCKET_URING_OP_SIOCOUTQ,
SOCKET_URING_OP_GETSOCKOPT,
SOCKET_URING_OP_SETSOCKOPT,
SOCKET_URING_OP_TX_TIMESTAMP,
};
/*
* SOCKET_URING_OP_TX_TIMESTAMP definitions
*/
#define IORING_TIMESTAMP_HW_SHIFT 16
/* The cqe->flags bit from which the timestamp type is stored */
#define IORING_TIMESTAMP_TYPE_SHIFT (IORING_TIMESTAMP_HW_SHIFT + 1)
/* The cqe->flags flag signifying whether it's a hardware timestamp */
#define IORING_CQE_F_TSTAMP_HW ((__u32)1 << IORING_TIMESTAMP_HW_SHIFT)
struct io_timespec {
__u64 tv_sec;
__u64 tv_nsec;
};
/* Zero copy receive refill queue entry */
struct io_uring_zcrx_rqe {
__u64 off;
__u32 len;
__u32 __pad;
};
struct io_uring_zcrx_cqe {
__u64 off;
__u64 __pad;
};
/* The bit from which area id is encoded into offsets */
#define IORING_ZCRX_AREA_SHIFT 48
#define IORING_ZCRX_AREA_MASK (~(((__u64)1 << IORING_ZCRX_AREA_SHIFT) - 1))
struct io_uring_zcrx_offsets {
__u32 head;
__u32 tail;
__u32 rqes;
__u32 __resv2;
__u64 __resv[2];
};
enum io_uring_zcrx_area_flags {
IORING_ZCRX_AREA_DMABUF = 1,
};
struct io_uring_zcrx_area_reg {
__u64 addr;
__u64 len;
__u64 rq_area_token;
__u32 flags;
__u32 dmabuf_fd;
__u64 __resv2[2];
};
/*
* Argument for IORING_REGISTER_ZCRX_IFQ
*/
struct io_uring_zcrx_ifq_reg {
__u32 if_idx;
__u32 if_rxq;
__u32 rq_entries;
__u32 flags;
__u64 area_ptr; /* pointer to struct io_uring_zcrx_area_reg */
__u64 region_ptr; /* struct io_uring_region_desc * */
struct io_uring_zcrx_offsets offsets;
__u32 zcrx_id;
__u32 __resv2;
__u64 __resv[3];
};
#ifdef __cplusplus

47
lib/libc/include/any-linux-any/linux/io_uring/mock_file.h vendored Normal file
View File

@ -0,0 +1,47 @@
#ifndef LINUX_IO_URING_MOCK_FILE_H
#define LINUX_IO_URING_MOCK_FILE_H
#include <linux/types.h>
enum {
IORING_MOCK_FEAT_CMD_COPY,
IORING_MOCK_FEAT_RW_ZERO,
IORING_MOCK_FEAT_RW_NOWAIT,
IORING_MOCK_FEAT_RW_ASYNC,
IORING_MOCK_FEAT_POLL,
IORING_MOCK_FEAT_END,
};
struct io_uring_mock_probe {
__u64 features;
__u64 __resv[9];
};
enum {
IORING_MOCK_CREATE_F_SUPPORT_NOWAIT = 1,
IORING_MOCK_CREATE_F_POLL = 2,
};
struct io_uring_mock_create {
__u32 out_fd;
__u32 flags;
__u64 file_size;
__u64 rw_delay_ns;
__u64 __resv[13];
};
enum {
IORING_MOCK_MGR_CMD_PROBE,
IORING_MOCK_MGR_CMD_CREATE,
};
enum {
IORING_MOCK_CMD_COPY_REGBUF,
};
enum {
IORING_MOCK_COPY_FROM = 1,
};
#endif

283
lib/libc/include/any-linux-any/linux/iommufd.h vendored
View File

@ -55,6 +55,8 @@ enum {
IOMMUFD_CMD_VIOMMU_ALLOC = 0x90,
IOMMUFD_CMD_VDEVICE_ALLOC = 0x91,
IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92,
IOMMUFD_CMD_VEVENTQ_ALLOC = 0x93,
IOMMUFD_CMD_HW_QUEUE_ALLOC = 0x94,
};
/**
@ -392,6 +394,9 @@ struct iommu_vfio_ioas {
* Any domain attached to the non-PASID part of the
* device must also be flagged, otherwise attaching a
* PASID will blocked.
* For the user that wants to attach PASID, ioas is
* not recommended for both the non-PASID part
* and PASID part of the device.
* If IOMMU does not support PASID it will return
* error (-EOPNOTSUPP).
*/
@ -586,17 +591,44 @@ struct iommu_hw_info_arm_smmuv3 {
__u32 aidr;
};
/**
* struct iommu_hw_info_tegra241_cmdqv - NVIDIA Tegra241 CMDQV Hardware
* Information (IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV)
*
* @flags: Must be 0
* @version: Version number for the CMDQ-V HW for PARAM bits[03:00]
* @log2vcmdqs: Log2 of the total number of VCMDQs for PARAM bits[07:04]
* @log2vsids: Log2 of the total number of SID replacements for PARAM bits[15:12]
* @__reserved: Must be 0
*
* VMM can use these fields directly in its emulated global PARAM register. Note
* that only one Virtual Interface (VINTF) should be exposed to a VM, i.e. PARAM
* bits[11:08] should be set to 0 for log2 of the total number of VINTFs.
*/
struct iommu_hw_info_tegra241_cmdqv {
__u32 flags;
__u8 version;
__u8 log2vcmdqs;
__u8 log2vsids;
__u8 __reserved;
};
/**
* enum iommu_hw_info_type - IOMMU Hardware Info Types
* @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware
* @IOMMU_HW_INFO_TYPE_NONE: Output by the drivers that do not report hardware
* info
* @IOMMU_HW_INFO_TYPE_DEFAULT: Input to request for a default type
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
* @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type
* @IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV: NVIDIA Tegra241 CMDQV (extension for ARM
* SMMUv3) info type
*/
enum iommu_hw_info_type {
IOMMU_HW_INFO_TYPE_NONE = 0,
IOMMU_HW_INFO_TYPE_DEFAULT = 0,
IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2,
IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV = 3,
};
/**
@ -608,9 +640,26 @@ enum iommu_hw_info_type {
* IOMMU_HWPT_GET_DIRTY_BITMAP
* IOMMU_HWPT_SET_DIRTY_TRACKING
*
* @IOMMU_HW_CAP_PCI_PASID_EXEC: Execute Permission Supported, user ignores it
* when the struct
* iommu_hw_info::out_max_pasid_log2 is zero.
* @IOMMU_HW_CAP_PCI_PASID_PRIV: Privileged Mode Supported, user ignores it
* when the struct
* iommu_hw_info::out_max_pasid_log2 is zero.
*/
enum iommufd_hw_capabilities {
IOMMU_HW_CAP_DIRTY_TRACKING = 1 << 0,
IOMMU_HW_CAP_PCI_PASID_EXEC = 1 << 1,
IOMMU_HW_CAP_PCI_PASID_PRIV = 1 << 2,
};
/**
* enum iommufd_hw_info_flags - Flags for iommu_hw_info
* @IOMMU_HW_INFO_FLAG_INPUT_TYPE: If set, @in_data_type carries an input type
* for user space to request for a specific info
*/
enum iommufd_hw_info_flags {
IOMMU_HW_INFO_FLAG_INPUT_TYPE = 1 << 0,
};
/**
@ -622,10 +671,19 @@ enum iommufd_hw_capabilities {
* data that kernel supports
* @data_uptr: User pointer to a user-space buffer used by the kernel to fill
* the iommu type specific hardware information data
* @in_data_type: This shares the same field with @out_data_type, making it be
* a bidirectional field. When IOMMU_HW_INFO_FLAG_INPUT_TYPE is
* set, an input type carried via this @in_data_type field will
* be valid, requesting for the info data to the given type. If
* IOMMU_HW_INFO_FLAG_INPUT_TYPE is unset, any input value will
* be seen as IOMMU_HW_INFO_TYPE_DEFAULT
* @out_data_type: Output the iommu hardware info type as defined in the enum
* iommu_hw_info_type.
* @out_capabilities: Output the generic iommu capability info type as defined
* in the enum iommu_hw_capabilities.
* @out_max_pasid_log2: Output the width of PASIDs. 0 means no PASID support.
* PCI devices turn to out_capabilities to check if the
* specific capabilities is supported or not.
* @__reserved: Must be 0
*
* Query an iommu type specific hardware information data from an iommu behind
@ -648,8 +706,12 @@ struct iommu_hw_info {
__u32 dev_id;
__u32 data_len;
__aligned_u64 data_uptr;
__u32 out_data_type;
__u32 __reserved;
union {
__u32 in_data_type;
__u32 out_data_type;
};
__u8 out_max_pasid_log2;
__u8 __reserved[3];
__aligned_u64 out_capabilities;
};
#define IOMMU_GET_HW_INFO _IO(IOMMUFD_TYPE, IOMMUFD_CMD_GET_HW_INFO)
@ -935,10 +997,29 @@ struct iommu_fault_alloc {
* enum iommu_viommu_type - Virtual IOMMU Type
* @IOMMU_VIOMMU_TYPE_DEFAULT: Reserved for future use
* @IOMMU_VIOMMU_TYPE_ARM_SMMUV3: ARM SMMUv3 driver specific type
* @IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV: NVIDIA Tegra241 CMDQV (extension for ARM
* SMMUv3) enabled ARM SMMUv3 type
*/
enum iommu_viommu_type {
IOMMU_VIOMMU_TYPE_DEFAULT = 0,
IOMMU_VIOMMU_TYPE_ARM_SMMUV3 = 1,
IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV = 2,
};
/**
* struct iommu_viommu_tegra241_cmdqv - NVIDIA Tegra241 CMDQV Virtual Interface
* (IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV)
* @out_vintf_mmap_offset: mmap offset argument for VINTF's page0
* @out_vintf_mmap_length: mmap length argument for VINTF's page0
*
* Both @out_vintf_mmap_offset and @out_vintf_mmap_length are reported by kernel
* for user space to mmap the VINTF page0 from the host physical address space
* to the guest physical address space so that a guest kernel can directly R/W
* access to the VINTF page0 in order to control its virtual command queues.
*/
struct iommu_viommu_tegra241_cmdqv {
__aligned_u64 out_vintf_mmap_offset;
__aligned_u64 out_vintf_mmap_length;
};
/**
@ -949,6 +1030,9 @@ enum iommu_viommu_type {
* @dev_id: The device's physical IOMMU will be used to back the virtual IOMMU
* @hwpt_id: ID of a nesting parent HWPT to associate to
* @out_viommu_id: Output virtual IOMMU ID for the allocated object
* @data_len: Length of the type specific data
* @__reserved: Must be 0
* @data_uptr: User pointer to a driver-specific virtual IOMMU data
*
* Allocate a virtual IOMMU object, representing the underlying physical IOMMU's
* virtualization support that is a security-isolated slice of the real IOMMU HW
@ -969,6 +1053,9 @@ struct iommu_viommu_alloc {
__u32 dev_id;
__u32 hwpt_id;
__u32 out_viommu_id;
__u32 data_len;
__u32 __reserved;
__aligned_u64 data_uptr;
};
#define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC)
@ -979,10 +1066,15 @@ struct iommu_viommu_alloc {
* @dev_id: The physical device to allocate a virtual instance on the vIOMMU
* @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY
* @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDeviceID
* of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Table
* of AMD IOMMU, and vRID of Intel VT-d
*
* Allocate a virtual device instance (for a physical device) against a vIOMMU.
* This instance holds the device's information (related to its vIOMMU) in a VM.
* User should use IOMMU_DESTROY to destroy the virtual device before
* destroying the physical device (by closing vfio_cdev fd). Otherwise the
* virtual device would be forcibly destroyed on physical device destruction,
* its vdevice_id would be permanently leaked (unremovable & unreusable) until
* iommu fd closed.
*/
struct iommu_vdevice_alloc {
__u32 size;
@ -1014,4 +1106,187 @@ struct iommu_ioas_change_process {
#define IOMMU_IOAS_CHANGE_PROCESS \
_IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_CHANGE_PROCESS)
/**
* enum iommu_veventq_flag - flag for struct iommufd_vevent_header
* @IOMMU_VEVENTQ_FLAG_LOST_EVENTS: vEVENTQ has lost vEVENTs
*/
enum iommu_veventq_flag {
IOMMU_VEVENTQ_FLAG_LOST_EVENTS = (1U << 0),
};
/**
* struct iommufd_vevent_header - Virtual Event Header for a vEVENTQ Status
* @flags: Combination of enum iommu_veventq_flag
* @sequence: The sequence index of a vEVENT in the vEVENTQ, with a range of
* [0, INT_MAX] where the following index of INT_MAX is 0
*
* Each iommufd_vevent_header reports a sequence index of the following vEVENT:
*
* +----------------------+-------+----------------------+-------+---+-------+
* | header0 {sequence=0} | data0 | header1 {sequence=1} | data1 |...| dataN |
* +----------------------+-------+----------------------+-------+---+-------+
*
* And this sequence index is expected to be monotonic to the sequence index of
* the previous vEVENT. If two adjacent sequence indexes has a delta larger than
* 1, it means that delta - 1 number of vEVENTs has lost, e.g. two lost vEVENTs:
*
* +-----+----------------------+-------+----------------------+-------+-----+
* | ... | header3 {sequence=3} | data3 | header6 {sequence=6} | data6 | ... |
* +-----+----------------------+-------+----------------------+-------+-----+
*
* If a vEVENT lost at the tail of the vEVENTQ and there is no following vEVENT
* providing the next sequence index, an IOMMU_VEVENTQ_FLAG_LOST_EVENTS header
* would be added to the tail, and no data would follow this header:
*
* +--+----------------------+-------+-----------------------------------------+
* |..| header3 {sequence=3} | data3 | header4 {flags=LOST_EVENTS, sequence=4} |
* +--+----------------------+-------+-----------------------------------------+
*/
struct iommufd_vevent_header {
__u32 flags;
__u32 sequence;
};
/**
* enum iommu_veventq_type - Virtual Event Queue Type
* @IOMMU_VEVENTQ_TYPE_DEFAULT: Reserved for future use
* @IOMMU_VEVENTQ_TYPE_ARM_SMMUV3: ARM SMMUv3 Virtual Event Queue
* @IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV: NVIDIA Tegra241 CMDQV Extension IRQ
*/
enum iommu_veventq_type {
IOMMU_VEVENTQ_TYPE_DEFAULT = 0,
IOMMU_VEVENTQ_TYPE_ARM_SMMUV3 = 1,
IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV = 2,
};
/**
* struct iommu_vevent_arm_smmuv3 - ARM SMMUv3 Virtual Event
* (IOMMU_VEVENTQ_TYPE_ARM_SMMUV3)
* @evt: 256-bit ARM SMMUv3 Event record, little-endian.
* Reported event records: (Refer to "7.3 Event records" in SMMUv3 HW Spec)
* - 0x04 C_BAD_STE
* - 0x06 F_STREAM_DISABLED
* - 0x08 C_BAD_SUBSTREAMID
* - 0x0a C_BAD_CD
* - 0x10 F_TRANSLATION
* - 0x11 F_ADDR_SIZE
* - 0x12 F_ACCESS
* - 0x13 F_PERMISSION
*
* StreamID field reports a virtual device ID. To receive a virtual event for a
* device, a vDEVICE must be allocated via IOMMU_VDEVICE_ALLOC.
*/
struct iommu_vevent_arm_smmuv3 {
__aligned_le64 evt[4];
};
/**
* struct iommu_vevent_tegra241_cmdqv - Tegra241 CMDQV IRQ
* (IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV)
* @lvcmdq_err_map: 128-bit logical vcmdq error map, little-endian.
* (Refer to register LVCMDQ_ERR_MAPs per VINTF )
*
* The 128-bit register value from HW exclusively reflect the error bits for a
* Virtual Interface represented by a vIOMMU object. Read and report directly.
*/
struct iommu_vevent_tegra241_cmdqv {
__aligned_le64 lvcmdq_err_map[2];
};
/**
* struct iommu_veventq_alloc - ioctl(IOMMU_VEVENTQ_ALLOC)
* @size: sizeof(struct iommu_veventq_alloc)
* @flags: Must be 0
* @viommu_id: virtual IOMMU ID to associate the vEVENTQ with
* @type: Type of the vEVENTQ. Must be defined in enum iommu_veventq_type
* @veventq_depth: Maximum number of events in the vEVENTQ
* @out_veventq_id: The ID of the new vEVENTQ
* @out_veventq_fd: The fd of the new vEVENTQ. User space must close the
* successfully returned fd after using it
* @__reserved: Must be 0
*
* Explicitly allocate a virtual event queue interface for a vIOMMU. A vIOMMU
* can have multiple FDs for different types, but is confined to one per @type.
* User space should open the @out_veventq_fd to read vEVENTs out of a vEVENTQ,
* if there are vEVENTs available. A vEVENTQ will lose events due to overflow,
* if the number of the vEVENTs hits @veventq_depth.
*
* Each vEVENT in a vEVENTQ encloses a struct iommufd_vevent_header followed by
* a type-specific data structure, in a normal case:
*
* +-+---------+-------+---------+-------+-----+---------+-------+-+
* | | header0 | data0 | header1 | data1 | ... | headerN | dataN | |
* +-+---------+-------+---------+-------+-----+---------+-------+-+
*
* unless a tailing IOMMU_VEVENTQ_FLAG_LOST_EVENTS header is logged (refer to
* struct iommufd_vevent_header).
*/
struct iommu_veventq_alloc {
__u32 size;
__u32 flags;
__u32 viommu_id;
__u32 type;
__u32 veventq_depth;
__u32 out_veventq_id;
__u32 out_veventq_fd;
__u32 __reserved;
};
#define IOMMU_VEVENTQ_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VEVENTQ_ALLOC)
/**
* enum iommu_hw_queue_type - HW Queue Type
* @IOMMU_HW_QUEUE_TYPE_DEFAULT: Reserved for future use
* @IOMMU_HW_QUEUE_TYPE_TEGRA241_CMDQV: NVIDIA Tegra241 CMDQV (extension for ARM
* SMMUv3) Virtual Command Queue (VCMDQ)
*/
enum iommu_hw_queue_type {
IOMMU_HW_QUEUE_TYPE_DEFAULT = 0,
/*
* TEGRA241_CMDQV requirements (otherwise, allocation will fail)
* - alloc starts from the lowest @index=0 in ascending order
* - destroy starts from the last allocated @index in descending order
* - @base_addr must be aligned to @length in bytes and mapped in IOAS
* - @length must be a power of 2, with a minimum 32 bytes and a maximum
* 2 ^ idr[1].CMDQS * 16 bytes (use GET_HW_INFO call to read idr[1]
* from struct iommu_hw_info_arm_smmuv3)
* - suggest to back the queue memory with contiguous physical pages or
* a single huge page with alignment of the queue size, and limit the
* emulated vSMMU's IDR1.CMDQS to log2(huge page size / 16 bytes)
*/
IOMMU_HW_QUEUE_TYPE_TEGRA241_CMDQV = 1,
};
/**
* struct iommu_hw_queue_alloc - ioctl(IOMMU_HW_QUEUE_ALLOC)
* @size: sizeof(struct iommu_hw_queue_alloc)
* @flags: Must be 0
* @viommu_id: Virtual IOMMU ID to associate the HW queue with
* @type: One of enum iommu_hw_queue_type
* @index: The logical index to the HW queue per virtual IOMMU for a multi-queue
* model
* @out_hw_queue_id: The ID of the new HW queue
* @nesting_parent_iova: Base address of the queue memory in the guest physical
* address space
* @length: Length of the queue memory
*
* Allocate a HW queue object for a vIOMMU-specific HW-accelerated queue, which
* allows HW to access a guest queue memory described using @nesting_parent_iova
* and @length.
*
* A vIOMMU can allocate multiple queues, but it must use a different @index per
* type to separate each allocation, e.g::
*
* Type1 HW queue0, Type1 HW queue1, Type2 HW queue0, ...
*/
struct iommu_hw_queue_alloc {
__u32 size;
__u32 flags;
__u32 viommu_id;
__u32 type;
__u32 index;
__u32 out_hw_queue_id;
__aligned_u64 nesting_parent_iova;
__aligned_u64 length;
};
#define IOMMU_HW_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HW_QUEUE_ALLOC)
#endif

16
lib/libc/include/any-linux-any/linux/ip.h vendored
View File

@ -137,6 +137,22 @@ struct ip_beet_phdr {
__u8 reserved;
};
struct ip_iptfs_hdr {
__u8 subtype; /* 0*: basic, 1: CC */
__u8 flags;
__be16 block_offset;
};
struct ip_iptfs_cc_hdr {
__u8 subtype; /* 0: basic, 1*: CC */
__u8 flags;
__be16 block_offset;
__be32 loss_rate;
__be64 rtt_adelay_xdelay;
__be32 tval;
__be32 techo;
};
/* index values for the variables in ipv4_devconf */
enum
{

3
lib/libc/include/any-linux-any/linux/ipsec.h vendored
View File

@ -14,7 +14,8 @@ enum {
IPSEC_MODE_ANY = 0, /* We do not support this for SA */
IPSEC_MODE_TRANSPORT = 1,
IPSEC_MODE_TUNNEL = 2,
IPSEC_MODE_BEET = 3
IPSEC_MODE_BEET = 3,
IPSEC_MODE_IPTFS = 4
};
enum {

1
lib/libc/include/any-linux-any/linux/ipv6.h vendored
View File

@ -199,6 +199,7 @@ enum {
DEVCONF_NDISC_EVICT_NOCARRIER,
DEVCONF_ACCEPT_UNTRACKED_NA,
DEVCONF_ACCEPT_RA_MIN_LFT,
DEVCONF_FORCE_FORWARDING,
DEVCONF_MAX
};

26
lib/libc/include/any-linux-any/linux/isst_if.h vendored
View File

@ -375,6 +375,30 @@ struct isst_perf_level_data_info {
__u16 trl_freq_mhz[TRL_MAX_LEVELS][TRL_MAX_BUCKETS];
};
#define MAX_FABRIC_COUNT 8
/**
* struct isst_perf_level_fabric_info - Structure to get SST-PP fabric details
* @socket_id: Socket/package id
* @power_domain_id: Power Domain id
* @level: SST-PP level for which caller wants to get information
* @max_fabrics: Count of fabrics in resonse
* @p0_fabric_freq_mhz: Fabric (Uncore) maximum frequency
* @p1_fabric_freq_mhz: Fabric (Uncore) TDP frequency
* @pm_fabric_freq_mhz: Fabric (Uncore) minimum frequency
*
* Structure used to get information on frequencies for fabrics.
*/
struct isst_perf_level_fabric_info {
__u8 socket_id;
__u8 power_domain_id;
__u16 level;
__u16 max_fabrics;
__u16 p0_fabric_freq_mhz[MAX_FABRIC_COUNT];
__u16 p1_fabric_freq_mhz[MAX_FABRIC_COUNT];
__u16 pm_fabric_freq_mhz[MAX_FABRIC_COUNT];
};
/**
* struct isst_perf_level_cpu_mask - Structure to get SST-PP level CPU mask
* @socket_id: Socket/package id
@ -471,5 +495,7 @@ struct isst_turbo_freq_info {
#define ISST_IF_GET_BASE_FREQ_INFO _IOR(ISST_IF_MAGIC, 14, struct isst_base_freq_info *)
#define ISST_IF_GET_BASE_FREQ_CPU_MASK _IOR(ISST_IF_MAGIC, 15, struct isst_perf_level_cpu_mask *)
#define ISST_IF_GET_TURBO_FREQ_INFO _IOR(ISST_IF_MAGIC, 16, struct isst_turbo_freq_info *)
#define ISST_IF_GET_PERF_LEVEL_FABRIC_INFO _IOR(ISST_IF_MAGIC, 17,\
struct isst_perf_level_fabric_info *)
#endif

1
lib/libc/include/any-linux-any/linux/kexec.h vendored
View File

@ -27,6 +27,7 @@
#define KEXEC_FILE_ON_CRASH 0x00000002
#define KEXEC_FILE_NO_INITRAMFS 0x00000004
#define KEXEC_FILE_DEBUG 0x00000008
#define KEXEC_FILE_NO_CMA 0x00000010
/* These values match the ELF architecture values.
* Unless there is a good reason that should continue to be the case.

15
lib/libc/include/any-linux-any/linux/kfd_ioctl.h vendored
View File

@ -43,9 +43,10 @@
* - 1.15 - Enable managing mappings in compute VMs with GEM_VA ioctl
* - 1.16 - Add contiguous VRAM allocation flag
* - 1.17 - Add SDMA queue creation with target SDMA engine ID
* - 1.18 - Rename pad in set_memory_policy_args to misc_process_flag
*/
#define KFD_IOCTL_MAJOR_VERSION 1
#define KFD_IOCTL_MINOR_VERSION 17
#define KFD_IOCTL_MINOR_VERSION 18
struct kfd_ioctl_get_version_args {
__u32 major_version; /* from KFD */
@ -62,6 +63,8 @@ struct kfd_ioctl_get_version_args {
#define KFD_MAX_QUEUE_PERCENTAGE 100
#define KFD_MAX_QUEUE_PRIORITY 15
#define KFD_MIN_QUEUE_RING_SIZE 1024
struct kfd_ioctl_create_queue_args {
__u64 ring_base_address; /* to KFD */
__u64 write_pointer_address; /* from KFD */
@ -148,6 +151,9 @@ struct kfd_dbg_device_info_entry {
#define KFD_IOC_CACHE_POLICY_COHERENT 0
#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
/* Misc. per process flags */
#define KFD_PROC_FLAG_MFMA_HIGH_PRECISION (1 << 0)
struct kfd_ioctl_set_memory_policy_args {
__u64 alternate_aperture_base; /* to KFD */
__u64 alternate_aperture_size; /* to KFD */
@ -155,7 +161,7 @@ struct kfd_ioctl_set_memory_policy_args {
__u32 gpu_id; /* to KFD */
__u32 default_policy; /* to KFD */
__u32 alternate_policy; /* to KFD */
__u32 pad;
__u32 misc_process_flag; /* to KFD */
};
/*
@ -530,6 +536,8 @@ enum kfd_smi_event {
KFD_SMI_EVENT_QUEUE_EVICTION = 9,
KFD_SMI_EVENT_QUEUE_RESTORE = 10,
KFD_SMI_EVENT_UNMAP_FROM_GPU = 11,
KFD_SMI_EVENT_PROCESS_START = 12,
KFD_SMI_EVENT_PROCESS_END = 13,
/*
* max event number, as a flag bit to get events from all processes,
@ -645,6 +653,9 @@ struct kfd_ioctl_smi_events_args {
"%lld -%d @%lx(%lx) %x %d\n", (ns), (pid), (addr), (size),\
(node), (unmap_trigger)
#define KFD_EVENT_FMT_PROCESS(pid, task_name)\
"%x %s\n", (pid), (task_name)
/**************************************************************************************************
* CRIU IOCTLs (Checkpoint Restore In Userspace)
*

3
lib/libc/include/any-linux-any/linux/kfd_sysfs.h vendored
View File

@ -63,6 +63,9 @@
#define HSA_CAP_PER_QUEUE_RESET_SUPPORTED 0x80000000
#define HSA_CAP_RESERVED 0x000f8000
#define HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED 0x00000001
#define HSA_CAP2_RESERVED 0xfffffffe
/* debug_prop bits in node properties */
#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f
#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT 0

41
lib/libc/include/any-linux-any/linux/kvm.h vendored
View File

@ -178,6 +178,7 @@ struct kvm_xen_exit {
#define KVM_EXIT_NOTIFY 37
#define KVM_EXIT_LOONGARCH_IOCSR 38
#define KVM_EXIT_MEMORY_FAULT 39
#define KVM_EXIT_TDX 40
/* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */
@ -369,6 +370,7 @@ struct kvm_run {
#define KVM_SYSTEM_EVENT_WAKEUP 4
#define KVM_SYSTEM_EVENT_SUSPEND 5
#define KVM_SYSTEM_EVENT_SEV_TERM 6
#define KVM_SYSTEM_EVENT_TDX_FATAL 7
__u32 type;
__u32 ndata;
union {
@ -438,6 +440,31 @@ struct kvm_run {
__u64 gpa;
__u64 size;
} memory_fault;
/* KVM_EXIT_TDX */
struct {
__u64 flags;
__u64 nr;
union {
struct {
__u64 ret;
__u64 data[5];
} unknown;
struct {
__u64 ret;
__u64 gpa;
__u64 size;
} get_quote;
struct {
__u64 ret;
__u64 leaf;
__u64 r11, r12, r13, r14;
} get_tdvmcall_info;
struct {
__u64 ret;
__u64 vector;
} setup_event_notify;
};
} tdx;
/* Fix the size of the union. */
char padding[256];
};
@ -609,10 +636,7 @@ struct kvm_ioeventfd {
#define KVM_X86_DISABLE_EXITS_HLT (1 << 1)
#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
#define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3)
#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \
KVM_X86_DISABLE_EXITS_HLT | \
KVM_X86_DISABLE_EXITS_PAUSE | \
KVM_X86_DISABLE_EXITS_CSTATE)
#define KVM_X86_DISABLE_EXITS_APERFMPERF (1 << 4)
/* for KVM_ENABLE_CAP */
struct kvm_enable_cap {
@ -925,6 +949,11 @@ struct kvm_enable_cap {
#define KVM_CAP_PRE_FAULT_MEMORY 236
#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
#define KVM_CAP_X86_GUEST_MODE 238
#define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
#define KVM_CAP_ARM_EL2 240
#define KVM_CAP_ARM_EL2_E2H0 241
#define KVM_CAP_RISCV_MP_STATE_RESET 242
#define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -1062,6 +1091,10 @@ struct kvm_dirty_tlb {
#define KVM_REG_SIZE_SHIFT 52
#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
#define KVM_REG_SIZE(id) \
(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
#define KVM_REG_SIZE_U8 0x0000000000000000ULL
#define KVM_REG_SIZE_U16 0x0010000000000000ULL
#define KVM_REG_SIZE_U32 0x0020000000000000ULL

78
lib/libc/include/any-linux-any/linux/landlock.h vendored
View File

@ -4,6 +4,7 @@
*
* Copyright © 2017-2020 Mickaël Salaün <mic@digikod.net>
* Copyright © 2018-2020 ANSSI
* Copyright © 2021-2025 Microsoft Corporation
*/
#ifndef _LINUX_LANDLOCK_H
@ -52,14 +53,75 @@ struct landlock_ruleset_attr {
__u64 scoped;
};
/*
* sys_landlock_create_ruleset() flags:
/**
* DOC: landlock_create_ruleset_flags
*
* - %LANDLOCK_CREATE_RULESET_VERSION: Get the highest supported Landlock ABI
* version.
* **Flags**
*
* %LANDLOCK_CREATE_RULESET_VERSION
* Get the highest supported Landlock ABI version (starting at 1).
*
* %LANDLOCK_CREATE_RULESET_ERRATA
* Get a bitmask of fixed issues for the current Landlock ABI version.
*/
/* clang-format off */
#define LANDLOCK_CREATE_RULESET_VERSION (1U << 0)
#define LANDLOCK_CREATE_RULESET_ERRATA (1U << 1)
/* clang-format on */
/**
* DOC: landlock_restrict_self_flags
*
* **Flags**
*
* By default, denied accesses originating from programs that sandbox themselves
* are logged via the audit subsystem. Such events typically indicate unexpected
* behavior, such as bugs or exploitation attempts. However, to avoid excessive
* logging, access requests denied by a domain not created by the originating
* program are not logged by default. The rationale is that programs should know
* their own behavior, but not necessarily the behavior of other programs. This
* default configuration is suitable for most programs that sandbox themselves.
* For specific use cases, the following flags allow programs to modify this
* default logging behavior.
*
* The %LANDLOCK_RESTRICT_SELF_LOG_SAME_EXEC_OFF and
* %LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON flags apply to the newly created
* Landlock domain.
*
* %LANDLOCK_RESTRICT_SELF_LOG_SAME_EXEC_OFF
* Disables logging of denied accesses originating from the thread creating
* the Landlock domain, as well as its children, as long as they continue
* running the same executable code (i.e., without an intervening
* :manpage:`execve(2)` call). This is intended for programs that execute
* unknown code without invoking :manpage:`execve(2)`, such as script
* interpreters. Programs that only sandbox themselves should not set this
* flag, so users can be notified of unauthorized access attempts via system
* logs.
*
* %LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON
* Enables logging of denied accesses after an :manpage:`execve(2)` call,
* providing visibility into unauthorized access attempts by newly executed
* programs within the created Landlock domain. This flag is recommended
* only when all potential executables in the domain are expected to comply
* with the access restrictions, as excessive audit log entries could make
* it more difficult to identify critical events.
*
* %LANDLOCK_RESTRICT_SELF_LOG_SUBDOMAINS_OFF
* Disables logging of denied accesses originating from nested Landlock
* domains created by the caller or its descendants. This flag should be set
* according to runtime configuration, not hardcoded, to avoid suppressing
* important security events. It is useful for container runtimes or
* sandboxing tools that may launch programs which themselves create
* Landlock domains and could otherwise generate excessive logs. Unlike
* ``LANDLOCK_RESTRICT_SELF_LOG_SAME_EXEC_OFF``, this flag only affects
* future nested domains, not the one being created. It can also be used
* with a @ruleset_fd value of -1 to mute subdomain logs without creating a
* domain.
*/
/* clang-format off */
#define LANDLOCK_RESTRICT_SELF_LOG_SAME_EXEC_OFF (1U << 0)
#define LANDLOCK_RESTRICT_SELF_LOG_NEW_EXEC_ON (1U << 1)
#define LANDLOCK_RESTRICT_SELF_LOG_SUBDOMAINS_OFF (1U << 2)
/* clang-format on */
/**
@ -268,7 +330,9 @@ struct landlock_net_port_attr {
* ~~~~~~~~~~~~~~~~
*
* These flags enable to restrict a sandboxed process to a set of network
* actions. This is supported since the Landlock ABI version 4.
* actions.
*
* This is supported since Landlock ABI version 4.
*
* The following access rights apply to TCP port numbers:
*
@ -291,11 +355,13 @@ struct landlock_net_port_attr {
* Setting a flag for a ruleset will isolate the Landlock domain to forbid
* connections to resources outside the domain.
*
* This is supported since Landlock ABI version 6.
*
* Scopes:
*
* - %LANDLOCK_SCOPE_ABSTRACT_UNIX_SOCKET: Restrict a sandboxed process from
* connecting to an abstract UNIX socket created by a process outside the
* related Landlock domain (e.g. a parent domain or a non-sandboxed process).
* related Landlock domain (e.g., a parent domain or a non-sandboxed process).
* - %LANDLOCK_SCOPE_SIGNAL: Restrict a sandboxed process from sending a signal
* to another process outside the domain.
*/

29
lib/libc/include/any-linux-any/linux/lockd_netlink.h vendored Normal file
View File

@ -0,0 +1,29 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/lockd.yaml */
/* YNL-GEN uapi header */
#ifndef _LINUX_LOCKD_NETLINK_H
#define _LINUX_LOCKD_NETLINK_H
#define LOCKD_FAMILY_NAME "lockd"
#define LOCKD_FAMILY_VERSION 1
enum {
LOCKD_A_SERVER_GRACETIME = 1,
LOCKD_A_SERVER_TCP_PORT,
LOCKD_A_SERVER_UDP_PORT,
__LOCKD_A_SERVER_MAX,
LOCKD_A_SERVER_MAX = (__LOCKD_A_SERVER_MAX - 1)
};
enum {
LOCKD_CMD_SERVER_SET = 1,
LOCKD_CMD_SERVER_GET,
__LOCKD_CMD_MAX,
LOCKD_CMD_MAX = (__LOCKD_CMD_MAX - 1)
};
#endif /* _LINUX_LOCKD_NETLINK_H */

8
lib/libc/include/any-linux-any/linux/mctp.h vendored
View File

@ -37,6 +37,14 @@ struct sockaddr_mctp_ext {
__u8 smctp_haddr[MAX_ADDR_LEN];
};
/* A "fully qualified" MCTP address, which includes the system-local network ID,
* required to uniquely resolve a routable EID.
*/
struct mctp_fq_addr {
unsigned int net;
mctp_eid_t eid;
};
#define MCTP_NET_ANY 0x0
#define MCTP_ADDR_NULL 0x00

1
lib/libc/include/any-linux-any/linux/mdio.h vendored
View File

@ -125,6 +125,7 @@
#define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */
#define MDIO_STAT1_LSTATUS BMSR_LSTATUS
#define MDIO_STAT1_FAULT 0x0080 /* Fault */
#define MDIO_PCS_STAT1_CLKSTOP_CAP 0x0040
#define MDIO_AN_STAT1_LPABLE 0x0001 /* Link partner AN ability */
#define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE
#define MDIO_AN_STAT1_RFAULT BMSR_RFAULT

564
lib/libc/include/any-linux-any/linux/media/amlogic/c3-isp-config.h vendored Normal file
View File

@ -0,0 +1,564 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (C) 2024 Amlogic, Inc. All rights reserved
*/
#ifndef _C3_ISP_CONFIG_H_
#define _C3_ISP_CONFIG_H_
#include <linux/types.h>
/*
* Frames are split into zones of almost equal width and height - a zone is a
* rectangular tile of a frame. The metering blocks within the ISP collect
* aggregated statistics per zone.
*/
#define C3_ISP_AE_MAX_ZONES (17 * 15)
#define C3_ISP_AF_MAX_ZONES (17 * 15)
#define C3_ISP_AWB_MAX_ZONES (32 * 24)
/* The maximum number of point on the diagonal of the frame for statistics */
#define C3_ISP_AE_MAX_PT_NUM 18
#define C3_ISP_AF_MAX_PT_NUM 18
#define C3_ISP_AWB_MAX_PT_NUM 33
/**
* struct c3_isp_awb_zone_stats - AWB statistics of a zone
*
* AWB zone stats is aligned with 8 bytes
*
* @rg: the ratio of R / G in a zone
* @bg: the ratio of B / G in a zone
* @pixel_sum: the total number of pixels used in a zone
*/
struct c3_isp_awb_zone_stats {
__u16 rg;
__u16 bg;
__u32 pixel_sum;
};
/**
* struct c3_isp_awb_stats - Auto white balance statistics information.
*
* AWB statistical information of all zones.
*
* @stats: array of auto white balance statistics
*/
struct c3_isp_awb_stats {
struct c3_isp_awb_zone_stats stats[C3_ISP_AWB_MAX_ZONES];
} __attribute__((aligned(16)));
/**
* struct c3_isp_ae_zone_stats - AE statistics of a zone
*
* AE zone stats is aligned with 8 bytes.
* This is a 5-bin histogram and the total sum is normalized to 0xffff.
* So hist2 = 0xffff - (hist0 + hist1 + hist3 + hist4)
*
* @hist0: the global normalized pixel count for bin 0
* @hist1: the global normalized pixel count for bin 1
* @hist3: the global normalized pixel count for bin 3
* @hist4: the global normalized pixel count for bin 4
*/
struct c3_isp_ae_zone_stats {
__u16 hist0;
__u16 hist1;
__u16 hist3;
__u16 hist4;
};
/**
* struct c3_isp_ae_stats - Exposure statistics information
*
* AE statistical information consists of all blocks information and a 1024-bin
* histogram.
*
* @stats: array of auto exposure block statistics
* @reserved: undefined buffer space
* @hist: a 1024-bin histogram for the entire image
*/
struct c3_isp_ae_stats {
struct c3_isp_ae_zone_stats stats[C3_ISP_AE_MAX_ZONES];
__u32 reserved[2];
__u32 hist[1024];
} __attribute__((aligned(16)));
/**
* struct c3_isp_af_zone_stats - AF statistics of a zone
*
* AF zone stats is aligned with 8 bytes.
* The zonal accumulated contrast metrics are stored in floating point format
* with 16 bits mantissa and 5 or 6 bits exponent. Apart from contrast metrics
* we accumulate squared image and quartic image data over the zone.
*
* @i2_mat: the mantissa of zonal squared image pixel sum
* @i4_mat: the mantissa of zonal quartic image pixel sum
* @e4_mat: the mantissa of zonal multi-directional quartic edge sum
* @e4_exp: the exponent of zonal multi-directional quartic edge sum
* @i2_exp: the exponent of zonal squared image pixel sum
* @i4_exp: the exponent of zonal quartic image pixel sum
*/
struct c3_isp_af_zone_stats {
__u16 i2_mat;
__u16 i4_mat;
__u16 e4_mat;
__u16 e4_exp : 5;
__u16 i2_exp : 5;
__u16 i4_exp : 6;
};
/**
* struct c3_isp_af_stats - Auto Focus statistics information
*
* AF statistical information of each zone
*
* @stats: array of auto focus block statistics
* @reserved: undefined buffer space
*/
struct c3_isp_af_stats {
struct c3_isp_af_zone_stats stats[C3_ISP_AF_MAX_ZONES];
__u32 reserved[2];
} __attribute__((aligned(16)));
/**
* struct c3_isp_stats_info - V4L2_META_FMT_C3ISP_STATS
*
* Contains ISP statistics
*
* @awb: auto white balance stats
* @ae: auto exposure stats
* @af: auto focus stats
*/
struct c3_isp_stats_info {
struct c3_isp_awb_stats awb;
struct c3_isp_ae_stats ae;
struct c3_isp_af_stats af;
};
/**
* enum c3_isp_params_buffer_version - C3 ISP parameters block versioning
*
* @C3_ISP_PARAMS_BUFFER_V0: First version of C3 ISP parameters block
*/
enum c3_isp_params_buffer_version {
C3_ISP_PARAMS_BUFFER_V0,
};
/**
* enum c3_isp_params_block_type - Enumeration of C3 ISP parameter blocks
*
* Each block configures a specific processing block of the C3 ISP.
* The block type allows the driver to correctly interpret the parameters block
* data.
*
* @C3_ISP_PARAMS_BLOCK_AWB_GAINS: White balance gains
* @C3_ISP_PARAMS_BLOCK_AWB_CONFIG: AWB statistic format configuration for all
* blocks that control how stats are generated
* @C3_ISP_PARAMS_BLOCK_AE_CONFIG: AE statistic format configuration for all
* blocks that control how stats are generated
* @C3_ISP_PARAMS_BLOCK_AF_CONFIG: AF statistic format configuration for all
* blocks that control how stats are generated
* @C3_ISP_PARAMS_BLOCK_PST_GAMMA: post gamma parameters
* @C3_ISP_PARAMS_BLOCK_CCM: Color correction matrix parameters
* @C3_ISP_PARAMS_BLOCK_CSC: Color space conversion parameters
* @C3_ISP_PARAMS_BLOCK_BLC: Black level correction parameters
* @C3_ISP_PARAMS_BLOCK_SENTINEL: First non-valid block index
*/
enum c3_isp_params_block_type {
C3_ISP_PARAMS_BLOCK_AWB_GAINS,
C3_ISP_PARAMS_BLOCK_AWB_CONFIG,
C3_ISP_PARAMS_BLOCK_AE_CONFIG,
C3_ISP_PARAMS_BLOCK_AF_CONFIG,
C3_ISP_PARAMS_BLOCK_PST_GAMMA,
C3_ISP_PARAMS_BLOCK_CCM,
C3_ISP_PARAMS_BLOCK_CSC,
C3_ISP_PARAMS_BLOCK_BLC,
C3_ISP_PARAMS_BLOCK_SENTINEL
};
#define C3_ISP_PARAMS_BLOCK_FL_DISABLE (1U << 0)
#define C3_ISP_PARAMS_BLOCK_FL_ENABLE (1U << 1)
/**
* struct c3_isp_params_block_header - C3 ISP parameter block header
*
* This structure represents the common part of all the ISP configuration
* blocks. Each parameters block shall embed an instance of this structure type
* as its first member, followed by the block-specific configuration data. The
* driver inspects this common header to discern the block type and its size and
* properly handle the block content by casting it to the correct block-specific
* type.
*
* The @type field is one of the values enumerated by
* :c:type:`c3_isp_params_block_type` and specifies how the data should be
* interpreted by the driver. The @size field specifies the size of the
* parameters block and is used by the driver for validation purposes. The
* @flags field is a bitmask of per-block flags C3_ISP_PARAMS_FL*.
*
* When userspace wants to disable an ISP block the
* C3_ISP_PARAMS_BLOCK_FL_DISABLED bit should be set in the @flags field. In
* this case userspace may optionally omit the remainder of the configuration
* block, which will be ignored by the driver.
*
* When a new configuration of an ISP block needs to be applied userspace
* shall fully populate the ISP block and omit setting the
* C3_ISP_PARAMS_BLOCK_FL_DISABLED bit in the @flags field.
*
* Userspace is responsible for correctly populating the parameters block header
* fields (@type, @flags and @size) and the block-specific parameters.
*
* For example:
*
* .. code-block:: c
*
* void populate_pst_gamma(struct c3_isp_params_block_header *block) {
* struct c3_isp_params_pst_gamma *gamma =
* (struct c3_isp_params_pst_gamma *)block;
*
* gamma->header.type = C3_ISP_PARAMS_BLOCK_PST_GAMMA;
* gamma->header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE;
* gamma->header.size = sizeof(*gamma);
*
* for (unsigned int i = 0; i < 129; i++)
* gamma->pst_gamma_lut[i] = i;
* }
*
* @type: The parameters block type from :c:type:`c3_isp_params_block_type`
* @flags: A bitmask of block flags
* @size: Size (in bytes) of the parameters block, including this header
*/
struct c3_isp_params_block_header {
__u16 type;
__u16 flags;
__u32 size;
};
/**
* struct c3_isp_params_awb_gains - Gains for auto-white balance
*
* This struct allows users to configure the gains for white balance.
* There are four gain settings corresponding to each colour channel in
* the bayer domain. All of the gains are stored in Q4.8 format.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AWB_GAINS
* from :c:type:`c3_isp_params_block_type`
*
* @header: The C3 ISP parameters block header
* @gr_gain: Multiplier for Gr channel (Q4.8 format)
* @r_gain: Multiplier for R channel (Q4.8 format)
* @b_gain: Multiplier for B channel (Q4.8 format)
* @gb_gain: Multiplier for Gb channel (Q4.8 format)
*/
struct c3_isp_params_awb_gains {
struct c3_isp_params_block_header header;
__u16 gr_gain;
__u16 r_gain;
__u16 b_gain;
__u16 gb_gain;
} __attribute__((aligned(8)));
/**
* enum c3_isp_params_awb_tap_points - Tap points for the AWB statistics
* @C3_ISP_AWB_STATS_TAP_OFE: immediately after the optical frontend block
* @C3_ISP_AWB_STATS_TAP_GE: immediately after the green equal block
* @C3_ISP_AWB_STATS_TAP_BEFORE_WB: immediately before the white balance block
* @C3_ISP_AWB_STATS_TAP_AFTER_WB: immediately after the white balance block
*/
enum c3_isp_params_awb_tap_points {
C3_ISP_AWB_STATS_TAP_OFE = 0,
C3_ISP_AWB_STATS_TAP_GE,
C3_ISP_AWB_STATS_TAP_BEFORE_WB,
C3_ISP_AWB_STATS_TAP_AFTER_WB,
};
/**
* struct c3_isp_params_awb_config - Stats settings for auto-white balance
*
* This struct allows the configuration of the statistics generated for auto
* white balance.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AWB_CONFIG
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @tap_point: the tap point from enum c3_isp_params_awb_tap_point
* @satur_vald: AWB statistic over saturation control
* value: 0: disable, 1: enable
* @horiz_zones_num: active number of hotizontal zones [0..32]
* @vert_zones_num: active number of vertical zones [0..24]
* @rg_min: minimum R/G ratio (Q4.8 format)
* @rg_max: maximum R/G ratio (Q4.8 format)
* @bg_min: minimum B/G ratio (Q4.8 format)
* @bg_max: maximum B/G ratio (Q4.8 format)
* @rg_low: R/G ratio trim low (Q4.8 format)
* @rg_high: R/G ratio trim hight (Q4.8 format)
* @bg_low: B/G ratio trim low (Q4.8 format)
* @bg_high: B/G ratio trim high (Q4.8 format)
* @zone_weight: array of weights for AWB statistics zones [0..15]
* @horiz_coord: the horizontal coordinate of points on the diagonal [0..2888]
* @vert_coord: the vertical coordinate of points on the diagonal [0..2240]
*/
struct c3_isp_params_awb_config {
struct c3_isp_params_block_header header;
__u8 tap_point;
__u8 satur_vald;
__u8 horiz_zones_num;
__u8 vert_zones_num;
__u16 rg_min;
__u16 rg_max;
__u16 bg_min;
__u16 bg_max;
__u16 rg_low;
__u16 rg_high;
__u16 bg_low;
__u16 bg_high;
__u8 zone_weight[C3_ISP_AWB_MAX_ZONES];
__u16 horiz_coord[C3_ISP_AWB_MAX_PT_NUM];
__u16 vert_coord[C3_ISP_AWB_MAX_PT_NUM];
} __attribute__((aligned(8)));
/**
* enum c3_isp_params_ae_tap_points - Tap points for the AE statistics
* @C3_ISP_AE_STATS_TAP_GE: immediately after the green equal block
* @C3_ISP_AE_STATS_TAP_MLS: immediately after the mesh lens shading block
*/
enum c3_isp_params_ae_tap_points {
C3_ISP_AE_STATS_TAP_GE = 0,
C3_ISP_AE_STATS_TAP_MLS,
};
/**
* struct c3_isp_params_ae_config - Stats settings for auto-exposure
*
* This struct allows the configuration of the statistics generated for
* auto exposure.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AE_CONFIG
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @horiz_zones_num: active number of horizontal zones [0..17]
* @vert_zones_num: active number of vertical zones [0..15]
* @tap_point: the tap point from enum c3_isp_params_ae_tap_point
* @zone_weight: array of weights for AE statistics zones [0..15]
* @horiz_coord: the horizontal coordinate of points on the diagonal [0..2888]
* @vert_coord: the vertical coordinate of points on the diagonal [0..2240]
* @reserved: applications must zero this array
*/
struct c3_isp_params_ae_config {
struct c3_isp_params_block_header header;
__u8 tap_point;
__u8 horiz_zones_num;
__u8 vert_zones_num;
__u8 zone_weight[C3_ISP_AE_MAX_ZONES];
__u16 horiz_coord[C3_ISP_AE_MAX_PT_NUM];
__u16 vert_coord[C3_ISP_AE_MAX_PT_NUM];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* enum c3_isp_params_af_tap_points - Tap points for the AF statistics
* @C3_ISP_AF_STATS_TAP_SNR: immediately after the spatial noise reduce block
* @C3_ISP_AF_STATS_TAP_DMS: immediately after the demosaic block
*/
enum c3_isp_params_af_tap_points {
C3_ISP_AF_STATS_TAP_SNR = 0,
C3_ISP_AF_STATS_TAP_DMS,
};
/**
* struct c3_isp_params_af_config - Stats settings for auto-focus
*
* This struct allows the configuration of the statistics generated for
* auto focus.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AF_CONFIG
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @tap_point: the tap point from enum c3_isp_params_af_tap_point
* @horiz_zones_num: active number of hotizontal zones [0..17]
* @vert_zones_num: active number of vertical zones [0..15]
* @reserved: applications must zero this array
* @horiz_coord: the horizontal coordinate of points on the diagonal [0..2888]
* @vert_coord: the vertical coordinate of points on the diagonal [0..2240]
*/
struct c3_isp_params_af_config {
struct c3_isp_params_block_header header;
__u8 tap_point;
__u8 horiz_zones_num;
__u8 vert_zones_num;
__u8 reserved[5];
__u16 horiz_coord[C3_ISP_AF_MAX_PT_NUM];
__u16 vert_coord[C3_ISP_AF_MAX_PT_NUM];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_pst_gamma - Post gamma configuration
*
* This struct allows the configuration of the look up table for
* post gamma. The gamma curve consists of 129 points, so need to
* set lut[129].
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_PST_GAMMA
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @lut: lookup table for P-Stitch gamma [0..1023]
* @reserved: applications must zero this array
*/
struct c3_isp_params_pst_gamma {
struct c3_isp_params_block_header header;
__u16 lut[129];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_ccm - ISP CCM configuration
*
* This struct allows the configuration of the matrix for
* color correction. The matrix consists of 3 x 3 points,
* so need to set matrix[3][3].
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_CCM
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @matrix: a 3 x 3 matrix used for color correction,
* the value of matrix[x][y] is orig_value x 256. [-4096..4095]
* @reserved: applications must zero this array
*/
struct c3_isp_params_ccm {
struct c3_isp_params_block_header header;
__s16 matrix[3][3];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_csc - ISP Color Space Conversion configuration
*
* This struct allows the configuration of the matrix for color space
* conversion. The matrix consists of 3 x 3 points, so need to set matrix[3][3].
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_CSC
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @matrix: a 3x3 matrix used for the color space conversion,
* the value of matrix[x][y] is orig_value x 256. [-4096..4095]
* @reserved: applications must zero this array
*/
struct c3_isp_params_csc {
struct c3_isp_params_block_header header;
__s16 matrix[3][3];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_blc - ISP Black Level Correction configuration
*
* This struct allows the configuration of the block level offset for each
* color channel.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_BLC
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @gr_ofst: Gr blc offset (Q4.12 format)
* @r_ofst: R blc offset (Q4.12 format)
* @b_ofst: B blc offset (Q4.12 format)
* @gb_ofst: Gb blc offset(Q4.12 format)
*/
struct c3_isp_params_blc {
struct c3_isp_params_block_header header;
__u16 gr_ofst;
__u16 r_ofst;
__u16 b_ofst;
__u16 gb_ofst;
};
/**
* define C3_ISP_PARAMS_MAX_SIZE - Maximum size of all C3 ISP Parameters
*
* Though the parameters for the C3 ISP are passed as optional blocks, the
* driver still needs to know the absolute maximum size so that it can allocate
* a buffer sized appropriately to accommodate userspace attempting to set all
* possible parameters in a single frame.
*/
#define C3_ISP_PARAMS_MAX_SIZE \
(sizeof(struct c3_isp_params_awb_gains) + \
sizeof(struct c3_isp_params_awb_config) + \
sizeof(struct c3_isp_params_ae_config) + \
sizeof(struct c3_isp_params_af_config) + \
sizeof(struct c3_isp_params_pst_gamma) + \
sizeof(struct c3_isp_params_ccm) + \
sizeof(struct c3_isp_params_csc) + \
sizeof(struct c3_isp_params_blc))
/**
* struct c3_isp_params_cfg - C3 ISP configuration parameters
*
* This struct contains the configuration parameters of the C3 ISP
* algorithms, serialized by userspace into an opaque data buffer. Each
* configuration parameter block is represented by a block-specific structure
* which contains a :c:type:`c3_isp_param_block_header` entry as first
* member. Userspace populates the @data buffer with configuration parameters
* for the blocks that it intends to configure. As a consequence, the data
* buffer effective size changes according to the number of ISP blocks that
* userspace intends to configure.
*
* The parameters buffer is versioned by the @version field to allow modifying
* and extending its definition. Userspace should populate the @version field to
* inform the driver about the version it intends to use. The driver will parse
* and handle the @data buffer according to the data layout specific to the
* indicated revision and return an error if the desired revision is not
* supported.
*
* For each ISP block that userspace wants to configure, a block-specific
* structure is appended to the @data buffer, one after the other without gaps
* in between nor overlaps. Userspace shall populate the @total_size field with
* the effective size, in bytes, of the @data buffer.
*
* The expected memory layout of the parameters buffer is::
*
* +-------------------- struct c3_isp_params_cfg ---- ------------------+
* | version = C3_ISP_PARAM_BUFFER_V0; |
* | data_size = sizeof(struct c3_isp_params_awb_gains) + |
* | sizeof(struct c3_isp_params_awb_config); |
* | +------------------------- data ---------------------------------+ |
* | | +------------ struct c3_isp_params_awb_gains) ------------------+ |
* | | | +--------- struct c3_isp_params_block_header header -----+ | | |
* | | | | type = C3_ISP_PARAMS_BLOCK_AWB_GAINS; | | | |
* | | | | flags = C3_ISP_PARAMS_BLOCK_FL_NONE; | | | |
* | | | | size = sizeof(struct c3_isp_params_awb_gains); | | | |
* | | | +---------------------------------------------------------+ | | |
* | | | gr_gain = ...; | | |
* | | | r_gain = ...; | | |
* | | | b_gain = ...; | | |
* | | | gb_gain = ...; | | |
* | | +------------------ struct c3_isp_params_awb_config ----------+ | |
* | | | +---------- struct c3_isp_param_block_header header ------+ | | |
* | | | | type = C3_ISP_PARAMS_BLOCK_AWB_CONFIG; | | | |
* | | | | flags = C3_ISP_PARAMS_BLOCK_FL_NONE; | | | |
* | | | | size = sizeof(struct c3_isp_params_awb_config) | | | |
* | | | +---------------------------------------------------------+ | | |
* | | | tap_point = ...; | | |
* | | | satur_vald = ...; | | |
* | | | horiz_zones_num = ...; | | |
* | | | vert_zones_num = ...; | | |
* | | +-------------------------------------------------------------+ | |
* | +-----------------------------------------------------------------+ |
* +---------------------------------------------------------------------+
*
* @version: The C3 ISP parameters buffer version
* @data_size: The C3 ISP configuration data effective size, excluding this
* header
* @data: The C3 ISP configuration blocks data
*/
struct c3_isp_params_cfg {
__u32 version;
__u32 data_size;
__u8 data[C3_ISP_PARAMS_MAX_SIZE];
};
#endif

9
lib/libc/include/any-linux-any/linux/media/raspberrypi/pisp_be_config.h vendored
View File

@ -21,10 +21,11 @@
/* preferred byte alignment for outputs */
#define PISP_BACK_END_OUTPUT_MAX_ALIGN 64u
/* minimum allowed tile width anywhere in the pipeline */
#define PISP_BACK_END_MIN_TILE_WIDTH 16u
/* minimum allowed tile width anywhere in the pipeline */
#define PISP_BACK_END_MIN_TILE_HEIGHT 16u
/* minimum allowed tile sizes anywhere in the pipeline */
#define PISP_BACK_END_MIN_TILE_WIDTH 16u
#define PISP_BACK_END_MIN_TILE_HEIGHT 16u
#define PISP_BACK_END_MAX_TILE_WIDTH 65536u
#define PISP_BACK_END_MAX_TILE_HEIGHT 65536u
#define PISP_BACK_END_NUM_OUTPUTS 2
#define PISP_BACK_END_HOG_OUTPUT 1

10
lib/libc/include/any-linux-any/linux/mount.h vendored
View File

@ -179,7 +179,12 @@ struct statmount {
__u32 opt_array; /* [str] Array of nul terminated fs options */
__u32 opt_sec_num; /* Number of security options */
__u32 opt_sec_array; /* [str] Array of nul terminated security options */
__u64 __spare2[46];
__u64 supported_mask; /* Mask flags that this kernel supports */
__u32 mnt_uidmap_num; /* Number of uid mappings */
__u32 mnt_uidmap; /* [str] Array of uid mappings (as seen from callers namespace) */
__u32 mnt_gidmap_num; /* Number of gid mappings */
__u32 mnt_gidmap; /* [str] Array of gid mappings (as seen from callers namespace) */
__u64 __spare2[43];
char str[]; /* Variable size part containing strings */
};
@ -217,6 +222,9 @@ struct mnt_id_req {
#define STATMOUNT_SB_SOURCE 0x00000200U /* Want/got sb_source */
#define STATMOUNT_OPT_ARRAY 0x00000400U /* Want/got opt_... */
#define STATMOUNT_OPT_SEC_ARRAY 0x00000800U /* Want/got opt_sec... */
#define STATMOUNT_SUPPORTED_MASK 0x00001000U /* Want/got supported mask flags */
#define STATMOUNT_MNT_UIDMAP 0x00002000U /* Want/got uidmap... */
#define STATMOUNT_MNT_GIDMAP 0x00004000U /* Want/got gidmap... */
/*
* Special @mnt_id values that can be passed to listmount

2
lib/libc/include/any-linux-any/linux/mptcp.h vendored
View File

@ -29,6 +29,8 @@
#define MPTCP_INFO_FLAG_FALLBACK _BITUL(0)
#define MPTCP_INFO_FLAG_REMOTE_KEY_RECEIVED _BITUL(1)
#define MPTCP_PM_EV_FLAG_DENY_JOIN_ID0 _BITUL(0)
#define MPTCP_PM_ADDR_FLAG_SIGNAL (1 << 0)
#define MPTCP_PM_ADDR_FLAG_SUBFLOW (1 << 1)
#define MPTCP_PM_ADDR_FLAG_BACKUP (1 << 2)

10
lib/libc/include/any-linux-any/linux/mptcp_pm.h vendored
View File

@ -16,10 +16,10 @@
* good time to allocate memory and send ADD_ADDR if needed. Depending on the
* traffic-patterns it can take a long time until the MPTCP_EVENT_ESTABLISHED
* is sent. Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport, server-side.
* sport, dport, server-side, [flags].
* @MPTCP_EVENT_ESTABLISHED: A MPTCP connection is established (can start new
* subflows). Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport, server-side.
* sport, dport, server-side, [flags].
* @MPTCP_EVENT_CLOSED: A MPTCP connection has stopped. Attribute: token.
* @MPTCP_EVENT_ANNOUNCED: A new address has been announced by the peer.
* Attributes: token, rem_id, family, daddr4 | daddr6 [, dport].
@ -27,14 +27,14 @@
* token, rem_id.
* @MPTCP_EVENT_SUB_ESTABLISHED: A new subflow has been established. 'error'
* should not be set. Attributes: token, family, loc_id, rem_id, saddr4 |
* saddr6, daddr4 | daddr6, sport, dport, backup, if_idx [, error].
* saddr6, daddr4 | daddr6, sport, dport, backup, if-idx [, error].
* @MPTCP_EVENT_SUB_CLOSED: A subflow has been closed. An error (copy of
* sk_err) could be set if an error has been detected for this subflow.
* Attributes: token, family, loc_id, rem_id, saddr4 | saddr6, daddr4 |
* daddr6, sport, dport, backup, if_idx [, error].
* daddr6, sport, dport, backup, if-idx [, error].
* @MPTCP_EVENT_SUB_PRIORITY: The priority of a subflow has changed. 'error'
* should not be set. Attributes: token, family, loc_id, rem_id, saddr4 |
* saddr6, daddr4 | daddr6, sport, dport, backup, if_idx [, error].
* saddr6, daddr4 | daddr6, sport, dport, backup, if-idx [, error].
* @MPTCP_EVENT_LISTENER_CREATED: A new PM listener is created. Attributes:
* family, sport, saddr4 | saddr6.
* @MPTCP_EVENT_LISTENER_CLOSED: A PM listener is closed. Attributes: family,

291
lib/libc/include/any-linux-any/linux/mshv.h vendored Normal file
View File

@ -0,0 +1,291 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Userspace interfaces for /dev/mshv* devices and derived fds
*
* This file is divided into sections containing data structures and IOCTLs for
* a particular set of related devices or derived file descriptors.
*
* The IOCTL definitions are at the end of each section. They are grouped by
* device/fd, so that new IOCTLs can easily be added with a monotonically
* increasing number.
*/
#ifndef _LINUX_MSHV_H
#define _LINUX_MSHV_H
#include <linux/types.h>
#define MSHV_IOCTL 0xB8
/*
*******************************************
* Entry point to main VMM APIs: /dev/mshv *
*******************************************
*/
enum {
MSHV_PT_BIT_LAPIC,
MSHV_PT_BIT_X2APIC,
MSHV_PT_BIT_GPA_SUPER_PAGES,
MSHV_PT_BIT_COUNT,
};
#define MSHV_PT_FLAGS_MASK ((1 << MSHV_PT_BIT_COUNT) - 1)
enum {
MSHV_PT_ISOLATION_NONE,
MSHV_PT_ISOLATION_COUNT,
};
/**
* struct mshv_create_partition - arguments for MSHV_CREATE_PARTITION
* @pt_flags: Bitmask of 1 << MSHV_PT_BIT_*
* @pt_isolation: MSHV_PT_ISOLATION_*
*
* Returns a file descriptor to act as a handle to a guest partition.
* At this point the partition is not yet initialized in the hypervisor.
* Some operations must be done with the partition in this state, e.g. setting
* so-called "early" partition properties. The partition can then be
* initialized with MSHV_INITIALIZE_PARTITION.
*/
struct mshv_create_partition {
__u64 pt_flags;
__u64 pt_isolation;
};
/* /dev/mshv */
#define MSHV_CREATE_PARTITION _IOW(MSHV_IOCTL, 0x00, struct mshv_create_partition)
/*
************************
* Child partition APIs *
************************
*/
struct mshv_create_vp {
__u32 vp_index;
};
enum {
MSHV_SET_MEM_BIT_WRITABLE,
MSHV_SET_MEM_BIT_EXECUTABLE,
MSHV_SET_MEM_BIT_UNMAP,
MSHV_SET_MEM_BIT_COUNT
};
#define MSHV_SET_MEM_FLAGS_MASK ((1 << MSHV_SET_MEM_BIT_COUNT) - 1)
/* The hypervisor's "native" page size */
#define MSHV_HV_PAGE_SIZE 0x1000
/**
* struct mshv_user_mem_region - arguments for MSHV_SET_GUEST_MEMORY
* @size: Size of the memory region (bytes). Must be aligned to
* MSHV_HV_PAGE_SIZE
* @guest_pfn: Base guest page number to map
* @userspace_addr: Base address of userspace memory. Must be aligned to
* MSHV_HV_PAGE_SIZE
* @flags: Bitmask of 1 << MSHV_SET_MEM_BIT_*. If (1 << MSHV_SET_MEM_BIT_UNMAP)
* is set, ignore other bits.
* @rsvd: MBZ
*
* Map or unmap a region of userspace memory to Guest Physical Addresses (GPA).
* Mappings can't overlap in GPA space or userspace.
* To unmap, these fields must match an existing mapping.
*/
struct mshv_user_mem_region {
__u64 size;
__u64 guest_pfn;
__u64 userspace_addr;
__u8 flags;
__u8 rsvd[7];
};
enum {
MSHV_IRQFD_BIT_DEASSIGN,
MSHV_IRQFD_BIT_RESAMPLE,
MSHV_IRQFD_BIT_COUNT,
};
#define MSHV_IRQFD_FLAGS_MASK ((1 << MSHV_IRQFD_BIT_COUNT) - 1)
struct mshv_user_irqfd {
__s32 fd;
__s32 resamplefd;
__u32 gsi;
__u32 flags;
};
enum {
MSHV_IOEVENTFD_BIT_DATAMATCH,
MSHV_IOEVENTFD_BIT_PIO,
MSHV_IOEVENTFD_BIT_DEASSIGN,
MSHV_IOEVENTFD_BIT_COUNT,
};
#define MSHV_IOEVENTFD_FLAGS_MASK ((1 << MSHV_IOEVENTFD_BIT_COUNT) - 1)
struct mshv_user_ioeventfd {
__u64 datamatch;
__u64 addr; /* legal pio/mmio address */
__u32 len; /* 1, 2, 4, or 8 bytes */
__s32 fd;
__u32 flags;
__u8 rsvd[4];
};
struct mshv_user_irq_entry {
__u32 gsi;
__u32 address_lo;
__u32 address_hi;
__u32 data;
};
struct mshv_user_irq_table {
__u32 nr;
__u32 rsvd; /* MBZ */
struct mshv_user_irq_entry entries[];
};
enum {
MSHV_GPAP_ACCESS_TYPE_ACCESSED,
MSHV_GPAP_ACCESS_TYPE_DIRTY,
MSHV_GPAP_ACCESS_TYPE_COUNT /* Count of enum members */
};
enum {
MSHV_GPAP_ACCESS_OP_NOOP,
MSHV_GPAP_ACCESS_OP_CLEAR,
MSHV_GPAP_ACCESS_OP_SET,
MSHV_GPAP_ACCESS_OP_COUNT /* Count of enum members */
};
/**
* struct mshv_gpap_access_bitmap - arguments for MSHV_GET_GPAP_ACCESS_BITMAP
* @access_type: MSHV_GPAP_ACCESS_TYPE_* - The type of access to record in the
* bitmap
* @access_op: MSHV_GPAP_ACCESS_OP_* - Allows an optional clear or set of all
* the access states in the range, after retrieving the current
* states.
* @rsvd: MBZ
* @page_count: Number of pages
* @gpap_base: Base gpa page number
* @bitmap_ptr: Output buffer for bitmap, at least (page_count + 7) / 8 bytes
*
* Retrieve a bitmap of either ACCESSED or DIRTY bits for a given range of guest
* memory, and optionally clear or set the bits.
*/
struct mshv_gpap_access_bitmap {
__u8 access_type;
__u8 access_op;
__u8 rsvd[6];
__u64 page_count;
__u64 gpap_base;
__u64 bitmap_ptr;
};
/**
* struct mshv_root_hvcall - arguments for MSHV_ROOT_HVCALL
* @code: Hypercall code (HVCALL_*)
* @reps: in: Rep count ('repcount')
* out: Reps completed ('repcomp'). MBZ unless rep hvcall
* @in_sz: Size of input incl rep data. <= MSHV_HV_PAGE_SIZE
* @out_sz: Size of output buffer. <= MSHV_HV_PAGE_SIZE. MBZ if out_ptr is 0
* @status: in: MBZ
* out: HV_STATUS_* from hypercall
* @rsvd: MBZ
* @in_ptr: Input data buffer (struct hv_input_*). If used with partition or
* vp fd, partition id field is populated by kernel.
* @out_ptr: Output data buffer (optional)
*/
struct mshv_root_hvcall {
__u16 code;
__u16 reps;
__u16 in_sz;
__u16 out_sz;
__u16 status;
__u8 rsvd[6];
__u64 in_ptr;
__u64 out_ptr;
};
/* Partition fds created with MSHV_CREATE_PARTITION */
#define MSHV_INITIALIZE_PARTITION _IO(MSHV_IOCTL, 0x00)
#define MSHV_CREATE_VP _IOW(MSHV_IOCTL, 0x01, struct mshv_create_vp)
#define MSHV_SET_GUEST_MEMORY _IOW(MSHV_IOCTL, 0x02, struct mshv_user_mem_region)
#define MSHV_IRQFD _IOW(MSHV_IOCTL, 0x03, struct mshv_user_irqfd)
#define MSHV_IOEVENTFD _IOW(MSHV_IOCTL, 0x04, struct mshv_user_ioeventfd)
#define MSHV_SET_MSI_ROUTING _IOW(MSHV_IOCTL, 0x05, struct mshv_user_irq_table)
#define MSHV_GET_GPAP_ACCESS_BITMAP _IOWR(MSHV_IOCTL, 0x06, struct mshv_gpap_access_bitmap)
/* Generic hypercall */
#define MSHV_ROOT_HVCALL _IOWR(MSHV_IOCTL, 0x07, struct mshv_root_hvcall)
/*
********************************
* VP APIs for child partitions *
********************************
*/
#define MSHV_RUN_VP_BUF_SZ 256
/*
* VP state pages may be mapped to userspace via mmap().
* To specify which state page, use MSHV_VP_MMAP_OFFSET_ values multiplied by
* the system page size.
* e.g.
* long page_size = sysconf(_SC_PAGE_SIZE);
* void *reg_page = mmap(NULL, MSHV_HV_PAGE_SIZE, PROT_READ|PROT_WRITE,
* MAP_SHARED, vp_fd,
* MSHV_VP_MMAP_OFFSET_REGISTERS * page_size);
*/
enum {
MSHV_VP_MMAP_OFFSET_REGISTERS,
MSHV_VP_MMAP_OFFSET_INTERCEPT_MESSAGE,
MSHV_VP_MMAP_OFFSET_GHCB,
MSHV_VP_MMAP_OFFSET_COUNT
};
/**
* struct mshv_run_vp - argument for MSHV_RUN_VP
* @msg_buf: On success, the intercept message is copied here. It can be
* interpreted using the relevant hypervisor definitions.
*/
struct mshv_run_vp {
__u8 msg_buf[MSHV_RUN_VP_BUF_SZ];
};
enum {
MSHV_VP_STATE_LAPIC, /* Local interrupt controller state (either arch) */
MSHV_VP_STATE_XSAVE, /* XSAVE data in compacted form (x86_64) */
MSHV_VP_STATE_SIMP,
MSHV_VP_STATE_SIEFP,
MSHV_VP_STATE_SYNTHETIC_TIMERS,
MSHV_VP_STATE_COUNT,
};
/**
* struct mshv_get_set_vp_state - arguments for MSHV_[GET,SET]_VP_STATE
* @type: MSHV_VP_STATE_*
* @rsvd: MBZ
* @buf_sz: in: 4k page-aligned size of buffer
* out: Actual size of data (on EINVAL, check this to see if buffer
* was too small)
* @buf_ptr: 4k page-aligned data buffer
*/
struct mshv_get_set_vp_state {
__u8 type;
__u8 rsvd[3];
__u32 buf_sz;
__u64 buf_ptr;
};
/* VP fds created with MSHV_CREATE_VP */
#define MSHV_RUN_VP _IOR(MSHV_IOCTL, 0x00, struct mshv_run_vp)
#define MSHV_GET_VP_STATE _IOWR(MSHV_IOCTL, 0x01, struct mshv_get_set_vp_state)
#define MSHV_SET_VP_STATE _IOWR(MSHV_IOCTL, 0x02, struct mshv_get_set_vp_state)
/*
* Generic hypercall
* Defined above in partition IOCTLs, avoid redefining it here
* #define MSHV_ROOT_HVCALL _IOWR(MSHV_IOCTL, 0x07, struct mshv_root_hvcall)
*/
#endif

5
lib/libc/include/any-linux-any/linux/neighbour.h vendored
View File

@ -54,6 +54,7 @@ enum {
/* Extended flags under NDA_FLAGS_EXT: */
#define NTF_EXT_MANAGED (1 << 0)
#define NTF_EXT_LOCKED (1 << 1)
#define NTF_EXT_EXT_VALIDATED (1 << 2)
/*
* Neighbor Cache Entry States.
@ -92,6 +93,10 @@ enum {
* bridge in response to a host trying to communicate via a locked bridge port
* with MAB enabled. Their purpose is to notify user space that a host requires
* authentication.
*
* NTF_EXT_EXT_VALIDATED flagged neighbor entries were externally validated by
* a user space control plane. The kernel will not remove or invalidate them,
* but it can probe them and notify user space when they become reachable.
*/
struct nda_cacheinfo {

7
lib/libc/include/any-linux-any/linux/net_dropmon.h vendored
View File

@ -10,13 +10,6 @@ struct net_dm_drop_point {
__u32 count;
};
#define is_drop_point_hw(x) do {\
int ____i, ____j;\
for (____i = 0; ____i < 8; i ____i++)\
____j |= x[____i];\
____j;\
} while (0)
#define NET_DM_CFG_VERSION 0
#define NET_DM_CFG_ALERT_COUNT 1
#define NET_DM_CFG_ALERT_DELAY 2

17
lib/libc/include/any-linux-any/linux/net_tstamp.h vendored
View File

@ -13,6 +13,17 @@
#include <linux/types.h>
#include <linux/socket.h> /* for SO_TIMESTAMPING */
/*
* Possible type of hwtstamp provider. Mainly "precise" the default one
* is for IEEE 1588 quality and "approx" is for NICs DMA point.
*/
enum hwtstamp_provider_qualifier {
HWTSTAMP_PROVIDER_QUALIFIER_PRECISE,
HWTSTAMP_PROVIDER_QUALIFIER_APPROX,
HWTSTAMP_PROVIDER_QUALIFIER_CNT,
};
/* SO_TIMESTAMPING flags */
enum {
SOF_TIMESTAMPING_TX_HARDWARE = (1<<0),
@ -33,8 +44,9 @@ enum {
SOF_TIMESTAMPING_BIND_PHC = (1 << 15),
SOF_TIMESTAMPING_OPT_ID_TCP = (1 << 16),
SOF_TIMESTAMPING_OPT_RX_FILTER = (1 << 17),
SOF_TIMESTAMPING_TX_COMPLETION = (1 << 18),
SOF_TIMESTAMPING_LAST = SOF_TIMESTAMPING_OPT_RX_FILTER,
SOF_TIMESTAMPING_LAST = SOF_TIMESTAMPING_TX_COMPLETION,
SOF_TIMESTAMPING_MASK = (SOF_TIMESTAMPING_LAST - 1) |
SOF_TIMESTAMPING_LAST
};
@ -47,7 +59,8 @@ enum {
#define SOF_TIMESTAMPING_TX_RECORD_MASK (SOF_TIMESTAMPING_TX_HARDWARE | \
SOF_TIMESTAMPING_TX_SOFTWARE | \
SOF_TIMESTAMPING_TX_SCHED | \
SOF_TIMESTAMPING_TX_ACK)
SOF_TIMESTAMPING_TX_ACK | \
SOF_TIMESTAMPING_TX_COMPLETION)
/**
* struct so_timestamping - SO_TIMESTAMPING parameter

1
lib/libc/include/any-linux-any/linux/netconf.h vendored
View File

@ -19,6 +19,7 @@ enum {
NETCONFA_IGNORE_ROUTES_WITH_LINKDOWN,
NETCONFA_INPUT,
NETCONFA_BC_FORWARDING,
NETCONFA_FORCE_FORWARDING,
__NETCONFA_MAX
};
#define NETCONFA_MAX (__NETCONFA_MAX - 1)

23
lib/libc/include/any-linux-any/linux/netdev.h vendored
View File

@ -59,10 +59,13 @@ enum netdev_xdp_rx_metadata {
* by the driver.
* @NETDEV_XSK_FLAGS_TX_CHECKSUM: L3 checksum HW offload is supported by the
* driver.
* @NETDEV_XSK_FLAGS_TX_LAUNCH_TIME_FIFO: Launch time HW offload is supported
* by the driver.
*/
enum netdev_xsk_flags {
NETDEV_XSK_FLAGS_TX_TIMESTAMP = 1,
NETDEV_XSK_FLAGS_TX_CHECKSUM = 2,
NETDEV_XSK_FLAGS_TX_LAUNCH_TIME_FIFO = 4,
};
enum netdev_queue_type {
@ -74,6 +77,11 @@ enum netdev_qstats_scope {
NETDEV_QSTATS_SCOPE_QUEUE = 1,
};
enum netdev_napi_threaded {
NETDEV_NAPI_THREADED_DISABLED,
NETDEV_NAPI_THREADED_ENABLED,
};
enum {
NETDEV_A_DEV_IFINDEX = 1,
NETDEV_A_DEV_PAD,
@ -86,6 +94,11 @@ enum {
NETDEV_A_DEV_MAX = (__NETDEV_A_DEV_MAX - 1)
};
enum {
__NETDEV_A_IO_URING_PROVIDER_INFO_MAX,
NETDEV_A_IO_URING_PROVIDER_INFO_MAX = (__NETDEV_A_IO_URING_PROVIDER_INFO_MAX - 1)
};
enum {
NETDEV_A_PAGE_POOL_ID = 1,
NETDEV_A_PAGE_POOL_IFINDEX,
@ -94,6 +107,7 @@ enum {
NETDEV_A_PAGE_POOL_INFLIGHT_MEM,
NETDEV_A_PAGE_POOL_DETACH_TIME,
NETDEV_A_PAGE_POOL_DMABUF,
NETDEV_A_PAGE_POOL_IO_URING,
__NETDEV_A_PAGE_POOL_MAX,
NETDEV_A_PAGE_POOL_MAX = (__NETDEV_A_PAGE_POOL_MAX - 1)
@ -125,17 +139,25 @@ enum {
NETDEV_A_NAPI_DEFER_HARD_IRQS,
NETDEV_A_NAPI_GRO_FLUSH_TIMEOUT,
NETDEV_A_NAPI_IRQ_SUSPEND_TIMEOUT,
NETDEV_A_NAPI_THREADED,
__NETDEV_A_NAPI_MAX,
NETDEV_A_NAPI_MAX = (__NETDEV_A_NAPI_MAX - 1)
};
enum {
__NETDEV_A_XSK_INFO_MAX,
NETDEV_A_XSK_INFO_MAX = (__NETDEV_A_XSK_INFO_MAX - 1)
};
enum {
NETDEV_A_QUEUE_ID = 1,
NETDEV_A_QUEUE_IFINDEX,
NETDEV_A_QUEUE_TYPE,
NETDEV_A_QUEUE_NAPI_ID,
NETDEV_A_QUEUE_DMABUF,
NETDEV_A_QUEUE_IO_URING,
NETDEV_A_QUEUE_XSK,
__NETDEV_A_QUEUE_MAX,
NETDEV_A_QUEUE_MAX = (__NETDEV_A_QUEUE_MAX - 1)
@ -203,6 +225,7 @@ enum {
NETDEV_CMD_QSTATS_GET,
NETDEV_CMD_BIND_RX,
NETDEV_CMD_NAPI_SET,
NETDEV_CMD_BIND_TX,
__NETDEV_CMD_MAX,
NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1)

14
lib/libc/include/any-linux-any/linux/netfilter/nf_tables.h vendored
View File

@ -394,6 +394,8 @@ enum nft_set_field_attributes {
* @NFTA_SET_HANDLE: set handle (NLA_U64)
* @NFTA_SET_EXPR: set expression (NLA_NESTED: nft_expr_attributes)
* @NFTA_SET_EXPRESSIONS: list of expressions (NLA_NESTED: nft_list_attributes)
* @NFTA_SET_TYPE: set backend type (NLA_STRING)
* @NFTA_SET_COUNT: number of set elements (NLA_U32)
*/
enum nft_set_attributes {
NFTA_SET_UNSPEC,
@ -415,6 +417,8 @@ enum nft_set_attributes {
NFTA_SET_HANDLE,
NFTA_SET_EXPR,
NFTA_SET_EXPRESSIONS,
NFTA_SET_TYPE,
NFTA_SET_COUNT,
__NFTA_SET_MAX
};
#define NFTA_SET_MAX (__NFTA_SET_MAX - 1)
@ -1780,10 +1784,12 @@ enum nft_synproxy_attributes {
* enum nft_device_attributes - nf_tables device netlink attributes
*
* @NFTA_DEVICE_NAME: name of this device (NLA_STRING)
* @NFTA_DEVICE_PREFIX: device name prefix, a simple wildcard (NLA_STRING)
*/
enum nft_devices_attributes {
NFTA_DEVICE_UNSPEC,
NFTA_DEVICE_NAME,
NFTA_DEVICE_PREFIX,
__NFTA_DEVICE_MAX
};
#define NFTA_DEVICE_MAX (__NFTA_DEVICE_MAX - 1)
@ -1837,6 +1843,10 @@ enum nft_xfrm_keys {
* @NFTA_TRACE_MARK: nfmark (NLA_U32)
* @NFTA_TRACE_NFPROTO: nf protocol processed (NLA_U32)
* @NFTA_TRACE_POLICY: policy that decided fate of packet (NLA_U32)
* @NFTA_TRACE_CT_ID: conntrack id (NLA_U32)
* @NFTA_TRACE_CT_DIRECTION: packets direction (NLA_U8)
* @NFTA_TRACE_CT_STATUS: conntrack status (NLA_U32)
* @NFTA_TRACE_CT_STATE: packet state (new, established, ...) (NLA_U32)
*/
enum nft_trace_attributes {
NFTA_TRACE_UNSPEC,
@ -1857,6 +1867,10 @@ enum nft_trace_attributes {
NFTA_TRACE_NFPROTO,
NFTA_TRACE_POLICY,
NFTA_TRACE_PAD,
NFTA_TRACE_CT_ID,
NFTA_TRACE_CT_DIRECTION,
NFTA_TRACE_CT_STATUS,
NFTA_TRACE_CT_STATE,
__NFTA_TRACE_MAX
};
#define NFTA_TRACE_MAX (__NFTA_TRACE_MAX - 1)

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