diff --git a/std/os/linux/tls.zig b/std/os/linux/tls.zig
index 2ed5f1d75b..3c55013f47 100644
--- a/std/os/linux/tls.zig
+++ b/std/os/linux/tls.zig
@@ -133,7 +133,7 @@ pub fn initTLS() void {
     var at_phent: usize = undefined;
     var at_phnum: usize = undefined;
     var at_phdr: usize = undefined;
-    var at_hwcap: ?usize = null;
+    var at_hwcap: usize = undefined;
 
     var i: usize = 0;
     while (auxv[i].a_type != std.elf.AT_NULL) : (i += 1) {
@@ -146,16 +146,6 @@ pub fn initTLS() void {
         }
     }
 
-    // If the cpu is arm-based, check if it supports the TLS register
-    if (at_hwcap) |hwcap| {
-        if (builtin.arch == builtin.Arch.arm and hwcap & std.os.linux.HWCAP_TLS == 0) {
-            // If the CPU does not support TLS via a coprocessor register,
-            // a kernel helper function can be used instead on certain linux kernels.
-            // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.
-            @panic("TODO: Implement ARM fallback TLS functionality");
-        }
-    }
-
     // Sanity check
     assert(at_phent == @sizeOf(elf.Phdr));
 
@@ -171,6 +161,14 @@ pub fn initTLS() void {
     }
 
     if (tls_phdr) |phdr| {
+        // If the cpu is arm-based, check if it supports the TLS register
+        if (builtin.arch == builtin.Arch.arm and hwcap & std.os.linux.HWCAP_TLS == 0) {
+            // If the CPU does not support TLS via a coprocessor register,
+            // a kernel helper function can be used instead on certain linux kernels.
+            // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.
+            @panic("TODO: Implement ARM fallback TLS functionality");
+        }
+
         // Offsets into the allocated TLS area
         var tcb_offset: usize = undefined;
         var dtv_offset: usize = undefined;