diff --git a/doc/langref.html.in b/doc/langref.html.in
index 55b8d82476..e244d69e25 100644
--- a/doc/langref.html.in
+++ b/doc/langref.html.in
@@ -2810,10 +2810,10 @@ test "@TagType" {
     assert(@TagType(Small) == u2);
 }
 
-// @typeInfo tells us the field count and the fields name:
+// @typeInfo tells us the field count and the fields names:
 test "@typeInfo" {
     assert(@typeInfo(Small).Enum.fields.len == 4);
-    assert(mem.eql(u8, @typeInfo(Small).Enum.fields[0].name, "Two"));
+    assert(mem.eql(u8, @typeInfo(Small).Enum.fields[1].name, "Two"));
 }
 
 // @tagName gives a []const u8 representation of an enum value:
diff --git a/src/all_types.hpp b/src/all_types.hpp
index 9f20d176bf..022a34038e 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -1754,7 +1754,6 @@ enum BuiltinFnId {
     BuiltinFnIdIntToErr,
     BuiltinFnIdEnumToInt,
     BuiltinFnIdIntToEnum,
-    BuiltinFnIdIntType,
     BuiltinFnIdVectorType,
     BuiltinFnIdShuffle,
     BuiltinFnIdSplat,
@@ -1781,7 +1780,6 @@ enum BuiltinFnId {
     BuiltinFnIdOpaqueType,
     BuiltinFnIdThis,
     BuiltinFnIdSetAlignStack,
-    BuiltinFnIdArgType,
     BuiltinFnIdExport,
     BuiltinFnIdErrorReturnTrace,
     BuiltinFnIdAtomicRmw,
@@ -2626,7 +2624,6 @@ enum IrInstSrcId {
     IrInstSrcIdIntToFloat,
     IrInstSrcIdFloatToInt,
     IrInstSrcIdBoolToInt,
-    IrInstSrcIdIntType,
     IrInstSrcIdVectorType,
     IrInstSrcIdShuffleVector,
     IrInstSrcIdSplat,
@@ -3628,13 +3625,6 @@ struct IrInstSrcBoolToInt {
     IrInstSrc *target;
 };
 
-struct IrInstSrcIntType {
-    IrInstSrc base;
-
-    IrInstSrc *is_signed;
-    IrInstSrc *bit_count;
-};
-
 struct IrInstSrcVectorType {
     IrInstSrc base;
 
diff --git a/src/codegen.cpp b/src/codegen.cpp
index c6ee153573..f9d2566da7 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8189,7 +8189,6 @@ static void define_builtin_fns(CodeGen *g) {
     create_builtin_fn(g, BuiltinFnIdIntToEnum, "intToEnum", 2);
     create_builtin_fn(g, BuiltinFnIdCompileErr, "compileError", 1);
     create_builtin_fn(g, BuiltinFnIdCompileLog, "compileLog", SIZE_MAX);
-    create_builtin_fn(g, BuiltinFnIdIntType, "IntType", 2); // TODO rename to Int
     create_builtin_fn(g, BuiltinFnIdVectorType, "Vector", 2);
     create_builtin_fn(g, BuiltinFnIdShuffle, "shuffle", 4);
     create_builtin_fn(g, BuiltinFnIdSplat, "splat", 2);
@@ -8234,7 +8233,6 @@ static void define_builtin_fns(CodeGen *g) {
     create_builtin_fn(g, BuiltinFnIdAlignCast, "alignCast", 2);
     create_builtin_fn(g, BuiltinFnIdOpaqueType, "OpaqueType", 0);
     create_builtin_fn(g, BuiltinFnIdSetAlignStack, "setAlignStack", 1);
-    create_builtin_fn(g, BuiltinFnIdArgType, "ArgType", 2);
     create_builtin_fn(g, BuiltinFnIdExport, "export", 2);
     create_builtin_fn(g, BuiltinFnIdErrorReturnTrace, "errorReturnTrace", 0);
     create_builtin_fn(g, BuiltinFnIdAtomicRmw, "atomicRmw", 5);
diff --git a/src/ir.cpp b/src/ir.cpp
index 6646d0ed55..80b8c93abd 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -389,8 +389,6 @@ static void destroy_instruction_src(IrInstSrc *inst) {
             return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcFloatToInt *>(inst));
         case IrInstSrcIdBoolToInt:
             return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcBoolToInt *>(inst));
-        case IrInstSrcIdIntType:
-            return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcIntType *>(inst));
         case IrInstSrcIdVectorType:
             return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcVectorType *>(inst));
         case IrInstSrcIdShuffleVector:
@@ -1285,10 +1283,6 @@ static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolToInt *) {
     return IrInstSrcIdBoolToInt;
 }
 
-static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntType *) {
-    return IrInstSrcIdIntType;
-}
-
 static constexpr IrInstSrcId ir_inst_id(IrInstSrcVectorType *) {
     return IrInstSrcIdVectorType;
 }
@@ -3518,19 +3512,6 @@ static IrInstSrc *ir_build_bool_to_int(IrBuilderSrc *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstSrc *ir_build_int_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_signed,
-        IrInstSrc *bit_count)
-{
-    IrInstSrcIntType *instruction = ir_build_instruction<IrInstSrcIntType>(irb, scope, source_node);
-    instruction->is_signed = is_signed;
-    instruction->bit_count = bit_count;
-
-    ir_ref_instruction(is_signed, irb->current_basic_block);
-    ir_ref_instruction(bit_count, irb->current_basic_block);
-
-    return &instruction->base;
-}
-
 static IrInstSrc *ir_build_vector_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *len,
         IrInstSrc *elem_type)
 {
@@ -6530,21 +6511,6 @@ static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNod
                 IrInstSrc *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
-        case BuiltinFnIdIntType:
-            {
-                AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_inst_src)
-                    return arg0_value;
-
-                AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_inst_src)
-                    return arg1_value;
-
-                IrInstSrc *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
-                return ir_lval_wrap(irb, scope, int_type, lval, result_loc);
-            }
         case BuiltinFnIdVectorType:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
@@ -7074,21 +7040,6 @@ static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNod
                 IrInstSrc *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);
             }
-        case BuiltinFnIdArgType:
-            {
-                AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_inst_src)
-                    return arg0_value;
-
-                AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_inst_src)
-                    return arg1_value;
-
-                IrInstSrc *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
-                return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);
-            }
         case BuiltinFnIdExport:
             {
                 // Cast the options parameter to the options type
@@ -25385,20 +25336,6 @@ static IrInstGen *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstSrcBo
     return ir_resolve_cast(ira, &instruction->base.base, target, u1_type, CastOpBoolToInt);
 }
 
-static IrInstGen *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstSrcIntType *instruction) {
-    IrInstGen *is_signed_value = instruction->is_signed->child;
-    bool is_signed;
-    if (!ir_resolve_bool(ira, is_signed_value, &is_signed))
-        return ira->codegen->invalid_inst_gen;
-
-    IrInstGen *bit_count_value = instruction->bit_count->child;
-    uint64_t bit_count;
-    if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))
-        return ira->codegen->invalid_inst_gen;
-
-    return ir_const_type(ira, &instruction->base.base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
-}
-
 static IrInstGen *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstSrcVectorType *instruction) {
     uint64_t len;
     if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
@@ -29270,8 +29207,6 @@ static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruc
             return ir_analyze_instruction_float_to_int(ira, (IrInstSrcFloatToInt *)instruction);
         case IrInstSrcIdBoolToInt:
             return ir_analyze_instruction_bool_to_int(ira, (IrInstSrcBoolToInt *)instruction);
-        case IrInstSrcIdIntType:
-            return ir_analyze_instruction_int_type(ira, (IrInstSrcIntType *)instruction);
         case IrInstSrcIdVectorType:
             return ir_analyze_instruction_vector_type(ira, (IrInstSrcVectorType *)instruction);
         case IrInstSrcIdShuffleVector:
@@ -29754,7 +29689,6 @@ bool ir_inst_src_has_side_effects(IrInstSrc *instruction) {
         case IrInstSrcIdRef:
         case IrInstSrcIdEmbedFile:
         case IrInstSrcIdTruncate:
-        case IrInstSrcIdIntType:
         case IrInstSrcIdVectorType:
         case IrInstSrcIdShuffleVector:
         case IrInstSrcIdSplat:
diff --git a/src/ir_print.cpp b/src/ir_print.cpp
index 4f87ff832d..1cfe904660 100644
--- a/src/ir_print.cpp
+++ b/src/ir_print.cpp
@@ -179,8 +179,6 @@ const char* ir_inst_src_type_str(IrInstSrcId id) {
             return "SrcFloatToInt";
         case IrInstSrcIdBoolToInt:
             return "SrcBoolToInt";
-        case IrInstSrcIdIntType:
-            return "SrcIntType";
         case IrInstSrcIdVectorType:
             return "SrcVectorType";
         case IrInstSrcIdBoolNot:
@@ -1652,14 +1650,6 @@ static void ir_print_bool_to_int(IrPrintSrc *irp, IrInstSrcBoolToInt *instructio
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_type(IrPrintSrc *irp, IrInstSrcIntType *instruction) {
-    fprintf(irp->f, "@IntType(");
-    ir_print_other_inst_src(irp, instruction->is_signed);
-    fprintf(irp->f, ", ");
-    ir_print_other_inst_src(irp, instruction->bit_count);
-    fprintf(irp->f, ")");
-}
-
 static void ir_print_vector_type(IrPrintSrc *irp, IrInstSrcVectorType *instruction) {
     fprintf(irp->f, "@Vector(");
     ir_print_other_inst_src(irp, instruction->len);
@@ -2739,9 +2729,6 @@ static void ir_print_inst_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trai
         case IrInstSrcIdBoolToInt:
             ir_print_bool_to_int(irp, (IrInstSrcBoolToInt *)instruction);
             break;
-        case IrInstSrcIdIntType:
-            ir_print_int_type(irp, (IrInstSrcIntType *)instruction);
-            break;
         case IrInstSrcIdVectorType:
             ir_print_vector_type(irp, (IrInstSrcVectorType *)instruction);
             break;
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index eb1f68e163..56df006e82 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -1902,7 +1902,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
         \\    var x: i65536 = 1;
         \\}
     , &[_][]const u8{
-        "tmp.zig:2:31: error: integer value 65536 cannot be coerced to type 'u16'",
         "tmp.zig:5:12: error: primitive integer type 'i65536' exceeds maximum bit width of 65535",
     });