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https://github.com/ziglang/zig.git
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update CPU features to LLVM 14
Notable changes: `_i386`, `_i486`, and `_i686` are renamed to `i386`, `i486`, and `i686` respectively. `std.zig.fmtId` is enhanced to support formatting `i386` as `@"i386"`. Some CPU features which are actually CPU models have been properly flattened, such as `apple_a12`, `apple_a13`, `apple_a7`, `cortex_a78c`, `exynos_m4`, `neoverse_e1`, `neoverse_n1`, `neoverse_n2`, `neoverse_v1`. Some CPU features have been added and some have been removed, following LLVM's lead. CSky CPU features support is added.
This commit is contained in:
Andrew Kelley
parent
d19290e603
commit
d55d98919d
@ -444,6 +444,7 @@ pub const Target = struct {
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pub const arm = @import("target/arm.zig");
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pub const avr = @import("target/avr.zig");
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pub const bpf = @import("target/bpf.zig");
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pub const csky = @import("target/csky.zig");
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pub const hexagon = @import("target/hexagon.zig");
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pub const mips = @import("target/mips.zig");
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pub const msp430 = @import("target/msp430.zig");
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@ -1287,7 +1288,7 @@ pub const Target = struct {
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.sparc, .sparcel => &sparc.cpu.generic,
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.sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
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.s390x => &systemz.cpu.generic,
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.i386 => &x86.cpu._i386,
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.i386 => &x86.cpu.i386,
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.x86_64 => &x86.cpu.x86_64,
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.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
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.ve => &ve.cpu.generic,
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File diff suppressed because it is too large
Load Diff
@ -65,7 +65,6 @@ pub const Feature = enum {
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ldsbankcount16,
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ldsbankcount32,
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load_store_opt,
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localmemorysize0,
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localmemorysize32768,
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localmemorysize65536,
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mad_mac_f32_insts,
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@ -92,7 +91,6 @@ pub const Feature = enum {
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pk_fmac_f16_inst,
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promote_alloca,
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r128_a16,
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register_banking,
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s_memrealtime,
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s_memtime_inst,
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scalar_atomics,
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@ -374,7 +372,6 @@ pub const all_features = blk: {
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.no_data_dep_hazard,
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.no_sdst_cmpx,
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.pk_fmac_f16_inst,
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.register_banking,
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.s_memrealtime,
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.s_memtime_inst,
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.sdwa,
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@ -525,11 +522,6 @@ pub const all_features = blk: {
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.description = "Enable SI load/store optimizer pass",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.localmemorysize0)] = .{
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.llvm_name = "localmemorysize0",
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.description = "The size of local memory in bytes",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.localmemorysize32768)] = .{
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.llvm_name = "localmemorysize32768",
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.description = "The size of local memory in bytes",
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@ -660,11 +652,6 @@ pub const all_features = blk: {
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.description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.register_banking)] = .{
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.llvm_name = "register-banking",
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.description = "Has register banking",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.s_memrealtime)] = .{
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.llvm_name = "s-memrealtime",
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.description = "Has s_memrealtime instruction",
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@ -36,6 +36,7 @@ pub const Feature = enum {
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execute_only,
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expand_fp_mlx,
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exynos,
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fix_cmse_cve_2021_35465,
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fp16,
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fp16fml,
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fp64,
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@ -71,8 +72,13 @@ pub const Feature = enum {
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has_v8_5a,
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has_v8_6a,
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has_v8_7a,
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has_v8_8a,
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has_v8m,
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has_v8m_main,
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has_v9_1a,
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has_v9_2a,
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has_v9_3a,
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has_v9a,
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hwdiv,
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hwdiv_arm,
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i8mm,
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@ -95,10 +101,12 @@ pub const Feature = enum {
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neon_fpmovs,
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neonfp,
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no_branch_predictor,
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no_bti_at_return_twice,
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no_movt,
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no_neg_immediates,
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noarm,
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nonpipelined_vfp,
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pacbti,
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perfmon,
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prefer_ishst,
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prefer_vmovsr,
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@ -157,10 +165,15 @@ pub const Feature = enum {
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v8_5a,
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v8_6a,
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v8_7a,
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v8_8a,
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v8a,
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v8m,
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v8m_main,
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v8r,
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v9_1a,
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v9_2a,
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v9_3a,
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v9a,
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vfp2,
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vfp2sp,
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vfp3,
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@ -390,6 +403,11 @@ pub const all_features = blk: {
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.zcz,
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}),
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};
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result[@enumToInt(Feature.fix_cmse_cve_2021_35465)] = .{
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.llvm_name = "fix-cmse-cve-2021-35465",
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.description = "Mitigate against the cve-2021-35465 security vulnurability",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fp16)] = .{
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.llvm_name = "fp16",
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.description = "Enable half-precision floating point",
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@ -553,7 +571,6 @@ pub const all_features = blk: {
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.dependencies = featureSet(&[_]Feature{
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.has_v6t2,
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.has_v7clrex,
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.perfmon,
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}),
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};
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result[@enumToInt(Feature.has_v7clrex)] = .{
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@ -567,6 +584,7 @@ pub const all_features = blk: {
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.dependencies = featureSet(&[_]Feature{
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.acquire_release,
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.has_v7,
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.perfmon,
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}),
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};
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result[@enumToInt(Feature.has_v8_1a)] = .{
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@ -629,6 +647,13 @@ pub const all_features = blk: {
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.has_v8_6a,
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}),
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};
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result[@enumToInt(Feature.has_v8_8a)] = .{
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.llvm_name = "v8.8a",
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.description = "Support ARM v8.8a instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v8_7a,
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}),
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};
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result[@enumToInt(Feature.has_v8m)] = .{
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.llvm_name = "v8m",
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.description = "Support ARM v8M Baseline instructions",
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@ -643,6 +668,37 @@ pub const all_features = blk: {
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.has_v7,
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}),
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};
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result[@enumToInt(Feature.has_v9_1a)] = .{
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.llvm_name = "v9.1a",
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.description = "Support ARM v9.1a instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v8_6a,
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.has_v9a,
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}),
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};
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result[@enumToInt(Feature.has_v9_2a)] = .{
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.llvm_name = "v9.2a",
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.description = "Support ARM v9.2a instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v8_7a,
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.has_v9_1a,
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}),
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};
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result[@enumToInt(Feature.has_v9_3a)] = .{
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.llvm_name = "v9.3a",
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.description = "Support ARM v9.3a instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v8_8a,
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.has_v9_2a,
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}),
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};
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result[@enumToInt(Feature.has_v9a)] = .{
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.llvm_name = "v9a",
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.description = "Support ARM v9a instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v8_5a,
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}),
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};
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result[@enumToInt(Feature.hwdiv)] = .{
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.llvm_name = "hwdiv",
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.description = "Enable divide instructions in Thumb",
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@ -769,6 +825,11 @@ pub const all_features = blk: {
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.description = "Has no branch predictor",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.no_bti_at_return_twice)] = .{
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.llvm_name = "no-bti-at-return-twice",
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.description = "Don't place a BTI instruction after a return-twice",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.no_movt)] = .{
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.llvm_name = "no-movt",
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.description = "Don't use movt/movw pairs for 32-bit imms",
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@ -789,6 +850,11 @@ pub const all_features = blk: {
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.description = "VFP instructions are not pipelined",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.pacbti)] = .{
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.llvm_name = "pacbti",
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.description = "Enable Pointer Authentication and Branch Target Identification",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.perfmon)] = .{
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.llvm_name = "perfmon",
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.description = "Enable support for Performance Monitor extensions",
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@ -1066,6 +1132,7 @@ pub const all_features = blk: {
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.dsp,
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.has_v7,
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.neon,
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.perfmon,
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}),
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};
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result[@enumToInt(Feature.v7em)] = .{
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@ -1108,6 +1175,7 @@ pub const all_features = blk: {
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.dsp,
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.has_v7,
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.hwdiv,
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.perfmon,
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.rclass,
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}),
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};
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@ -1128,6 +1196,7 @@ pub const all_features = blk: {
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.has_v7,
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.mp,
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.neon,
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.perfmon,
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.trustzone,
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.virtualization,
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}),
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@ -1266,6 +1335,23 @@ pub const all_features = blk: {
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.v8_8a)] = .{
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.llvm_name = "armv8.8-a",
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.description = "ARMv88a architecture",
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.dependencies = featureSet(&[_]Feature{
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.aclass,
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.crc,
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.crypto,
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.db,
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.dsp,
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.fp_armv8,
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.has_v8_8a,
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.mp,
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.ras,
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.trustzone,
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.v8a)] = .{
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.llvm_name = "armv8-a",
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.description = "ARMv8a architecture",
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@ -1328,6 +1414,71 @@ pub const all_features = blk: {
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.v9_1a)] = .{
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.llvm_name = "armv9.1-a",
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.description = "ARMv91a architecture",
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.dependencies = featureSet(&[_]Feature{
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.aclass,
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.crc,
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.db,
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.dsp,
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.fp_armv8,
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.has_v9_1a,
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.mp,
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.ras,
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.trustzone,
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.v9_2a)] = .{
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.llvm_name = "armv9.2-a",
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.description = "ARMv92a architecture",
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.dependencies = featureSet(&[_]Feature{
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.aclass,
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.crc,
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.db,
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.dsp,
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.fp_armv8,
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.has_v9_2a,
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.mp,
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.ras,
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.trustzone,
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.v9_3a)] = .{
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.llvm_name = "armv9.3-a",
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.description = "ARMv93a architecture",
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.dependencies = featureSet(&[_]Feature{
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.aclass,
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.crc,
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.crypto,
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.db,
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.dsp,
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.fp_armv8,
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.has_v9_3a,
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.mp,
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.ras,
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.trustzone,
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.v9a)] = .{
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.llvm_name = "armv9-a",
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.description = "ARMv9a architecture",
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.dependencies = featureSet(&[_]Feature{
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.aclass,
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.crc,
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.db,
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.dsp,
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.fp_armv8,
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.has_v9a,
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.mp,
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.ras,
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.trustzone,
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.virtualization,
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}),
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};
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result[@enumToInt(Feature.vfp2)] = .{
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.llvm_name = "vfp2",
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.description = "Enable VFP2 instructions",
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@ -1781,6 +1932,16 @@ pub const cpu = struct {
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.vmlx_hazards,
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}),
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};
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pub const cortex_a710 = CpuModel{
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.name = "cortex_a710",
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.llvm_name = "cortex-a710",
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.features = featureSet(&[_]Feature{
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.bf16,
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.fp16fml,
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.i8mm,
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.v9a,
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}),
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};
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pub const cortex_a72 = CpuModel{
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.name = "cortex_a72",
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.llvm_name = "cortex-a72",
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@ -1933,6 +2094,7 @@ pub const cpu = struct {
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.llvm_name = "cortex-m33",
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.features = featureSet(&[_]Feature{
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.dsp,
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.fix_cmse_cve_2021_35465,
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.fp_armv8d16sp,
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.loop_align,
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.no_branch_predictor,
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@ -1947,6 +2109,7 @@ pub const cpu = struct {
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.llvm_name = "cortex-m35p",
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.features = featureSet(&[_]Feature{
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.dsp,
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.fix_cmse_cve_2021_35465,
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.fp_armv8d16sp,
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.loop_align,
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.no_branch_predictor,
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@ -1973,6 +2136,7 @@ pub const cpu = struct {
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.name = "cortex_m55",
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.llvm_name = "cortex-m55",
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.features = featureSet(&[_]Feature{
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.fix_cmse_cve_2021_35465,
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.fp_armv8d16,
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.loop_align,
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.mve_fp,
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@ -2079,6 +2243,15 @@ pub const cpu = struct {
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.v8_2a,
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}),
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};
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pub const cortex_x1c = CpuModel{
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.name = "cortex_x1c",
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.llvm_name = "cortex-x1c",
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.features = featureSet(&[_]Feature{
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.dotprod,
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.fullfp16,
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.v8_2a,
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}),
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};
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pub const cyclone = CpuModel{
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.name = "cyclone",
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.llvm_name = "cyclone",
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@ -583,6 +583,20 @@ pub const cpu = struct {
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.avr35,
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}),
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};
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pub const ata5702m322 = CpuModel{
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.name = "ata5702m322",
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.llvm_name = "ata5702m322",
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.features = featureSet(&[_]Feature{
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.avr5,
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}),
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};
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pub const ata5782 = CpuModel{
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.name = "ata5782",
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.llvm_name = "ata5782",
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.features = featureSet(&[_]Feature{
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.avr5,
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}),
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};
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pub const ata5790 = CpuModel{
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.name = "ata5790",
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.llvm_name = "ata5790",
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@ -590,6 +604,20 @@ pub const cpu = struct {
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.avr5,
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}),
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};
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pub const ata5790n = CpuModel{
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.name = "ata5790n",
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.llvm_name = "ata5790n",
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.features = featureSet(&[_]Feature{
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.avr5,
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}),
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};
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pub const ata5791 = CpuModel{
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.name = "ata5791",
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.llvm_name = "ata5791",
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.features = featureSet(&[_]Feature{
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.avr5,
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}),
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};
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pub const ata5795 = CpuModel{
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.name = "ata5795",
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.llvm_name = "ata5795",
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@ -597,6 +625,13 @@ pub const cpu = struct {
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.avr5,
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}),
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};
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pub const ata5831 = CpuModel{
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.name = "ata5831",
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.llvm_name = "ata5831",
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.features = featureSet(&[_]Feature{
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.avr5,
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}),
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};
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pub const ata6285 = CpuModel{
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.name = "ata6285",
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.llvm_name = "ata6285",
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||||
@ -618,6 +653,55 @@ pub const cpu = struct {
|
||||
.avr4,
|
||||
}),
|
||||
};
|
||||
pub const ata6612c = CpuModel{
|
||||
.name = "ata6612c",
|
||||
.llvm_name = "ata6612c",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr4,
|
||||
}),
|
||||
};
|
||||
pub const ata6613c = CpuModel{
|
||||
.name = "ata6613c",
|
||||
.llvm_name = "ata6613c",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr5,
|
||||
}),
|
||||
};
|
||||
pub const ata6614q = CpuModel{
|
||||
.name = "ata6614q",
|
||||
.llvm_name = "ata6614q",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr5,
|
||||
}),
|
||||
};
|
||||
pub const ata6617c = CpuModel{
|
||||
.name = "ata6617c",
|
||||
.llvm_name = "ata6617c",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr35,
|
||||
}),
|
||||
};
|
||||
pub const ata664251 = CpuModel{
|
||||
.name = "ata664251",
|
||||
.llvm_name = "ata664251",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr35,
|
||||
}),
|
||||
};
|
||||
pub const ata8210 = CpuModel{
|
||||
.name = "ata8210",
|
||||
.llvm_name = "ata8210",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr5,
|
||||
}),
|
||||
};
|
||||
pub const ata8510 = CpuModel{
|
||||
.name = "ata8510",
|
||||
.llvm_name = "ata8510",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr5,
|
||||
}),
|
||||
};
|
||||
pub const atmega103 = CpuModel{
|
||||
.name = "atmega103",
|
||||
.llvm_name = "atmega103",
|
||||
@ -1347,6 +1431,13 @@ pub const cpu = struct {
|
||||
.avr5,
|
||||
}),
|
||||
};
|
||||
pub const atmega64hve2 = CpuModel{
|
||||
.name = "atmega64hve2",
|
||||
.llvm_name = "atmega64hve2",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.avr5,
|
||||
}),
|
||||
};
|
||||
pub const atmega64m1 = CpuModel{
|
||||
.name = "atmega64m1",
|
||||
.llvm_name = "atmega64m1",
|
||||
@ -1510,6 +1601,48 @@ pub const cpu = struct {
|
||||
.avr1,
|
||||
}),
|
||||
};
|
||||
pub const attiny1604 = CpuModel{
|
||||
.name = "attiny1604",
|
||||
.llvm_name = "attiny1604",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny1606 = CpuModel{
|
||||
.name = "attiny1606",
|
||||
.llvm_name = "attiny1606",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny1607 = CpuModel{
|
||||
.name = "attiny1607",
|
||||
.llvm_name = "attiny1607",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny1614 = CpuModel{
|
||||
.name = "attiny1614",
|
||||
.llvm_name = "attiny1614",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny1616 = CpuModel{
|
||||
.name = "attiny1616",
|
||||
.llvm_name = "attiny1616",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny1617 = CpuModel{
|
||||
.name = "attiny1617",
|
||||
.llvm_name = "attiny1617",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny1634 = CpuModel{
|
||||
.name = "attiny1634",
|
||||
.llvm_name = "attiny1634",
|
||||
@ -1531,6 +1664,34 @@ pub const cpu = struct {
|
||||
.avrtiny,
|
||||
}),
|
||||
};
|
||||
pub const attiny202 = CpuModel{
|
||||
.name = "attiny202",
|
||||
.llvm_name = "attiny202",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny204 = CpuModel{
|
||||
.name = "attiny204",
|
||||
.llvm_name = "attiny204",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny212 = CpuModel{
|
||||
.name = "attiny212",
|
||||
.llvm_name = "attiny212",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny214 = CpuModel{
|
||||
.name = "attiny214",
|
||||
.llvm_name = "attiny214",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny22 = CpuModel{
|
||||
.name = "attiny22",
|
||||
.llvm_name = "attiny22",
|
||||
@ -1602,6 +1763,20 @@ pub const cpu = struct {
|
||||
.avr1,
|
||||
}),
|
||||
};
|
||||
pub const attiny3216 = CpuModel{
|
||||
.name = "attiny3216",
|
||||
.llvm_name = "attiny3216",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny3217 = CpuModel{
|
||||
.name = "attiny3217",
|
||||
.llvm_name = "attiny3217",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny4 = CpuModel{
|
||||
.name = "attiny4",
|
||||
.llvm_name = "attiny4",
|
||||
@ -1616,6 +1791,55 @@ pub const cpu = struct {
|
||||
.avrtiny,
|
||||
}),
|
||||
};
|
||||
pub const attiny402 = CpuModel{
|
||||
.name = "attiny402",
|
||||
.llvm_name = "attiny402",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny404 = CpuModel{
|
||||
.name = "attiny404",
|
||||
.llvm_name = "attiny404",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny406 = CpuModel{
|
||||
.name = "attiny406",
|
||||
.llvm_name = "attiny406",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny412 = CpuModel{
|
||||
.name = "attiny412",
|
||||
.llvm_name = "attiny412",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny414 = CpuModel{
|
||||
.name = "attiny414",
|
||||
.llvm_name = "attiny414",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny416 = CpuModel{
|
||||
.name = "attiny416",
|
||||
.llvm_name = "attiny416",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny417 = CpuModel{
|
||||
.name = "attiny417",
|
||||
.llvm_name = "attiny417",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny4313 = CpuModel{
|
||||
.name = "attiny4313",
|
||||
.llvm_name = "attiny4313",
|
||||
@ -1686,6 +1910,48 @@ pub const cpu = struct {
|
||||
.avrtiny,
|
||||
}),
|
||||
};
|
||||
pub const attiny804 = CpuModel{
|
||||
.name = "attiny804",
|
||||
.llvm_name = "attiny804",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny806 = CpuModel{
|
||||
.name = "attiny806",
|
||||
.llvm_name = "attiny806",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny807 = CpuModel{
|
||||
.name = "attiny807",
|
||||
.llvm_name = "attiny807",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny814 = CpuModel{
|
||||
.name = "attiny814",
|
||||
.llvm_name = "attiny814",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny816 = CpuModel{
|
||||
.name = "attiny816",
|
||||
.llvm_name = "attiny816",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny817 = CpuModel{
|
||||
.name = "attiny817",
|
||||
.llvm_name = "attiny817",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const attiny828 = CpuModel{
|
||||
.name = "attiny828",
|
||||
.llvm_name = "attiny828",
|
||||
@ -1945,6 +2211,13 @@ pub const cpu = struct {
|
||||
.xmegau,
|
||||
}),
|
||||
};
|
||||
pub const atxmega32c3 = CpuModel{
|
||||
.name = "atxmega32c3",
|
||||
.llvm_name = "atxmega32c3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmegau,
|
||||
}),
|
||||
};
|
||||
pub const atxmega32c4 = CpuModel{
|
||||
.name = "atxmega32c4",
|
||||
.llvm_name = "atxmega32c4",
|
||||
@ -1952,6 +2225,13 @@ pub const cpu = struct {
|
||||
.xmegau,
|
||||
}),
|
||||
};
|
||||
pub const atxmega32d3 = CpuModel{
|
||||
.name = "atxmega32d3",
|
||||
.llvm_name = "atxmega32d3",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.xmega,
|
||||
}),
|
||||
};
|
||||
pub const atxmega32d4 = CpuModel{
|
||||
.name = "atxmega32d4",
|
||||
.llvm_name = "atxmega32d4",
|
||||
|
||||
163
lib/std/target/csky.zig
Normal file
163
lib/std/target/csky.zig
Normal file
@ -0,0 +1,163 @@
|
||||
//! This file is auto-generated by tools/update_cpu_features.zig.
|
||||
|
||||
const std = @import("../std.zig");
|
||||
const CpuFeature = std.Target.Cpu.Feature;
|
||||
const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
@"10e60",
|
||||
@"2e3",
|
||||
@"3e3r1",
|
||||
@"3e3r3",
|
||||
@"3e7",
|
||||
@"7e10",
|
||||
btst16,
|
||||
doloop,
|
||||
e1,
|
||||
e2,
|
||||
elrw,
|
||||
fpuv2_df,
|
||||
fpuv2_sf,
|
||||
fpuv3_df,
|
||||
fpuv3_sf,
|
||||
hard_float,
|
||||
hard_float_abi,
|
||||
java,
|
||||
mp1e2,
|
||||
};
|
||||
|
||||
pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
|
||||
pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
|
||||
pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
|
||||
pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
|
||||
|
||||
pub const all_features = blk: {
|
||||
const len = @typeInfo(Feature).Enum.fields.len;
|
||||
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
var result: [len]CpuFeature = undefined;
|
||||
result[@enumToInt(Feature.@"10e60")] = .{
|
||||
.llvm_name = "10e60",
|
||||
.description = "Support CSKY 10e60 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.@"7e10",
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.@"2e3")] = .{
|
||||
.llvm_name = "2e3",
|
||||
.description = "Support CSKY 2e3 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.e2,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.@"3e3r1")] = .{
|
||||
.llvm_name = "3e3r1",
|
||||
.description = "Support CSKY 3e3r1 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.@"3e3r3")] = .{
|
||||
.llvm_name = "3e3r3",
|
||||
.description = "Support CSKY 3e3r3 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.doloop,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.@"3e7")] = .{
|
||||
.llvm_name = "3e7",
|
||||
.description = "Support CSKY 3e7 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.@"2e3",
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.@"7e10")] = .{
|
||||
.llvm_name = "7e10",
|
||||
.description = "Support CSKY 7e10 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.@"3e7",
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.btst16)] = .{
|
||||
.llvm_name = "btst16",
|
||||
.description = "Use the 16-bit btsti instruction",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.doloop)] = .{
|
||||
.llvm_name = "doloop",
|
||||
.description = "Enable doloop instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.e1)] = .{
|
||||
.llvm_name = "e1",
|
||||
.description = "Support CSKY e1 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.elrw,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.e2)] = .{
|
||||
.llvm_name = "e2",
|
||||
.description = "Support CSKY e2 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.e1,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.elrw)] = .{
|
||||
.llvm_name = "elrw",
|
||||
.description = "Use the extend LRW instruction",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.fpuv2_df)] = .{
|
||||
.llvm_name = "fpuv2_df",
|
||||
.description = "Enable FPUv2 double float instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.fpuv2_sf)] = .{
|
||||
.llvm_name = "fpuv2_sf",
|
||||
.description = "Enable FPUv2 single float instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.fpuv3_df)] = .{
|
||||
.llvm_name = "fpuv3_df",
|
||||
.description = "Enable FPUv3 double float instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.fpuv3_sf)] = .{
|
||||
.llvm_name = "fpuv3_sf",
|
||||
.description = "Enable FPUv3 single float instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.hard_float)] = .{
|
||||
.llvm_name = "hard-float",
|
||||
.description = "Use hard floating point features",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.hard_float_abi)] = .{
|
||||
.llvm_name = "hard-float-abi",
|
||||
.description = "Use hard floating point ABI to pass args",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.java)] = .{
|
||||
.llvm_name = "java",
|
||||
.description = "Enable java instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.mp1e2)] = .{
|
||||
.llvm_name = "mp1e2",
|
||||
.description = "Support CSKY mp1e2 instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.@"3e7",
|
||||
}),
|
||||
};
|
||||
const ti = @typeInfo(Feature);
|
||||
for (result) |*elem, i| {
|
||||
elem.index = i;
|
||||
elem.name = ti.Enum.fields[i].name;
|
||||
}
|
||||
break :blk result;
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const generic = CpuModel{
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{}),
|
||||
};
|
||||
};
|
||||
@ -6,17 +6,21 @@ const CpuModel = std.Target.Cpu.Model;
|
||||
|
||||
pub const Feature = enum {
|
||||
audio,
|
||||
cabac,
|
||||
compound,
|
||||
duplex,
|
||||
hvx,
|
||||
hvx_ieee_fp,
|
||||
hvx_length128b,
|
||||
hvx_length64b,
|
||||
hvx_qfloat,
|
||||
hvxv60,
|
||||
hvxv62,
|
||||
hvxv65,
|
||||
hvxv66,
|
||||
hvxv67,
|
||||
hvxv68,
|
||||
hvxv69,
|
||||
long_calls,
|
||||
mem_noshuf,
|
||||
memops,
|
||||
@ -37,6 +41,7 @@ pub const Feature = enum {
|
||||
v66,
|
||||
v67,
|
||||
v68,
|
||||
v69,
|
||||
zreg,
|
||||
};
|
||||
|
||||
@ -54,6 +59,11 @@ pub const all_features = blk: {
|
||||
.description = "Hexagon Audio extension instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.cabac)] = .{
|
||||
.llvm_name = "cabac",
|
||||
.description = "Emit the CABAC instruction",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.compound)] = .{
|
||||
.llvm_name = "compound",
|
||||
.description = "Use compound instructions",
|
||||
@ -69,6 +79,11 @@ pub const all_features = blk: {
|
||||
.description = "Hexagon HVX instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.hvx_ieee_fp)] = .{
|
||||
.llvm_name = "hvx-ieee-fp",
|
||||
.description = "Hexagon HVX IEEE floating point instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.hvx_length128b)] = .{
|
||||
.llvm_name = "hvx-length128b",
|
||||
.description = "Hexagon HVX 128B instructions",
|
||||
@ -83,6 +98,11 @@ pub const all_features = blk: {
|
||||
.hvx,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.hvx_qfloat)] = .{
|
||||
.llvm_name = "hvx-qfloat",
|
||||
.description = "Hexagon HVX QFloating point instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.hvxv60)] = .{
|
||||
.llvm_name = "hvxv60",
|
||||
.description = "Hexagon HVX instructions",
|
||||
@ -126,6 +146,13 @@ pub const all_features = blk: {
|
||||
.hvxv67,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.hvxv69)] = .{
|
||||
.llvm_name = "hvxv69",
|
||||
.description = "Hexagon HVX instructions",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.hvxv68,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.long_calls)] = .{
|
||||
.llvm_name = "long-calls",
|
||||
.description = "Use constant-extended calls",
|
||||
@ -230,6 +257,11 @@ pub const all_features = blk: {
|
||||
.description = "Enable Hexagon V68 architecture",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.v69)] = .{
|
||||
.llvm_name = "v69",
|
||||
.description = "Enable Hexagon V69 architecture",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zreg)] = .{
|
||||
.llvm_name = "zreg",
|
||||
.description = "Hexagon ZReg extension instructions",
|
||||
@ -248,6 +280,7 @@ pub const cpu = struct {
|
||||
.name = "generic",
|
||||
.llvm_name = "generic",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.memops,
|
||||
@ -264,6 +297,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv5",
|
||||
.llvm_name = "hexagonv5",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.memops,
|
||||
@ -278,6 +312,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv55",
|
||||
.llvm_name = "hexagonv55",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.memops,
|
||||
@ -293,6 +328,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv60",
|
||||
.llvm_name = "hexagonv60",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.memops,
|
||||
@ -309,6 +345,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv62",
|
||||
.llvm_name = "hexagonv62",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.memops,
|
||||
@ -326,6 +363,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv65",
|
||||
.llvm_name = "hexagonv65",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.mem_noshuf,
|
||||
@ -344,6 +382,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv66",
|
||||
.llvm_name = "hexagonv66",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.mem_noshuf,
|
||||
@ -363,6 +402,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv67",
|
||||
.llvm_name = "hexagonv67",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.mem_noshuf,
|
||||
@ -403,6 +443,7 @@ pub const cpu = struct {
|
||||
.name = "hexagonv68",
|
||||
.llvm_name = "hexagonv68",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.mem_noshuf,
|
||||
@ -420,4 +461,27 @@ pub const cpu = struct {
|
||||
.v68,
|
||||
}),
|
||||
};
|
||||
pub const hexagonv69 = CpuModel{
|
||||
.name = "hexagonv69",
|
||||
.llvm_name = "hexagonv69",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cabac,
|
||||
.compound,
|
||||
.duplex,
|
||||
.mem_noshuf,
|
||||
.memops,
|
||||
.nvj,
|
||||
.nvs,
|
||||
.small_data,
|
||||
.v5,
|
||||
.v55,
|
||||
.v60,
|
||||
.v62,
|
||||
.v65,
|
||||
.v66,
|
||||
.v67,
|
||||
.v68,
|
||||
.v69,
|
||||
}),
|
||||
};
|
||||
};
|
||||
|
||||
@ -19,6 +19,9 @@ pub const Feature = enum {
|
||||
ptx70,
|
||||
ptx71,
|
||||
ptx72,
|
||||
ptx73,
|
||||
ptx74,
|
||||
ptx75,
|
||||
sm_20,
|
||||
sm_21,
|
||||
sm_30,
|
||||
@ -117,6 +120,21 @@ pub const all_features = blk: {
|
||||
.description = "Use PTX version 7.2",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.ptx73)] = .{
|
||||
.llvm_name = "ptx73",
|
||||
.description = "Use PTX version 7.3",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.ptx74)] = .{
|
||||
.llvm_name = "ptx74",
|
||||
.description = "Use PTX version 7.4",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.ptx75)] = .{
|
||||
.llvm_name = "ptx75",
|
||||
.description = "Use PTX version 7.5",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.sm_20)] = .{
|
||||
.llvm_name = "sm_20",
|
||||
.description = "Target SM 2.0",
|
||||
|
||||
@ -29,14 +29,24 @@ pub const Feature = enum {
|
||||
frsqrte,
|
||||
frsqrtes,
|
||||
fsqrt,
|
||||
fuse_add_logical,
|
||||
fuse_addi_load,
|
||||
fuse_addis_load,
|
||||
fuse_arith_add,
|
||||
fuse_back2back,
|
||||
fuse_cmp,
|
||||
fuse_logical,
|
||||
fuse_logical_add,
|
||||
fuse_sha3,
|
||||
fuse_store,
|
||||
fuse_wideimm,
|
||||
fuse_zeromove,
|
||||
fusion,
|
||||
hard_float,
|
||||
htm,
|
||||
icbt,
|
||||
invariant_function_descriptors,
|
||||
isa_v206_instructions,
|
||||
isa_v207_instructions,
|
||||
isa_v30_instructions,
|
||||
isa_v31_instructions,
|
||||
@ -235,6 +245,13 @@ pub const all_features = blk: {
|
||||
.fpu,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_add_logical)] = .{
|
||||
.llvm_name = "fuse-add-logical",
|
||||
.description = "Target supports Add with Logical Operations fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_addi_load)] = .{
|
||||
.llvm_name = "fuse-addi-load",
|
||||
.description = "Power8 Addi-Load fusion",
|
||||
@ -249,6 +266,48 @@ pub const all_features = blk: {
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_arith_add)] = .{
|
||||
.llvm_name = "fuse-arith-add",
|
||||
.description = "Target supports Arithmetic Operations with Add fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_back2back)] = .{
|
||||
.llvm_name = "fuse-back2back",
|
||||
.description = "Target supports general back to back fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_cmp)] = .{
|
||||
.llvm_name = "fuse-cmp",
|
||||
.description = "Target supports Comparison Operations fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_logical)] = .{
|
||||
.llvm_name = "fuse-logical",
|
||||
.description = "Target supports Logical Operations fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_logical_add)] = .{
|
||||
.llvm_name = "fuse-logical-add",
|
||||
.description = "Target supports Logical with Add Operations fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_sha3)] = .{
|
||||
.llvm_name = "fuse-sha3",
|
||||
.description = "Target supports SHA3 assist fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_store)] = .{
|
||||
.llvm_name = "fuse-store",
|
||||
.description = "Target supports store clustering",
|
||||
@ -256,6 +315,20 @@ pub const all_features = blk: {
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_wideimm)] = .{
|
||||
.llvm_name = "fuse-wideimm",
|
||||
.description = "Target supports Wide-Immediate fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fuse_zeromove)] = .{
|
||||
.llvm_name = "fuse-zeromove",
|
||||
.description = "Target supports move to SPR with branch fusion",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.fusion,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.fusion)] = .{
|
||||
.llvm_name = "fusion",
|
||||
.description = "Target supports instruction fusion",
|
||||
@ -281,6 +354,11 @@ pub const all_features = blk: {
|
||||
.description = "Assume function descriptors are invariant",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.isa_v206_instructions)] = .{
|
||||
.llvm_name = "isa-v206-instructions",
|
||||
.description = "Enable instructions in ISA 2.06.",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.isa_v207_instructions)] = .{
|
||||
.llvm_name = "isa-v207-instructions",
|
||||
.description = "Enable instructions in ISA 2.07.",
|
||||
@ -707,9 +785,15 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
.frsqrtes,
|
||||
.fsqrt,
|
||||
.fuse_add_logical,
|
||||
.fuse_arith_add,
|
||||
.fuse_logical,
|
||||
.fuse_logical_add,
|
||||
.fuse_sha3,
|
||||
.fuse_store,
|
||||
.htm,
|
||||
.icbt,
|
||||
.isa_v206_instructions,
|
||||
.isel,
|
||||
.ldbrx,
|
||||
.lfiwax,
|
||||
@ -817,6 +901,7 @@ pub const cpu = struct {
|
||||
.fuse_addis_load,
|
||||
.htm,
|
||||
.icbt,
|
||||
.isa_v206_instructions,
|
||||
.isa_v207_instructions,
|
||||
.isel,
|
||||
.ldbrx,
|
||||
@ -851,9 +936,15 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
.frsqrtes,
|
||||
.fsqrt,
|
||||
.fuse_add_logical,
|
||||
.fuse_arith_add,
|
||||
.fuse_logical,
|
||||
.fuse_logical_add,
|
||||
.fuse_sha3,
|
||||
.fuse_store,
|
||||
.htm,
|
||||
.icbt,
|
||||
.isa_v206_instructions,
|
||||
.isel,
|
||||
.ldbrx,
|
||||
.lfiwax,
|
||||
@ -985,6 +1076,7 @@ pub const cpu = struct {
|
||||
.frsqrte,
|
||||
.frsqrtes,
|
||||
.fsqrt,
|
||||
.isa_v206_instructions,
|
||||
.isel,
|
||||
.ldbrx,
|
||||
.lfiwax,
|
||||
@ -1019,6 +1111,7 @@ pub const cpu = struct {
|
||||
.fuse_addis_load,
|
||||
.htm,
|
||||
.icbt,
|
||||
.isa_v206_instructions,
|
||||
.isa_v207_instructions,
|
||||
.isel,
|
||||
.ldbrx,
|
||||
@ -1055,6 +1148,7 @@ pub const cpu = struct {
|
||||
.fsqrt,
|
||||
.htm,
|
||||
.icbt,
|
||||
.isa_v206_instructions,
|
||||
.isel,
|
||||
.ldbrx,
|
||||
.lfiwax,
|
||||
|
||||
@ -10,22 +10,12 @@ pub const Feature = enum {
|
||||
c,
|
||||
d,
|
||||
e,
|
||||
experimental_b,
|
||||
experimental_v,
|
||||
experimental_zba,
|
||||
experimental_zbb,
|
||||
experimental_zbc,
|
||||
experimental_zbe,
|
||||
experimental_zbf,
|
||||
experimental_zbm,
|
||||
experimental_zbp,
|
||||
experimental_zbproposedc,
|
||||
experimental_zbr,
|
||||
experimental_zbs,
|
||||
experimental_zbt,
|
||||
experimental_zfh,
|
||||
experimental_zvamo,
|
||||
experimental_zvlsseg,
|
||||
f,
|
||||
m,
|
||||
no_rvc_hints,
|
||||
@ -62,6 +52,46 @@ pub const Feature = enum {
|
||||
reserve_x8,
|
||||
reserve_x9,
|
||||
save_restore,
|
||||
v,
|
||||
zba,
|
||||
zbb,
|
||||
zbc,
|
||||
zbkb,
|
||||
zbkc,
|
||||
zbkx,
|
||||
zbs,
|
||||
zdinx,
|
||||
zfh,
|
||||
zfhmin,
|
||||
zfinx,
|
||||
zhinx,
|
||||
zhinxmin,
|
||||
zk,
|
||||
zkn,
|
||||
zknd,
|
||||
zkne,
|
||||
zknh,
|
||||
zkr,
|
||||
zks,
|
||||
zksed,
|
||||
zksh,
|
||||
zkt,
|
||||
zve32f,
|
||||
zve32x,
|
||||
zve64d,
|
||||
zve64f,
|
||||
zve64x,
|
||||
zvl1024b,
|
||||
zvl128b,
|
||||
zvl16384b,
|
||||
zvl2048b,
|
||||
zvl256b,
|
||||
zvl32768b,
|
||||
zvl32b,
|
||||
zvl4096b,
|
||||
zvl512b,
|
||||
zvl64b,
|
||||
zvl8192b,
|
||||
};
|
||||
|
||||
pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
|
||||
@ -100,103 +130,36 @@ pub const all_features = blk: {
|
||||
.description = "Implements RV32E (provides 16 rather than 32 GPRs)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_b)] = .{
|
||||
.llvm_name = "experimental-b",
|
||||
.description = "'B' (Bit Manipulation Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.experimental_zba,
|
||||
.experimental_zbb,
|
||||
.experimental_zbc,
|
||||
.experimental_zbe,
|
||||
.experimental_zbf,
|
||||
.experimental_zbm,
|
||||
.experimental_zbp,
|
||||
.experimental_zbr,
|
||||
.experimental_zbs,
|
||||
.experimental_zbt,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_v)] = .{
|
||||
.llvm_name = "experimental-v",
|
||||
.description = "'V' (Vector Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zba)] = .{
|
||||
.llvm_name = "experimental-zba",
|
||||
.description = "'Zba' (Address calculation 'B' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbb)] = .{
|
||||
.llvm_name = "experimental-zbb",
|
||||
.description = "'Zbb' (Base 'B' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbc)] = .{
|
||||
.llvm_name = "experimental-zbc",
|
||||
.description = "'Zbc' (Carry-Less 'B' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbe)] = .{
|
||||
.llvm_name = "experimental-zbe",
|
||||
.description = "'Zbe' (Extract-Deposit 'B' Instructions)",
|
||||
.description = "'Zbe' (Extract-Deposit 'Zb' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbf)] = .{
|
||||
.llvm_name = "experimental-zbf",
|
||||
.description = "'Zbf' (Bit-Field 'B' Instructions)",
|
||||
.description = "'Zbf' (Bit-Field 'Zb' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbm)] = .{
|
||||
.llvm_name = "experimental-zbm",
|
||||
.description = "'Zbm' (Matrix 'B' Instructions)",
|
||||
.description = "'Zbm' (Matrix 'Zb' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbp)] = .{
|
||||
.llvm_name = "experimental-zbp",
|
||||
.description = "'Zbp' (Permutation 'B' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbproposedc)] = .{
|
||||
.llvm_name = "experimental-zbproposedc",
|
||||
.description = "'Zbproposedc' (Proposed Compressed 'B' Instructions)",
|
||||
.description = "'Zbp' (Permutation 'Zb' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbr)] = .{
|
||||
.llvm_name = "experimental-zbr",
|
||||
.description = "'Zbr' (Polynomial Reduction 'B' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbs)] = .{
|
||||
.llvm_name = "experimental-zbs",
|
||||
.description = "'Zbs' (Single-Bit 'B' Instructions)",
|
||||
.description = "'Zbr' (Polynomial Reduction 'Zb' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zbt)] = .{
|
||||
.llvm_name = "experimental-zbt",
|
||||
.description = "'Zbt' (Ternary 'B' Instructions)",
|
||||
.description = "'Zbt' (Ternary 'Zb' Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zfh)] = .{
|
||||
.llvm_name = "experimental-zfh",
|
||||
.description = "'Zfh' (Half-Precision Floating-Point)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.f,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zvamo)] = .{
|
||||
.llvm_name = "experimental-zvamo",
|
||||
.description = "'Zvamo' (Vector AMO Operations)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.experimental_v,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.experimental_zvlsseg)] = .{
|
||||
.llvm_name = "experimental-zvlsseg",
|
||||
.description = "'Zvlsseg' (Vector segment load/store instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.experimental_v,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.f)] = .{
|
||||
.llvm_name = "f",
|
||||
.description = "'F' (Single-Precision Floating-Point)",
|
||||
@ -377,6 +340,268 @@ pub const all_features = blk: {
|
||||
.description = "Enable save/restore.",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.v)] = .{
|
||||
.llvm_name = "v",
|
||||
.description = "'V' (Vector Extension for Application Processors)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.d,
|
||||
.zvl128b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zba)] = .{
|
||||
.llvm_name = "zba",
|
||||
.description = "'Zba' (Address Generation Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zbb)] = .{
|
||||
.llvm_name = "zbb",
|
||||
.description = "'Zbb' (Basic Bit-Manipulation)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zbc)] = .{
|
||||
.llvm_name = "zbc",
|
||||
.description = "'Zbc' (Carry-Less Multiplication)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zbkb)] = .{
|
||||
.llvm_name = "zbkb",
|
||||
.description = "'Zbkb' (Bitmanip instructions for Cryptography)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zbkc)] = .{
|
||||
.llvm_name = "zbkc",
|
||||
.description = "'Zbkc' (Carry-less multiply instructions for Cryptography)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zbkx)] = .{
|
||||
.llvm_name = "zbkx",
|
||||
.description = "'Zbkx' (Crossbar permutation instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zbs)] = .{
|
||||
.llvm_name = "zbs",
|
||||
.description = "'Zbs' (Single-Bit Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zdinx)] = .{
|
||||
.llvm_name = "zdinx",
|
||||
.description = "'Zdinx' (Double in Integer)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zfinx,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zfh)] = .{
|
||||
.llvm_name = "zfh",
|
||||
.description = "'Zfh' (Half-Precision Floating-Point)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.f,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zfhmin)] = .{
|
||||
.llvm_name = "zfhmin",
|
||||
.description = "'Zfhmin' (Half-Precision Floating-Point Minimal)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.f,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zfinx)] = .{
|
||||
.llvm_name = "zfinx",
|
||||
.description = "'Zfinx' (Float in Integer)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zhinx)] = .{
|
||||
.llvm_name = "zhinx",
|
||||
.description = "'Zhinx' (Half Float in Integer)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zfinx,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zhinxmin)] = .{
|
||||
.llvm_name = "zhinxmin",
|
||||
.description = "'Zhinxmin' (Half Float in Integer Minimal)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zfinx,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zk)] = .{
|
||||
.llvm_name = "zk",
|
||||
.description = "'Zk' (Standard scalar cryptography extension)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zkn,
|
||||
.zkr,
|
||||
.zkt,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zkn)] = .{
|
||||
.llvm_name = "zkn",
|
||||
.description = "'Zkn' (NIST Algorithm Suite)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zbkb,
|
||||
.zbkc,
|
||||
.zbkx,
|
||||
.zknd,
|
||||
.zkne,
|
||||
.zknh,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zknd)] = .{
|
||||
.llvm_name = "zknd",
|
||||
.description = "'Zknd' (NIST Suite: AES Decryption)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zkne)] = .{
|
||||
.llvm_name = "zkne",
|
||||
.description = "'Zkne' (NIST Suite: AES Encryption)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zknh)] = .{
|
||||
.llvm_name = "zknh",
|
||||
.description = "'Zknh' (NIST Suite: Hash Function Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zkr)] = .{
|
||||
.llvm_name = "zkr",
|
||||
.description = "'Zkr' (Entropy Source Extension)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zks)] = .{
|
||||
.llvm_name = "zks",
|
||||
.description = "'Zks' (ShangMi Algorithm Suite)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zbkb,
|
||||
.zbkc,
|
||||
.zbkx,
|
||||
.zksed,
|
||||
.zksh,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zksed)] = .{
|
||||
.llvm_name = "zksed",
|
||||
.description = "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zksh)] = .{
|
||||
.llvm_name = "zksh",
|
||||
.description = "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zkt)] = .{
|
||||
.llvm_name = "zkt",
|
||||
.description = "'Zkt' (Data Independent Execution Latency)",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zve32f)] = .{
|
||||
.llvm_name = "zve32f",
|
||||
.description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zve32x,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zve32x)] = .{
|
||||
.llvm_name = "zve32x",
|
||||
.description = "'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl32b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zve64d)] = .{
|
||||
.llvm_name = "zve64d",
|
||||
.description = "'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zve64f,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zve64f)] = .{
|
||||
.llvm_name = "zve64f",
|
||||
.description = "'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zve32f,
|
||||
.zve64x,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zve64x)] = .{
|
||||
.llvm_name = "zve64x",
|
||||
.description = "'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW)",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zve32x,
|
||||
.zvl64b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl1024b)] = .{
|
||||
.llvm_name = "zvl1024b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 1024",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl512b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl128b)] = .{
|
||||
.llvm_name = "zvl128b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 128",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl64b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl16384b)] = .{
|
||||
.llvm_name = "zvl16384b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 16384",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl8192b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl2048b)] = .{
|
||||
.llvm_name = "zvl2048b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 2048",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl1024b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl256b)] = .{
|
||||
.llvm_name = "zvl256b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 256",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl128b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl32768b)] = .{
|
||||
.llvm_name = "zvl32768b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 32768",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl16384b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl32b)] = .{
|
||||
.llvm_name = "zvl32b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 32",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl4096b)] = .{
|
||||
.llvm_name = "zvl4096b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 4096",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl2048b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl512b)] = .{
|
||||
.llvm_name = "zvl512b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 512",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl256b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl64b)] = .{
|
||||
.llvm_name = "zvl64b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 64",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl32b,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.zvl8192b)] = .{
|
||||
.llvm_name = "zvl8192b",
|
||||
.description = "'Zvl' (Minimum Vector Length) 8192",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.zvl4096b,
|
||||
}),
|
||||
};
|
||||
const ti = @typeInfo(Feature);
|
||||
for (result) |*elem, i| {
|
||||
elem.index = i;
|
||||
@ -443,6 +668,33 @@ pub const cpu = struct {
|
||||
.@"64bit",
|
||||
}),
|
||||
};
|
||||
pub const sifive_e20 = CpuModel{
|
||||
.name = "sifive_e20",
|
||||
.llvm_name = "sifive-e20",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.c,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_e21 = CpuModel{
|
||||
.name = "sifive_e21",
|
||||
.llvm_name = "sifive-e21",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a,
|
||||
.c,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_e24 = CpuModel{
|
||||
.name = "sifive_e24",
|
||||
.llvm_name = "sifive-e24",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a,
|
||||
.c,
|
||||
.f,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_e31 = CpuModel{
|
||||
.name = "sifive_e31",
|
||||
.llvm_name = "sifive-e31",
|
||||
@ -452,6 +704,16 @@ pub const cpu = struct {
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_e34 = CpuModel{
|
||||
.name = "sifive_e34",
|
||||
.llvm_name = "sifive-e34",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.a,
|
||||
.c,
|
||||
.f,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_e76 = CpuModel{
|
||||
.name = "sifive_e76",
|
||||
.llvm_name = "sifive-e76",
|
||||
@ -462,6 +724,48 @@ pub const cpu = struct {
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_s21 = CpuModel{
|
||||
.name = "sifive_s21",
|
||||
.llvm_name = "sifive-s21",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.a,
|
||||
.c,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_s51 = CpuModel{
|
||||
.name = "sifive_s51",
|
||||
.llvm_name = "sifive-s51",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.a,
|
||||
.c,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_s54 = CpuModel{
|
||||
.name = "sifive_s54",
|
||||
.llvm_name = "sifive-s54",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.a,
|
||||
.c,
|
||||
.d,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_s76 = CpuModel{
|
||||
.name = "sifive_s76",
|
||||
.llvm_name = "sifive-s76",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.a,
|
||||
.c,
|
||||
.d,
|
||||
.m,
|
||||
}),
|
||||
};
|
||||
pub const sifive_u54 = CpuModel{
|
||||
.name = "sifive_u54",
|
||||
.llvm_name = "sifive-u54",
|
||||
|
||||
@ -12,6 +12,7 @@ pub const Feature = enum {
|
||||
mutable_globals,
|
||||
nontrapping_fptoint,
|
||||
reference_types,
|
||||
relaxed_simd,
|
||||
sign_ext,
|
||||
simd128,
|
||||
tail_call,
|
||||
@ -61,6 +62,11 @@ pub const all_features = blk: {
|
||||
.description = "Enable reference types",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.relaxed_simd)] = .{
|
||||
.llvm_name = "relaxed-simd",
|
||||
.description = "Enable relaxed-simd instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.sign_ext)] = .{
|
||||
.llvm_name = "sign-ext",
|
||||
.description = "Enable sign extension operators",
|
||||
|
||||
@ -24,6 +24,7 @@ pub const Feature = enum {
|
||||
avx512dq,
|
||||
avx512er,
|
||||
avx512f,
|
||||
avx512fp16,
|
||||
avx512ifma,
|
||||
avx512pf,
|
||||
avx512vbmi,
|
||||
@ -41,6 +42,7 @@ pub const Feature = enum {
|
||||
clwb,
|
||||
clzero,
|
||||
cmov,
|
||||
crc32,
|
||||
cx16,
|
||||
cx8,
|
||||
enqcmd,
|
||||
@ -130,11 +132,13 @@ pub const Feature = enum {
|
||||
sse4a,
|
||||
sse_unaligned_mem,
|
||||
ssse3,
|
||||
tagged_globals,
|
||||
tbm,
|
||||
tsxldtrk,
|
||||
uintr,
|
||||
use_aa,
|
||||
use_glm_div_sqrt_costs,
|
||||
use_slm_arith_costs,
|
||||
vaes,
|
||||
vpclmulqdq,
|
||||
vzeroupper,
|
||||
@ -283,6 +287,15 @@ pub const all_features = blk: {
|
||||
.fma,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.avx512fp16)] = .{
|
||||
.llvm_name = "avx512fp16",
|
||||
.description = "Support 16-bit floating point",
|
||||
.dependencies = featureSet(&[_]Feature{
|
||||
.avx512bw,
|
||||
.avx512dq,
|
||||
.avx512vl,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.avx512ifma)] = .{
|
||||
.llvm_name = "avx512ifma",
|
||||
.description = "Enable AVX-512 Integer Fused Multiple-Add",
|
||||
@ -386,6 +399,11 @@ pub const all_features = blk: {
|
||||
.description = "Enable conditional move instructions",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.crc32)] = .{
|
||||
.llvm_name = "crc32",
|
||||
.description = "Enable SSE 4.2 CRC32 instruction",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.cx16)] = .{
|
||||
.llvm_name = "cx16",
|
||||
.description = "64-bit with cmpxchg16b",
|
||||
@ -867,6 +885,11 @@ pub const all_features = blk: {
|
||||
.sse3,
|
||||
}),
|
||||
};
|
||||
result[@enumToInt(Feature.tagged_globals)] = .{
|
||||
.llvm_name = "tagged-globals",
|
||||
.description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.tbm)] = .{
|
||||
.llvm_name = "tbm",
|
||||
.description = "Enable TBM instructions",
|
||||
@ -892,6 +915,11 @@ pub const all_features = blk: {
|
||||
.description = "Use Goldmont specific floating point div/sqrt costs",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.use_slm_arith_costs)] = .{
|
||||
.llvm_name = "use-slm-arith-costs",
|
||||
.description = "Use Silvermont specific arithmetic costs",
|
||||
.dependencies = featureSet(&[_]Feature{}),
|
||||
};
|
||||
result[@enumToInt(Feature.vaes)] = .{
|
||||
.llvm_name = "vaes",
|
||||
.description = "Promote selected AES instructions to AVX512/AVX registers",
|
||||
@ -977,45 +1005,6 @@ pub const all_features = blk: {
|
||||
};
|
||||
|
||||
pub const cpu = struct {
|
||||
pub const _i386 = CpuModel{
|
||||
.name = "_i386",
|
||||
.llvm_name = "i386",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const _i486 = CpuModel{
|
||||
.name = "_i486",
|
||||
.llvm_name = "i486",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const _i586 = CpuModel{
|
||||
.name = "_i586",
|
||||
.llvm_name = "i586",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cx8,
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const _i686 = CpuModel{
|
||||
.name = "_i686",
|
||||
.llvm_name = "i686",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cmov,
|
||||
.cx8,
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const alderlake = CpuModel{
|
||||
.name = "alderlake",
|
||||
.llvm_name = "alderlake",
|
||||
@ -1029,6 +1018,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.false_deps_popcnt,
|
||||
@ -1281,6 +1271,7 @@ pub const cpu = struct {
|
||||
.aes,
|
||||
.branchfusion,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fast_11bytenop,
|
||||
.fast_scalar_shift_masks,
|
||||
@ -1309,6 +1300,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.branchfusion,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_11bytenop,
|
||||
@ -1342,6 +1334,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.branchfusion,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_11bytenop,
|
||||
@ -1378,6 +1371,7 @@ pub const cpu = struct {
|
||||
.bmi2,
|
||||
.branchfusion,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_11bytenop,
|
||||
@ -1440,6 +1434,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.f16c,
|
||||
@ -1504,6 +1499,7 @@ pub const cpu = struct {
|
||||
.aes,
|
||||
.bmi,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_15bytenop,
|
||||
@ -1568,6 +1564,7 @@ pub const cpu = struct {
|
||||
.bmi2,
|
||||
.clflushopt,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.fast_15bytenop,
|
||||
@ -1620,6 +1617,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.false_deps_popcnt,
|
||||
@ -1672,6 +1670,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.false_deps_popcnt,
|
||||
@ -1734,6 +1733,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.f16c,
|
||||
@ -1770,6 +1770,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.false_deps_popcnt,
|
||||
@ -1799,6 +1800,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fxsr,
|
||||
.macrofusion,
|
||||
@ -1818,6 +1820,7 @@ pub const cpu = struct {
|
||||
.@"64bit",
|
||||
.avx,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_15bytenop,
|
||||
@ -1871,6 +1874,7 @@ pub const cpu = struct {
|
||||
.aes,
|
||||
.clflushopt,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_movbe,
|
||||
@ -1906,6 +1910,7 @@ pub const cpu = struct {
|
||||
.aes,
|
||||
.clflushopt,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fast_movbe,
|
||||
.fsgsbase,
|
||||
@ -1943,6 +1948,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.f16c,
|
||||
@ -1973,6 +1979,45 @@ pub const cpu = struct {
|
||||
.xsaveopt,
|
||||
}),
|
||||
};
|
||||
pub const @"i386" = CpuModel{
|
||||
.name = "i386",
|
||||
.llvm_name = "i386",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const @"i486" = CpuModel{
|
||||
.name = "i486",
|
||||
.llvm_name = "i486",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const @"i586" = CpuModel{
|
||||
.name = "i586",
|
||||
.llvm_name = "i586",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cx8,
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const @"i686" = CpuModel{
|
||||
.name = "i686",
|
||||
.llvm_name = "i686",
|
||||
.features = featureSet(&[_]Feature{
|
||||
.cmov,
|
||||
.cx8,
|
||||
.slow_unaligned_mem_16,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
};
|
||||
pub const icelake_client = CpuModel{
|
||||
.name = "icelake_client",
|
||||
.llvm_name = "icelake-client",
|
||||
@ -1992,6 +2037,7 @@ pub const cpu = struct {
|
||||
.bmi2,
|
||||
.clflushopt,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.fast_15bytenop,
|
||||
@ -2051,6 +2097,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.fast_15bytenop,
|
||||
@ -2098,6 +2145,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.false_deps_popcnt,
|
||||
@ -2203,6 +2251,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fast_gather,
|
||||
.fast_movbe,
|
||||
@ -2243,6 +2292,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fast_gather,
|
||||
.fast_movbe,
|
||||
@ -2285,6 +2335,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fxsr,
|
||||
.macrofusion,
|
||||
@ -2523,6 +2574,7 @@ pub const cpu = struct {
|
||||
.bmi2,
|
||||
.clflushopt,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.fast_15bytenop,
|
||||
@ -2569,6 +2621,7 @@ pub const cpu = struct {
|
||||
.@"64bit",
|
||||
.avx,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_15bytenop,
|
||||
@ -2600,11 +2653,10 @@ pub const cpu = struct {
|
||||
.avx512bf16,
|
||||
.avx512bitalg,
|
||||
.avx512cd,
|
||||
.avx512dq,
|
||||
.avx512fp16,
|
||||
.avx512ifma,
|
||||
.avx512vbmi,
|
||||
.avx512vbmi2,
|
||||
.avx512vl,
|
||||
.avx512vnni,
|
||||
.avx512vp2intersect,
|
||||
.avx512vpopcntdq,
|
||||
@ -2615,6 +2667,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.enqcmd,
|
||||
.ermsb,
|
||||
@ -2671,6 +2724,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_7bytenop,
|
||||
@ -2690,6 +2744,7 @@ pub const cpu = struct {
|
||||
.slow_pmulld,
|
||||
.slow_two_mem_ops,
|
||||
.sse4_2,
|
||||
.use_slm_arith_costs,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
@ -2710,6 +2765,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.false_deps_popcnt,
|
||||
@ -2757,6 +2813,7 @@ pub const cpu = struct {
|
||||
.bmi2,
|
||||
.clflushopt,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.f16c,
|
||||
@ -2808,6 +2865,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.false_deps_popcnt,
|
||||
@ -2849,6 +2907,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_7bytenop,
|
||||
@ -2868,6 +2927,7 @@ pub const cpu = struct {
|
||||
.slow_pmulld,
|
||||
.slow_two_mem_ops,
|
||||
.sse4_2,
|
||||
.use_slm_arith_costs,
|
||||
.vzeroupper,
|
||||
.x87,
|
||||
}),
|
||||
@ -2893,6 +2953,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.ermsb,
|
||||
.fast_15bytenop,
|
||||
@ -2944,6 +3005,7 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clwb,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fast_movbe,
|
||||
.fsgsbase,
|
||||
@ -2979,6 +3041,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.fxsr,
|
||||
.macrofusion,
|
||||
@ -3037,6 +3100,7 @@ pub const cpu = struct {
|
||||
.features = featureSet(&[_]Feature{
|
||||
.@"64bit",
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_15bytenop,
|
||||
@ -3065,6 +3129,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.false_deps_lzcnt_tzcnt,
|
||||
@ -3102,6 +3167,7 @@ pub const cpu = struct {
|
||||
.bmi,
|
||||
.bmi2,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.false_deps_popcnt,
|
||||
.fast_15bytenop,
|
||||
@ -3156,13 +3222,16 @@ pub const cpu = struct {
|
||||
.clflushopt,
|
||||
.clzero,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_15bytenop,
|
||||
.fast_bextr,
|
||||
.fast_lzcnt,
|
||||
.fast_movbe,
|
||||
.fast_scalar_fsqrt,
|
||||
.fast_scalar_shift_masks,
|
||||
.fast_vector_fsqrt,
|
||||
.fma,
|
||||
.fsgsbase,
|
||||
.fxsr,
|
||||
@ -3202,13 +3271,16 @@ pub const cpu = struct {
|
||||
.clwb,
|
||||
.clzero,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_15bytenop,
|
||||
.fast_bextr,
|
||||
.fast_lzcnt,
|
||||
.fast_movbe,
|
||||
.fast_scalar_fsqrt,
|
||||
.fast_scalar_shift_masks,
|
||||
.fast_vector_fsqrt,
|
||||
.fma,
|
||||
.fsgsbase,
|
||||
.fxsr,
|
||||
@ -3249,14 +3321,17 @@ pub const cpu = struct {
|
||||
.clwb,
|
||||
.clzero,
|
||||
.cmov,
|
||||
.crc32,
|
||||
.cx16,
|
||||
.f16c,
|
||||
.fast_15bytenop,
|
||||
.fast_bextr,
|
||||
.fast_lzcnt,
|
||||
.fast_movbe,
|
||||
.fast_scalar_fsqrt,
|
||||
.fast_scalar_shift_masks,
|
||||
.fast_variable_perlane_shuffle,
|
||||
.fast_vector_fsqrt,
|
||||
.fma,
|
||||
.fsgsbase,
|
||||
.fsrm,
|
||||
|
||||
@ -32,7 +32,18 @@ pub fn isValidId(bytes: []const u8) bool {
|
||||
else => return false,
|
||||
}
|
||||
}
|
||||
return std.zig.Token.getKeyword(bytes) == null;
|
||||
if (std.zig.Token.getKeyword(bytes) != null) return false;
|
||||
if (bytes.len >= 2) switch (bytes[0]) {
|
||||
'u', 'i' => {
|
||||
for (bytes[1..]) |b| switch (b) {
|
||||
'0'...'9' => continue,
|
||||
else => break,
|
||||
} else return false;
|
||||
},
|
||||
else => {},
|
||||
};
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
test "isValidId" {
|
||||
@ -41,6 +52,7 @@ test "isValidId" {
|
||||
try std.testing.expect(!isValidId("a b c"));
|
||||
try std.testing.expect(!isValidId("3d"));
|
||||
try std.testing.expect(!isValidId("enum"));
|
||||
try std.testing.expect(!isValidId("i386"));
|
||||
}
|
||||
|
||||
/// Print the string as escaped contents of a double quoted or single-quoted string.
|
||||
|
||||
@ -80,11 +80,11 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32
|
||||
}
|
||||
switch (family) {
|
||||
3 => {
|
||||
cpu.model = &Target.x86.cpu._i386;
|
||||
cpu.model = &Target.x86.cpu.i386;
|
||||
return;
|
||||
},
|
||||
4 => {
|
||||
cpu.model = &Target.x86.cpu._i486;
|
||||
cpu.model = &Target.x86.cpu.i486;
|
||||
return;
|
||||
},
|
||||
5 => {
|
||||
@ -229,7 +229,7 @@ fn detectAMDProcessor(cpu: *Target.Cpu, family: u32, model: u32) void {
|
||||
// This is very unscientific, and not necessarily correct.
|
||||
switch (family) {
|
||||
4 => {
|
||||
cpu.model = &Target.x86.cpu._i486;
|
||||
cpu.model = &Target.x86.cpu.i486;
|
||||
return;
|
||||
},
|
||||
5 => {
|
||||
|
||||
@ -50,6 +50,10 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.td_name = "AArch64.td",
|
||||
.branch_quota = 2000,
|
||||
.feature_overrides = &.{
|
||||
.{
|
||||
.llvm_name = "v8a",
|
||||
.extra_deps = &.{ "fp_armv8", "neon" },
|
||||
},
|
||||
.{
|
||||
.llvm_name = "CONTEXTIDREL2",
|
||||
.zig_name = "contextidr_el2",
|
||||
@ -57,19 +61,23 @@ const llvm_targets = [_]LlvmTarget{
|
||||
},
|
||||
.{
|
||||
.llvm_name = "neoversee1",
|
||||
.zig_name = "neoverse_e1",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "neoversen1",
|
||||
.zig_name = "neoverse_n1",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "neoversen2",
|
||||
.zig_name = "neoverse_n2",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "neoversev1",
|
||||
.zig_name = "neoverse_v1",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "neoverse512tvb",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "exynosm3",
|
||||
@ -126,6 +134,10 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "a77",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "apple-a7",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "apple-a10",
|
||||
.flatten = true,
|
||||
@ -134,10 +146,22 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "apple-a11",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "apple-a12",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "apple-a13",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "apple-a14",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "apple-a7-sysreg",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "carmel",
|
||||
.flatten = true,
|
||||
@ -150,6 +174,10 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "cortex-x1",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "cortex-x2",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "falkor",
|
||||
.flatten = true,
|
||||
@ -196,12 +224,9 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "tsv110",
|
||||
.flatten = true,
|
||||
},
|
||||
},
|
||||
.extra_features = &.{
|
||||
.{
|
||||
.zig_name = "v8a",
|
||||
.desc = "Support ARM v8a instructions",
|
||||
.deps = &.{ "fp_armv8", "neon" },
|
||||
.llvm_name = "ampere1",
|
||||
.flatten = true,
|
||||
},
|
||||
},
|
||||
.extra_cpus = &.{
|
||||
@ -309,6 +334,14 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "cortex-a78",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "cortex-a710",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "cortex-x1c",
|
||||
.flatten = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "r5",
|
||||
.flatten = true,
|
||||
@ -542,6 +575,10 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "armv8.7-a",
|
||||
.zig_name = "v8_7a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "armv8.8-a",
|
||||
.zig_name = "v8_8a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "armv8-a",
|
||||
.zig_name = "v8a",
|
||||
@ -558,6 +595,22 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "armv8-r",
|
||||
.zig_name = "v8r",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "armv9.1-a",
|
||||
.zig_name = "v9_1a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "armv9.2-a",
|
||||
.zig_name = "v9_2a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "armv9.3-a",
|
||||
.zig_name = "v9_3a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "armv9-a",
|
||||
.zig_name = "v9a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "v4t",
|
||||
.zig_name = "has_v4t",
|
||||
@ -638,6 +691,26 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "v8.7a",
|
||||
.zig_name = "has_v8_7a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "v8.8a",
|
||||
.zig_name = "has_v8_8a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "v9a",
|
||||
.zig_name = "has_v9a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "v9.1a",
|
||||
.zig_name = "has_v9_1a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "v9.2a",
|
||||
.zig_name = "has_v9_2a",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "v9.3a",
|
||||
.zig_name = "has_v9_3a",
|
||||
},
|
||||
},
|
||||
},
|
||||
.{
|
||||
@ -695,6 +768,12 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.zig_name = "riscv",
|
||||
.llvm_name = "RISCV",
|
||||
.td_name = "RISCV.td",
|
||||
.feature_overrides = &.{
|
||||
.{
|
||||
.llvm_name = "sifive7",
|
||||
.flatten = true,
|
||||
},
|
||||
},
|
||||
.extra_cpus = &.{
|
||||
.{
|
||||
.llvm_name = null,
|
||||
@ -737,22 +816,6 @@ const llvm_targets = [_]LlvmTarget{
|
||||
.llvm_name = "64bit-mode",
|
||||
.omit = true,
|
||||
},
|
||||
.{
|
||||
.llvm_name = "i386",
|
||||
.zig_name = "_i386",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "i486",
|
||||
.zig_name = "_i486",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "i586",
|
||||
.zig_name = "_i586",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "i686",
|
||||
.zig_name = "_i686",
|
||||
},
|
||||
.{
|
||||
.llvm_name = "lakemont",
|
||||
.extra_deps = &.{"soft_float"},
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user