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update CPU features to LLVM 14

Browse Source 
Notable changes:

`_i386`, `_i486`, and `_i686` are renamed to `i386`, `i486`,
and `i686` respectively. `std.zig.fmtId` is enhanced to support
formatting `i386` as `@"i386"`.

Some CPU features which are actually CPU models have been
properly flattened, such as `apple_a12`, `apple_a13`, `apple_a7`,
`cortex_a78c`, `exynos_m4`, `neoverse_e1`, `neoverse_n1`,
`neoverse_n2`, `neoverse_v1`.

Some CPU features have been added and some have been removed, following
LLVM's lead.

CSky CPU features support is added.
This commit is contained in:
Andrew Kelley 2022-07-01 21:35:19 -07:00
parent d19290e603
commit d55d98919d
15 changed files with 1877 additions and 387 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/std/target.zig
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@ -444,6 +444,7 @@ pub const Target = struct {
pub const arm = @import("target/arm.zig"); pub const arm = @import("target/arm.zig");
pub const avr = @import("target/avr.zig"); pub const avr = @import("target/avr.zig");
pub const bpf = @import("target/bpf.zig"); pub const bpf = @import("target/bpf.zig");
pub const csky = @import("target/csky.zig");
pub const hexagon = @import("target/hexagon.zig"); pub const hexagon = @import("target/hexagon.zig");
pub const mips = @import("target/mips.zig"); pub const mips = @import("target/mips.zig");
pub const msp430 = @import("target/msp430.zig"); pub const msp430 = @import("target/msp430.zig");
@ -1287,7 +1288,7 @@ pub const Target = struct {
.sparc, .sparcel => &sparc.cpu.generic, .sparc, .sparcel => &sparc.cpu.generic,
.sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
.s390x => &systemz.cpu.generic, .s390x => &systemz.cpu.generic,
.i386 => &x86.cpu._i386, .i386 => &x86.cpu.i386,
.x86_64 => &x86.cpu.x86_64, .x86_64 => &x86.cpu.x86_64,
.nvptx, .nvptx64 => &nvptx.cpu.sm_20, .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
.ve => &ve.cpu.generic, .ve => &ve.cpu.generic,

688
lib/std/target/aarch64.zig
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File diff suppressed because it is too large Load Diff

13
lib/std/target/amdgpu.zig
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@ -65,7 +65,6 @@ pub const Feature = enum {
ldsbankcount16, ldsbankcount16,
ldsbankcount32, ldsbankcount32,
load_store_opt, load_store_opt,
localmemorysize0,
localmemorysize32768, localmemorysize32768,
localmemorysize65536, localmemorysize65536,
mad_mac_f32_insts, mad_mac_f32_insts,
@ -92,7 +91,6 @@ pub const Feature = enum {
pk_fmac_f16_inst, pk_fmac_f16_inst,
promote_alloca, promote_alloca,
r128_a16, r128_a16,
register_banking,
s_memrealtime, s_memrealtime,
s_memtime_inst, s_memtime_inst,
scalar_atomics, scalar_atomics,
@ -374,7 +372,6 @@ pub const all_features = blk: {
.no_data_dep_hazard, .no_data_dep_hazard,
.no_sdst_cmpx, .no_sdst_cmpx,
.pk_fmac_f16_inst, .pk_fmac_f16_inst,
.register_banking,
.s_memrealtime, .s_memrealtime,
.s_memtime_inst, .s_memtime_inst,
.sdwa, .sdwa,
@ -525,11 +522,6 @@ pub const all_features = blk: {
.description = "Enable SI load/store optimizer pass", .description = "Enable SI load/store optimizer pass",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.localmemorysize0)] = .{
.llvm_name = "localmemorysize0",
.description = "The size of local memory in bytes",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.localmemorysize32768)] = .{ result[@enumToInt(Feature.localmemorysize32768)] = .{
.llvm_name = "localmemorysize32768", .llvm_name = "localmemorysize32768",
.description = "The size of local memory in bytes", .description = "The size of local memory in bytes",
@ -660,11 +652,6 @@ pub const all_features = blk: {
.description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128", .description = "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.register_banking)] = .{
.llvm_name = "register-banking",
.description = "Has register banking",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.s_memrealtime)] = .{ result[@enumToInt(Feature.s_memrealtime)] = .{
.llvm_name = "s-memrealtime", .llvm_name = "s-memrealtime",
.description = "Has s_memrealtime instruction", .description = "Has s_memrealtime instruction",

175
lib/std/target/arm.zig
View File

@ -36,6 +36,7 @@ pub const Feature = enum {
execute_only, execute_only,
expand_fp_mlx, expand_fp_mlx,
exynos, exynos,
fix_cmse_cve_2021_35465,
fp16, fp16,
fp16fml, fp16fml,
fp64, fp64,
@ -71,8 +72,13 @@ pub const Feature = enum {
has_v8_5a, has_v8_5a,
has_v8_6a, has_v8_6a,
has_v8_7a, has_v8_7a,
has_v8_8a,
has_v8m, has_v8m,
has_v8m_main, has_v8m_main,
has_v9_1a,
has_v9_2a,
has_v9_3a,
has_v9a,
hwdiv, hwdiv,
hwdiv_arm, hwdiv_arm,
i8mm, i8mm,
@ -95,10 +101,12 @@ pub const Feature = enum {
neon_fpmovs, neon_fpmovs,
neonfp, neonfp,
no_branch_predictor, no_branch_predictor,
no_bti_at_return_twice,
no_movt, no_movt,
no_neg_immediates, no_neg_immediates,
noarm, noarm,
nonpipelined_vfp, nonpipelined_vfp,
pacbti,
perfmon, perfmon,
prefer_ishst, prefer_ishst,
prefer_vmovsr, prefer_vmovsr,
@ -157,10 +165,15 @@ pub const Feature = enum {
v8_5a, v8_5a,
v8_6a, v8_6a,
v8_7a, v8_7a,
v8_8a,
v8a, v8a,
v8m, v8m,
v8m_main, v8m_main,
v8r, v8r,
v9_1a,
v9_2a,
v9_3a,
v9a,
vfp2, vfp2,
vfp2sp, vfp2sp,
vfp3, vfp3,
@ -390,6 +403,11 @@ pub const all_features = blk: {
.zcz, .zcz,
}), }),
}; };
result[@enumToInt(Feature.fix_cmse_cve_2021_35465)] = .{
.llvm_name = "fix-cmse-cve-2021-35465",
.description = "Mitigate against the cve-2021-35465 security vulnurability",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.fp16)] = .{ result[@enumToInt(Feature.fp16)] = .{
.llvm_name = "fp16", .llvm_name = "fp16",
.description = "Enable half-precision floating point", .description = "Enable half-precision floating point",
@ -553,7 +571,6 @@ pub const all_features = blk: {
.dependencies = featureSet(&[_]Feature{ .dependencies = featureSet(&[_]Feature{
.has_v6t2, .has_v6t2,
.has_v7clrex, .has_v7clrex,
.perfmon,
}), }),
}; };
result[@enumToInt(Feature.has_v7clrex)] = .{ result[@enumToInt(Feature.has_v7clrex)] = .{
@ -567,6 +584,7 @@ pub const all_features = blk: {
.dependencies = featureSet(&[_]Feature{ .dependencies = featureSet(&[_]Feature{
.acquire_release, .acquire_release,
.has_v7, .has_v7,
.perfmon,
}), }),
}; };
result[@enumToInt(Feature.has_v8_1a)] = .{ result[@enumToInt(Feature.has_v8_1a)] = .{
@ -629,6 +647,13 @@ pub const all_features = blk: {
.has_v8_6a, .has_v8_6a,
}), }),
}; };
result[@enumToInt(Feature.has_v8_8a)] = .{
.llvm_name = "v8.8a",
.description = "Support ARM v8.8a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_7a,
}),
};
result[@enumToInt(Feature.has_v8m)] = .{ result[@enumToInt(Feature.has_v8m)] = .{
.llvm_name = "v8m", .llvm_name = "v8m",
.description = "Support ARM v8M Baseline instructions", .description = "Support ARM v8M Baseline instructions",
@ -643,6 +668,37 @@ pub const all_features = blk: {
.has_v7, .has_v7,
}), }),
}; };
result[@enumToInt(Feature.has_v9_1a)] = .{
.llvm_name = "v9.1a",
.description = "Support ARM v9.1a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_6a,
.has_v9a,
}),
};
result[@enumToInt(Feature.has_v9_2a)] = .{
.llvm_name = "v9.2a",
.description = "Support ARM v9.2a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_7a,
.has_v9_1a,
}),
};
result[@enumToInt(Feature.has_v9_3a)] = .{
.llvm_name = "v9.3a",
.description = "Support ARM v9.3a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_8a,
.has_v9_2a,
}),
};
result[@enumToInt(Feature.has_v9a)] = .{
.llvm_name = "v9a",
.description = "Support ARM v9a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_5a,
}),
};
result[@enumToInt(Feature.hwdiv)] = .{ result[@enumToInt(Feature.hwdiv)] = .{
.llvm_name = "hwdiv", .llvm_name = "hwdiv",
.description = "Enable divide instructions in Thumb", .description = "Enable divide instructions in Thumb",
@ -769,6 +825,11 @@ pub const all_features = blk: {
.description = "Has no branch predictor", .description = "Has no branch predictor",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.no_bti_at_return_twice)] = .{
.llvm_name = "no-bti-at-return-twice",
.description = "Don't place a BTI instruction after a return-twice",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.no_movt)] = .{ result[@enumToInt(Feature.no_movt)] = .{
.llvm_name = "no-movt", .llvm_name = "no-movt",
.description = "Don't use movt/movw pairs for 32-bit imms", .description = "Don't use movt/movw pairs for 32-bit imms",
@ -789,6 +850,11 @@ pub const all_features = blk: {
.description = "VFP instructions are not pipelined", .description = "VFP instructions are not pipelined",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.pacbti)] = .{
.llvm_name = "pacbti",
.description = "Enable Pointer Authentication and Branch Target Identification",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.perfmon)] = .{ result[@enumToInt(Feature.perfmon)] = .{
.llvm_name = "perfmon", .llvm_name = "perfmon",
.description = "Enable support for Performance Monitor extensions", .description = "Enable support for Performance Monitor extensions",
@ -1066,6 +1132,7 @@ pub const all_features = blk: {
.dsp, .dsp,
.has_v7, .has_v7,
.neon, .neon,
.perfmon,
}), }),
}; };
result[@enumToInt(Feature.v7em)] = .{ result[@enumToInt(Feature.v7em)] = .{
@ -1108,6 +1175,7 @@ pub const all_features = blk: {
.dsp, .dsp,
.has_v7, .has_v7,
.hwdiv, .hwdiv,
.perfmon,
.rclass, .rclass,
}), }),
}; };
@ -1128,6 +1196,7 @@ pub const all_features = blk: {
.has_v7, .has_v7,
.mp, .mp,
.neon, .neon,
.perfmon,
.trustzone, .trustzone,
.virtualization, .virtualization,
}), }),
@ -1266,6 +1335,23 @@ pub const all_features = blk: {
.virtualization, .virtualization,
}), }),
}; };
result[@enumToInt(Feature.v8_8a)] = .{
.llvm_name = "armv8.8-a",
.description = "ARMv88a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_8a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@enumToInt(Feature.v8a)] = .{ result[@enumToInt(Feature.v8a)] = .{
.llvm_name = "armv8-a", .llvm_name = "armv8-a",
.description = "ARMv8a architecture", .description = "ARMv8a architecture",
@ -1328,6 +1414,71 @@ pub const all_features = blk: {
.virtualization, .virtualization,
}), }),
}; };
result[@enumToInt(Feature.v9_1a)] = .{
.llvm_name = "armv9.1-a",
.description = "ARMv91a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9_1a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@enumToInt(Feature.v9_2a)] = .{
.llvm_name = "armv9.2-a",
.description = "ARMv92a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9_2a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@enumToInt(Feature.v9_3a)] = .{
.llvm_name = "armv9.3-a",
.description = "ARMv93a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v9_3a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@enumToInt(Feature.v9a)] = .{
.llvm_name = "armv9-a",
.description = "ARMv9a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@enumToInt(Feature.vfp2)] = .{ result[@enumToInt(Feature.vfp2)] = .{
.llvm_name = "vfp2", .llvm_name = "vfp2",
.description = "Enable VFP2 instructions", .description = "Enable VFP2 instructions",
@ -1781,6 +1932,16 @@ pub const cpu = struct {
.vmlx_hazards, .vmlx_hazards,
}), }),
}; };
pub const cortex_a710 = CpuModel{
.name = "cortex_a710",
.llvm_name = "cortex-a710",
.features = featureSet(&[_]Feature{
.bf16,
.fp16fml,
.i8mm,
.v9a,
}),
};
pub const cortex_a72 = CpuModel{ pub const cortex_a72 = CpuModel{
.name = "cortex_a72", .name = "cortex_a72",
.llvm_name = "cortex-a72", .llvm_name = "cortex-a72",
@ -1933,6 +2094,7 @@ pub const cpu = struct {
.llvm_name = "cortex-m33", .llvm_name = "cortex-m33",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.dsp, .dsp,
.fix_cmse_cve_2021_35465,
.fp_armv8d16sp, .fp_armv8d16sp,
.loop_align, .loop_align,
.no_branch_predictor, .no_branch_predictor,
@ -1947,6 +2109,7 @@ pub const cpu = struct {
.llvm_name = "cortex-m35p", .llvm_name = "cortex-m35p",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.dsp, .dsp,
.fix_cmse_cve_2021_35465,
.fp_armv8d16sp, .fp_armv8d16sp,
.loop_align, .loop_align,
.no_branch_predictor, .no_branch_predictor,
@ -1973,6 +2136,7 @@ pub const cpu = struct {
.name = "cortex_m55", .name = "cortex_m55",
.llvm_name = "cortex-m55", .llvm_name = "cortex-m55",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.fix_cmse_cve_2021_35465,
.fp_armv8d16, .fp_armv8d16,
.loop_align, .loop_align,
.mve_fp, .mve_fp,
@ -2079,6 +2243,15 @@ pub const cpu = struct {
.v8_2a, .v8_2a,
}), }),
}; };
pub const cortex_x1c = CpuModel{
.name = "cortex_x1c",
.llvm_name = "cortex-x1c",
.features = featureSet(&[_]Feature{
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cyclone = CpuModel{ pub const cyclone = CpuModel{
.name = "cyclone", .name = "cyclone",
.llvm_name = "cyclone", .llvm_name = "cyclone",

280
lib/std/target/avr.zig
View File

@ -583,6 +583,20 @@ pub const cpu = struct {
.avr35, .avr35,
}), }),
}; };
pub const ata5702m322 = CpuModel{
.name = "ata5702m322",
.llvm_name = "ata5702m322",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata5782 = CpuModel{
.name = "ata5782",
.llvm_name = "ata5782",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata5790 = CpuModel{ pub const ata5790 = CpuModel{
.name = "ata5790", .name = "ata5790",
.llvm_name = "ata5790", .llvm_name = "ata5790",
@ -590,6 +604,20 @@ pub const cpu = struct {
.avr5, .avr5,
}), }),
}; };
pub const ata5790n = CpuModel{
.name = "ata5790n",
.llvm_name = "ata5790n",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata5791 = CpuModel{
.name = "ata5791",
.llvm_name = "ata5791",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata5795 = CpuModel{ pub const ata5795 = CpuModel{
.name = "ata5795", .name = "ata5795",
.llvm_name = "ata5795", .llvm_name = "ata5795",
@ -597,6 +625,13 @@ pub const cpu = struct {
.avr5, .avr5,
}), }),
}; };
pub const ata5831 = CpuModel{
.name = "ata5831",
.llvm_name = "ata5831",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata6285 = CpuModel{ pub const ata6285 = CpuModel{
.name = "ata6285", .name = "ata6285",
.llvm_name = "ata6285", .llvm_name = "ata6285",
@ -618,6 +653,55 @@ pub const cpu = struct {
.avr4, .avr4,
}), }),
}; };
pub const ata6612c = CpuModel{
.name = "ata6612c",
.llvm_name = "ata6612c",
.features = featureSet(&[_]Feature{
.avr4,
}),
};
pub const ata6613c = CpuModel{
.name = "ata6613c",
.llvm_name = "ata6613c",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata6614q = CpuModel{
.name = "ata6614q",
.llvm_name = "ata6614q",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata6617c = CpuModel{
.name = "ata6617c",
.llvm_name = "ata6617c",
.features = featureSet(&[_]Feature{
.avr35,
}),
};
pub const ata664251 = CpuModel{
.name = "ata664251",
.llvm_name = "ata664251",
.features = featureSet(&[_]Feature{
.avr35,
}),
};
pub const ata8210 = CpuModel{
.name = "ata8210",
.llvm_name = "ata8210",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const ata8510 = CpuModel{
.name = "ata8510",
.llvm_name = "ata8510",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const atmega103 = CpuModel{ pub const atmega103 = CpuModel{
.name = "atmega103", .name = "atmega103",
.llvm_name = "atmega103", .llvm_name = "atmega103",
@ -1347,6 +1431,13 @@ pub const cpu = struct {
.avr5, .avr5,
}), }),
}; };
pub const atmega64hve2 = CpuModel{
.name = "atmega64hve2",
.llvm_name = "atmega64hve2",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const atmega64m1 = CpuModel{ pub const atmega64m1 = CpuModel{
.name = "atmega64m1", .name = "atmega64m1",
.llvm_name = "atmega64m1", .llvm_name = "atmega64m1",
@ -1510,6 +1601,48 @@ pub const cpu = struct {
.avr1, .avr1,
}), }),
}; };
pub const attiny1604 = CpuModel{
.name = "attiny1604",
.llvm_name = "attiny1604",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny1606 = CpuModel{
.name = "attiny1606",
.llvm_name = "attiny1606",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny1607 = CpuModel{
.name = "attiny1607",
.llvm_name = "attiny1607",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny1614 = CpuModel{
.name = "attiny1614",
.llvm_name = "attiny1614",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny1616 = CpuModel{
.name = "attiny1616",
.llvm_name = "attiny1616",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny1617 = CpuModel{
.name = "attiny1617",
.llvm_name = "attiny1617",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny1634 = CpuModel{ pub const attiny1634 = CpuModel{
.name = "attiny1634", .name = "attiny1634",
.llvm_name = "attiny1634", .llvm_name = "attiny1634",
@ -1531,6 +1664,34 @@ pub const cpu = struct {
.avrtiny, .avrtiny,
}), }),
}; };
pub const attiny202 = CpuModel{
.name = "attiny202",
.llvm_name = "attiny202",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny204 = CpuModel{
.name = "attiny204",
.llvm_name = "attiny204",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny212 = CpuModel{
.name = "attiny212",
.llvm_name = "attiny212",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny214 = CpuModel{
.name = "attiny214",
.llvm_name = "attiny214",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny22 = CpuModel{ pub const attiny22 = CpuModel{
.name = "attiny22", .name = "attiny22",
.llvm_name = "attiny22", .llvm_name = "attiny22",
@ -1602,6 +1763,20 @@ pub const cpu = struct {
.avr1, .avr1,
}), }),
}; };
pub const attiny3216 = CpuModel{
.name = "attiny3216",
.llvm_name = "attiny3216",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny3217 = CpuModel{
.name = "attiny3217",
.llvm_name = "attiny3217",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny4 = CpuModel{ pub const attiny4 = CpuModel{
.name = "attiny4", .name = "attiny4",
.llvm_name = "attiny4", .llvm_name = "attiny4",
@ -1616,6 +1791,55 @@ pub const cpu = struct {
.avrtiny, .avrtiny,
}), }),
}; };
pub const attiny402 = CpuModel{
.name = "attiny402",
.llvm_name = "attiny402",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny404 = CpuModel{
.name = "attiny404",
.llvm_name = "attiny404",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny406 = CpuModel{
.name = "attiny406",
.llvm_name = "attiny406",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny412 = CpuModel{
.name = "attiny412",
.llvm_name = "attiny412",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny414 = CpuModel{
.name = "attiny414",
.llvm_name = "attiny414",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny416 = CpuModel{
.name = "attiny416",
.llvm_name = "attiny416",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny417 = CpuModel{
.name = "attiny417",
.llvm_name = "attiny417",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny4313 = CpuModel{ pub const attiny4313 = CpuModel{
.name = "attiny4313", .name = "attiny4313",
.llvm_name = "attiny4313", .llvm_name = "attiny4313",
@ -1686,6 +1910,48 @@ pub const cpu = struct {
.avrtiny, .avrtiny,
}), }),
}; };
pub const attiny804 = CpuModel{
.name = "attiny804",
.llvm_name = "attiny804",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny806 = CpuModel{
.name = "attiny806",
.llvm_name = "attiny806",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny807 = CpuModel{
.name = "attiny807",
.llvm_name = "attiny807",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny814 = CpuModel{
.name = "attiny814",
.llvm_name = "attiny814",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny816 = CpuModel{
.name = "attiny816",
.llvm_name = "attiny816",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny817 = CpuModel{
.name = "attiny817",
.llvm_name = "attiny817",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const attiny828 = CpuModel{ pub const attiny828 = CpuModel{
.name = "attiny828", .name = "attiny828",
.llvm_name = "attiny828", .llvm_name = "attiny828",
@ -1945,6 +2211,13 @@ pub const cpu = struct {
.xmegau, .xmegau,
}), }),
}; };
pub const atxmega32c3 = CpuModel{
.name = "atxmega32c3",
.llvm_name = "atxmega32c3",
.features = featureSet(&[_]Feature{
.xmegau,
}),
};
pub const atxmega32c4 = CpuModel{ pub const atxmega32c4 = CpuModel{
.name = "atxmega32c4", .name = "atxmega32c4",
.llvm_name = "atxmega32c4", .llvm_name = "atxmega32c4",
@ -1952,6 +2225,13 @@ pub const cpu = struct {
.xmegau, .xmegau,
}), }),
}; };
pub const atxmega32d3 = CpuModel{
.name = "atxmega32d3",
.llvm_name = "atxmega32d3",
.features = featureSet(&[_]Feature{
.xmega,
}),
};
pub const atxmega32d4 = CpuModel{ pub const atxmega32d4 = CpuModel{
.name = "atxmega32d4", .name = "atxmega32d4",
.llvm_name = "atxmega32d4", .llvm_name = "atxmega32d4",

163
lib/std/target/csky.zig Normal file
View File

@ -0,0 +1,163 @@
//! This file is auto-generated by tools/update_cpu_features.zig.
const std = @import("../std.zig");
const CpuFeature = std.Target.Cpu.Feature;
const CpuModel = std.Target.Cpu.Model;
pub const Feature = enum {
@"10e60",
@"2e3",
@"3e3r1",
@"3e3r3",
@"3e7",
@"7e10",
btst16,
doloop,
e1,
e2,
elrw,
fpuv2_df,
fpuv2_sf,
fpuv3_df,
fpuv3_sf,
hard_float,
hard_float_abi,
java,
mp1e2,
};
pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
pub const all_features = blk: {
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
result[@enumToInt(Feature.@"10e60")] = .{
.llvm_name = "10e60",
.description = "Support CSKY 10e60 instructions",
.dependencies = featureSet(&[_]Feature{
.@"7e10",
}),
};
result[@enumToInt(Feature.@"2e3")] = .{
.llvm_name = "2e3",
.description = "Support CSKY 2e3 instructions",
.dependencies = featureSet(&[_]Feature{
.e2,
}),
};
result[@enumToInt(Feature.@"3e3r1")] = .{
.llvm_name = "3e3r1",
.description = "Support CSKY 3e3r1 instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.@"3e3r3")] = .{
.llvm_name = "3e3r3",
.description = "Support CSKY 3e3r3 instructions",
.dependencies = featureSet(&[_]Feature{
.doloop,
}),
};
result[@enumToInt(Feature.@"3e7")] = .{
.llvm_name = "3e7",
.description = "Support CSKY 3e7 instructions",
.dependencies = featureSet(&[_]Feature{
.@"2e3",
}),
};
result[@enumToInt(Feature.@"7e10")] = .{
.llvm_name = "7e10",
.description = "Support CSKY 7e10 instructions",
.dependencies = featureSet(&[_]Feature{
.@"3e7",
}),
};
result[@enumToInt(Feature.btst16)] = .{
.llvm_name = "btst16",
.description = "Use the 16-bit btsti instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.doloop)] = .{
.llvm_name = "doloop",
.description = "Enable doloop instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.e1)] = .{
.llvm_name = "e1",
.description = "Support CSKY e1 instructions",
.dependencies = featureSet(&[_]Feature{
.elrw,
}),
};
result[@enumToInt(Feature.e2)] = .{
.llvm_name = "e2",
.description = "Support CSKY e2 instructions",
.dependencies = featureSet(&[_]Feature{
.e1,
}),
};
result[@enumToInt(Feature.elrw)] = .{
.llvm_name = "elrw",
.description = "Use the extend LRW instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.fpuv2_df)] = .{
.llvm_name = "fpuv2_df",
.description = "Enable FPUv2 double float instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.fpuv2_sf)] = .{
.llvm_name = "fpuv2_sf",
.description = "Enable FPUv2 single float instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.fpuv3_df)] = .{
.llvm_name = "fpuv3_df",
.description = "Enable FPUv3 double float instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.fpuv3_sf)] = .{
.llvm_name = "fpuv3_sf",
.description = "Enable FPUv3 single float instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.hard_float)] = .{
.llvm_name = "hard-float",
.description = "Use hard floating point features",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.hard_float_abi)] = .{
.llvm_name = "hard-float-abi",
.description = "Use hard floating point ABI to pass args",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.java)] = .{
.llvm_name = "java",
.description = "Enable java instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.mp1e2)] = .{
.llvm_name = "mp1e2",
.description = "Support CSKY mp1e2 instructions",
.dependencies = featureSet(&[_]Feature{
.@"3e7",
}),
};
const ti = @typeInfo(Feature);
for (result) |*elem, i| {
elem.index = i;
elem.name = ti.Enum.fields[i].name;
}
break :blk result;
};
pub const cpu = struct {
pub const generic = CpuModel{
.name = "generic",
.llvm_name = "generic",
.features = featureSet(&[_]Feature{}),
};
};

64
lib/std/target/hexagon.zig
View File

@ -6,17 +6,21 @@ const CpuModel = std.Target.Cpu.Model;
pub const Feature = enum { pub const Feature = enum {
audio, audio,
cabac,
compound, compound,
duplex, duplex,
hvx, hvx,
hvx_ieee_fp,
hvx_length128b, hvx_length128b,
hvx_length64b, hvx_length64b,
hvx_qfloat,
hvxv60, hvxv60,
hvxv62, hvxv62,
hvxv65, hvxv65,
hvxv66, hvxv66,
hvxv67, hvxv67,
hvxv68, hvxv68,
hvxv69,
long_calls, long_calls,
mem_noshuf, mem_noshuf,
memops, memops,
@ -37,6 +41,7 @@ pub const Feature = enum {
v66, v66,
v67, v67,
v68, v68,
v69,
zreg, zreg,
}; };
@ -54,6 +59,11 @@ pub const all_features = blk: {
.description = "Hexagon Audio extension instructions", .description = "Hexagon Audio extension instructions",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.cabac)] = .{
.llvm_name = "cabac",
.description = "Emit the CABAC instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.compound)] = .{ result[@enumToInt(Feature.compound)] = .{
.llvm_name = "compound", .llvm_name = "compound",
.description = "Use compound instructions", .description = "Use compound instructions",
@ -69,6 +79,11 @@ pub const all_features = blk: {
.description = "Hexagon HVX instructions", .description = "Hexagon HVX instructions",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.hvx_ieee_fp)] = .{
.llvm_name = "hvx-ieee-fp",
.description = "Hexagon HVX IEEE floating point instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.hvx_length128b)] = .{ result[@enumToInt(Feature.hvx_length128b)] = .{
.llvm_name = "hvx-length128b", .llvm_name = "hvx-length128b",
.description = "Hexagon HVX 128B instructions", .description = "Hexagon HVX 128B instructions",
@ -83,6 +98,11 @@ pub const all_features = blk: {
.hvx, .hvx,
}), }),
}; };
result[@enumToInt(Feature.hvx_qfloat)] = .{
.llvm_name = "hvx-qfloat",
.description = "Hexagon HVX QFloating point instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.hvxv60)] = .{ result[@enumToInt(Feature.hvxv60)] = .{
.llvm_name = "hvxv60", .llvm_name = "hvxv60",
.description = "Hexagon HVX instructions", .description = "Hexagon HVX instructions",
@ -126,6 +146,13 @@ pub const all_features = blk: {
.hvxv67, .hvxv67,
}), }),
}; };
result[@enumToInt(Feature.hvxv69)] = .{
.llvm_name = "hvxv69",
.description = "Hexagon HVX instructions",
.dependencies = featureSet(&[_]Feature{
.hvxv68,
}),
};
result[@enumToInt(Feature.long_calls)] = .{ result[@enumToInt(Feature.long_calls)] = .{
.llvm_name = "long-calls", .llvm_name = "long-calls",
.description = "Use constant-extended calls", .description = "Use constant-extended calls",
@ -230,6 +257,11 @@ pub const all_features = blk: {
.description = "Enable Hexagon V68 architecture", .description = "Enable Hexagon V68 architecture",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.v69)] = .{
.llvm_name = "v69",
.description = "Enable Hexagon V69 architecture",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zreg)] = .{ result[@enumToInt(Feature.zreg)] = .{
.llvm_name = "zreg", .llvm_name = "zreg",
.description = "Hexagon ZReg extension instructions", .description = "Hexagon ZReg extension instructions",
@ -248,6 +280,7 @@ pub const cpu = struct {
.name = "generic", .name = "generic",
.llvm_name = "generic", .llvm_name = "generic",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.memops, .memops,
@ -264,6 +297,7 @@ pub const cpu = struct {
.name = "hexagonv5", .name = "hexagonv5",
.llvm_name = "hexagonv5", .llvm_name = "hexagonv5",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.memops, .memops,
@ -278,6 +312,7 @@ pub const cpu = struct {
.name = "hexagonv55", .name = "hexagonv55",
.llvm_name = "hexagonv55", .llvm_name = "hexagonv55",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.memops, .memops,
@ -293,6 +328,7 @@ pub const cpu = struct {
.name = "hexagonv60", .name = "hexagonv60",
.llvm_name = "hexagonv60", .llvm_name = "hexagonv60",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.memops, .memops,
@ -309,6 +345,7 @@ pub const cpu = struct {
.name = "hexagonv62", .name = "hexagonv62",
.llvm_name = "hexagonv62", .llvm_name = "hexagonv62",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.memops, .memops,
@ -326,6 +363,7 @@ pub const cpu = struct {
.name = "hexagonv65", .name = "hexagonv65",
.llvm_name = "hexagonv65", .llvm_name = "hexagonv65",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.mem_noshuf, .mem_noshuf,
@ -344,6 +382,7 @@ pub const cpu = struct {
.name = "hexagonv66", .name = "hexagonv66",
.llvm_name = "hexagonv66", .llvm_name = "hexagonv66",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.mem_noshuf, .mem_noshuf,
@ -363,6 +402,7 @@ pub const cpu = struct {
.name = "hexagonv67", .name = "hexagonv67",
.llvm_name = "hexagonv67", .llvm_name = "hexagonv67",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.mem_noshuf, .mem_noshuf,
@ -403,6 +443,7 @@ pub const cpu = struct {
.name = "hexagonv68", .name = "hexagonv68",
.llvm_name = "hexagonv68", .llvm_name = "hexagonv68",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.cabac,
.compound, .compound,
.duplex, .duplex,
.mem_noshuf, .mem_noshuf,
@ -420,4 +461,27 @@ pub const cpu = struct {
.v68, .v68,
}), }),
}; };
pub const hexagonv69 = CpuModel{
.name = "hexagonv69",
.llvm_name = "hexagonv69",
.features = featureSet(&[_]Feature{
.cabac,
.compound,
.duplex,
.mem_noshuf,
.memops,
.nvj,
.nvs,
.small_data,
.v5,
.v55,
.v60,
.v62,
.v65,
.v66,
.v67,
.v68,
.v69,
}),
};
}; };

18
lib/std/target/nvptx.zig
View File

@ -19,6 +19,9 @@ pub const Feature = enum {
ptx70, ptx70,
ptx71, ptx71,
ptx72, ptx72,
ptx73,
ptx74,
ptx75,
sm_20, sm_20,
sm_21, sm_21,
sm_30, sm_30,
@ -117,6 +120,21 @@ pub const all_features = blk: {
.description = "Use PTX version 7.2", .description = "Use PTX version 7.2",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.ptx73)] = .{
.llvm_name = "ptx73",
.description = "Use PTX version 7.3",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.ptx74)] = .{
.llvm_name = "ptx74",
.description = "Use PTX version 7.4",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.ptx75)] = .{
.llvm_name = "ptx75",
.description = "Use PTX version 7.5",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.sm_20)] = .{ result[@enumToInt(Feature.sm_20)] = .{
.llvm_name = "sm_20", .llvm_name = "sm_20",
.description = "Target SM 2.0", .description = "Target SM 2.0",

94
lib/std/target/powerpc.zig
View File

@ -29,14 +29,24 @@ pub const Feature = enum {
frsqrte, frsqrte,
frsqrtes, frsqrtes,
fsqrt, fsqrt,
fuse_add_logical,
fuse_addi_load, fuse_addi_load,
fuse_addis_load, fuse_addis_load,
fuse_arith_add,
fuse_back2back,
fuse_cmp,
fuse_logical,
fuse_logical_add,
fuse_sha3,
fuse_store, fuse_store,
fuse_wideimm,
fuse_zeromove,
fusion, fusion,
hard_float, hard_float,
htm, htm,
icbt, icbt,
invariant_function_descriptors, invariant_function_descriptors,
isa_v206_instructions,
isa_v207_instructions, isa_v207_instructions,
isa_v30_instructions, isa_v30_instructions,
isa_v31_instructions, isa_v31_instructions,
@ -235,6 +245,13 @@ pub const all_features = blk: {
.fpu, .fpu,
}), }),
}; };
result[@enumToInt(Feature.fuse_add_logical)] = .{
.llvm_name = "fuse-add-logical",
.description = "Target supports Add with Logical Operations fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_addi_load)] = .{ result[@enumToInt(Feature.fuse_addi_load)] = .{
.llvm_name = "fuse-addi-load", .llvm_name = "fuse-addi-load",
.description = "Power8 Addi-Load fusion", .description = "Power8 Addi-Load fusion",
@ -249,6 +266,48 @@ pub const all_features = blk: {
.fusion, .fusion,
}), }),
}; };
result[@enumToInt(Feature.fuse_arith_add)] = .{
.llvm_name = "fuse-arith-add",
.description = "Target supports Arithmetic Operations with Add fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_back2back)] = .{
.llvm_name = "fuse-back2back",
.description = "Target supports general back to back fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_cmp)] = .{
.llvm_name = "fuse-cmp",
.description = "Target supports Comparison Operations fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_logical)] = .{
.llvm_name = "fuse-logical",
.description = "Target supports Logical Operations fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_logical_add)] = .{
.llvm_name = "fuse-logical-add",
.description = "Target supports Logical with Add Operations fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_sha3)] = .{
.llvm_name = "fuse-sha3",
.description = "Target supports SHA3 assist fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_store)] = .{ result[@enumToInt(Feature.fuse_store)] = .{
.llvm_name = "fuse-store", .llvm_name = "fuse-store",
.description = "Target supports store clustering", .description = "Target supports store clustering",
@ -256,6 +315,20 @@ pub const all_features = blk: {
.fusion, .fusion,
}), }),
}; };
result[@enumToInt(Feature.fuse_wideimm)] = .{
.llvm_name = "fuse-wideimm",
.description = "Target supports Wide-Immediate fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fuse_zeromove)] = .{
.llvm_name = "fuse-zeromove",
.description = "Target supports move to SPR with branch fusion",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fusion)] = .{ result[@enumToInt(Feature.fusion)] = .{
.llvm_name = "fusion", .llvm_name = "fusion",
.description = "Target supports instruction fusion", .description = "Target supports instruction fusion",
@ -281,6 +354,11 @@ pub const all_features = blk: {
.description = "Assume function descriptors are invariant", .description = "Assume function descriptors are invariant",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.isa_v206_instructions)] = .{
.llvm_name = "isa-v206-instructions",
.description = "Enable instructions in ISA 2.06.",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.isa_v207_instructions)] = .{ result[@enumToInt(Feature.isa_v207_instructions)] = .{
.llvm_name = "isa-v207-instructions", .llvm_name = "isa-v207-instructions",
.description = "Enable instructions in ISA 2.07.", .description = "Enable instructions in ISA 2.07.",
@ -707,9 +785,15 @@ pub const cpu = struct {
.frsqrte, .frsqrte,
.frsqrtes, .frsqrtes,
.fsqrt, .fsqrt,
.fuse_add_logical,
.fuse_arith_add,
.fuse_logical,
.fuse_logical_add,
.fuse_sha3,
.fuse_store, .fuse_store,
.htm, .htm,
.icbt, .icbt,
.isa_v206_instructions,
.isel, .isel,
.ldbrx, .ldbrx,
.lfiwax, .lfiwax,
@ -817,6 +901,7 @@ pub const cpu = struct {
.fuse_addis_load, .fuse_addis_load,
.htm, .htm,
.icbt, .icbt,
.isa_v206_instructions,
.isa_v207_instructions, .isa_v207_instructions,
.isel, .isel,
.ldbrx, .ldbrx,
@ -851,9 +936,15 @@ pub const cpu = struct {
.frsqrte, .frsqrte,
.frsqrtes, .frsqrtes,
.fsqrt, .fsqrt,
.fuse_add_logical,
.fuse_arith_add,
.fuse_logical,
.fuse_logical_add,
.fuse_sha3,
.fuse_store, .fuse_store,
.htm, .htm,
.icbt, .icbt,
.isa_v206_instructions,
.isel, .isel,
.ldbrx, .ldbrx,
.lfiwax, .lfiwax,
@ -985,6 +1076,7 @@ pub const cpu = struct {
.frsqrte, .frsqrte,
.frsqrtes, .frsqrtes,
.fsqrt, .fsqrt,
.isa_v206_instructions,
.isel, .isel,
.ldbrx, .ldbrx,
.lfiwax, .lfiwax,
@ -1019,6 +1111,7 @@ pub const cpu = struct {
.fuse_addis_load, .fuse_addis_load,
.htm, .htm,
.icbt, .icbt,
.isa_v206_instructions,
.isa_v207_instructions, .isa_v207_instructions,
.isel, .isel,
.ldbrx, .ldbrx,
@ -1055,6 +1148,7 @@ pub const cpu = struct {
.fsqrt, .fsqrt,
.htm, .htm,
.icbt, .icbt,
.isa_v206_instructions,
.isel, .isel,
.ldbrx, .ldbrx,
.lfiwax, .lfiwax,

470
lib/std/target/riscv.zig
View File

@ -10,22 +10,12 @@ pub const Feature = enum {
c, c,
d, d,
e, e,
experimental_b,
experimental_v,
experimental_zba,
experimental_zbb,
experimental_zbc,
experimental_zbe, experimental_zbe,
experimental_zbf, experimental_zbf,
experimental_zbm, experimental_zbm,
experimental_zbp, experimental_zbp,
experimental_zbproposedc,
experimental_zbr, experimental_zbr,
experimental_zbs,
experimental_zbt, experimental_zbt,
experimental_zfh,
experimental_zvamo,
experimental_zvlsseg,
f, f,
m, m,
no_rvc_hints, no_rvc_hints,
@ -62,6 +52,46 @@ pub const Feature = enum {
reserve_x8, reserve_x8,
reserve_x9, reserve_x9,
save_restore, save_restore,
v,
zba,
zbb,
zbc,
zbkb,
zbkc,
zbkx,
zbs,
zdinx,
zfh,
zfhmin,
zfinx,
zhinx,
zhinxmin,
zk,
zkn,
zknd,
zkne,
zknh,
zkr,
zks,
zksed,
zksh,
zkt,
zve32f,
zve32x,
zve64d,
zve64f,
zve64x,
zvl1024b,
zvl128b,
zvl16384b,
zvl2048b,
zvl256b,
zvl32768b,
zvl32b,
zvl4096b,
zvl512b,
zvl64b,
zvl8192b,
}; };
pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet; pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
@ -100,103 +130,36 @@ pub const all_features = blk: {
.description = "Implements RV32E (provides 16 rather than 32 GPRs)", .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_b)] = .{
.llvm_name = "experimental-b",
.description = "'B' (Bit Manipulation Instructions)",
.dependencies = featureSet(&[_]Feature{
.experimental_zba,
.experimental_zbb,
.experimental_zbc,
.experimental_zbe,
.experimental_zbf,
.experimental_zbm,
.experimental_zbp,
.experimental_zbr,
.experimental_zbs,
.experimental_zbt,
}),
};
result[@enumToInt(Feature.experimental_v)] = .{
.llvm_name = "experimental-v",
.description = "'V' (Vector Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zba)] = .{
.llvm_name = "experimental-zba",
.description = "'Zba' (Address calculation 'B' Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zbb)] = .{
.llvm_name = "experimental-zbb",
.description = "'Zbb' (Base 'B' Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zbc)] = .{
.llvm_name = "experimental-zbc",
.description = "'Zbc' (Carry-Less 'B' Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zbe)] = .{ result[@enumToInt(Feature.experimental_zbe)] = .{
.llvm_name = "experimental-zbe", .llvm_name = "experimental-zbe",
.description = "'Zbe' (Extract-Deposit 'B' Instructions)", .description = "'Zbe' (Extract-Deposit 'Zb' Instructions)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_zbf)] = .{ result[@enumToInt(Feature.experimental_zbf)] = .{
.llvm_name = "experimental-zbf", .llvm_name = "experimental-zbf",
.description = "'Zbf' (Bit-Field 'B' Instructions)", .description = "'Zbf' (Bit-Field 'Zb' Instructions)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_zbm)] = .{ result[@enumToInt(Feature.experimental_zbm)] = .{
.llvm_name = "experimental-zbm", .llvm_name = "experimental-zbm",
.description = "'Zbm' (Matrix 'B' Instructions)", .description = "'Zbm' (Matrix 'Zb' Instructions)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_zbp)] = .{ result[@enumToInt(Feature.experimental_zbp)] = .{
.llvm_name = "experimental-zbp", .llvm_name = "experimental-zbp",
.description = "'Zbp' (Permutation 'B' Instructions)", .description = "'Zbp' (Permutation 'Zb' Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zbproposedc)] = .{
.llvm_name = "experimental-zbproposedc",
.description = "'Zbproposedc' (Proposed Compressed 'B' Instructions)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_zbr)] = .{ result[@enumToInt(Feature.experimental_zbr)] = .{
.llvm_name = "experimental-zbr", .llvm_name = "experimental-zbr",
.description = "'Zbr' (Polynomial Reduction 'B' Instructions)", .description = "'Zbr' (Polynomial Reduction 'Zb' Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zbs)] = .{
.llvm_name = "experimental-zbs",
.description = "'Zbs' (Single-Bit 'B' Instructions)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_zbt)] = .{ result[@enumToInt(Feature.experimental_zbt)] = .{
.llvm_name = "experimental-zbt", .llvm_name = "experimental-zbt",
.description = "'Zbt' (Ternary 'B' Instructions)", .description = "'Zbt' (Ternary 'Zb' Instructions)",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.experimental_zfh)] = .{
.llvm_name = "experimental-zfh",
.description = "'Zfh' (Half-Precision Floating-Point)",
.dependencies = featureSet(&[_]Feature{
.f,
}),
};
result[@enumToInt(Feature.experimental_zvamo)] = .{
.llvm_name = "experimental-zvamo",
.description = "'Zvamo' (Vector AMO Operations)",
.dependencies = featureSet(&[_]Feature{
.experimental_v,
}),
};
result[@enumToInt(Feature.experimental_zvlsseg)] = .{
.llvm_name = "experimental-zvlsseg",
.description = "'Zvlsseg' (Vector segment load/store instructions)",
.dependencies = featureSet(&[_]Feature{
.experimental_v,
}),
};
result[@enumToInt(Feature.f)] = .{ result[@enumToInt(Feature.f)] = .{
.llvm_name = "f", .llvm_name = "f",
.description = "'F' (Single-Precision Floating-Point)", .description = "'F' (Single-Precision Floating-Point)",
@ -377,6 +340,268 @@ pub const all_features = blk: {
.description = "Enable save/restore.", .description = "Enable save/restore.",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.v)] = .{
.llvm_name = "v",
.description = "'V' (Vector Extension for Application Processors)",
.dependencies = featureSet(&[_]Feature{
.d,
.zvl128b,
}),
};
result[@enumToInt(Feature.zba)] = .{
.llvm_name = "zba",
.description = "'Zba' (Address Generation Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zbb)] = .{
.llvm_name = "zbb",
.description = "'Zbb' (Basic Bit-Manipulation)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zbc)] = .{
.llvm_name = "zbc",
.description = "'Zbc' (Carry-Less Multiplication)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zbkb)] = .{
.llvm_name = "zbkb",
.description = "'Zbkb' (Bitmanip instructions for Cryptography)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zbkc)] = .{
.llvm_name = "zbkc",
.description = "'Zbkc' (Carry-less multiply instructions for Cryptography)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zbkx)] = .{
.llvm_name = "zbkx",
.description = "'Zbkx' (Crossbar permutation instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zbs)] = .{
.llvm_name = "zbs",
.description = "'Zbs' (Single-Bit Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zdinx)] = .{
.llvm_name = "zdinx",
.description = "'Zdinx' (Double in Integer)",
.dependencies = featureSet(&[_]Feature{
.zfinx,
}),
};
result[@enumToInt(Feature.zfh)] = .{
.llvm_name = "zfh",
.description = "'Zfh' (Half-Precision Floating-Point)",
.dependencies = featureSet(&[_]Feature{
.f,
}),
};
result[@enumToInt(Feature.zfhmin)] = .{
.llvm_name = "zfhmin",
.description = "'Zfhmin' (Half-Precision Floating-Point Minimal)",
.dependencies = featureSet(&[_]Feature{
.f,
}),
};
result[@enumToInt(Feature.zfinx)] = .{
.llvm_name = "zfinx",
.description = "'Zfinx' (Float in Integer)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zhinx)] = .{
.llvm_name = "zhinx",
.description = "'Zhinx' (Half Float in Integer)",
.dependencies = featureSet(&[_]Feature{
.zfinx,
}),
};
result[@enumToInt(Feature.zhinxmin)] = .{
.llvm_name = "zhinxmin",
.description = "'Zhinxmin' (Half Float in Integer Minimal)",
.dependencies = featureSet(&[_]Feature{
.zfinx,
}),
};
result[@enumToInt(Feature.zk)] = .{
.llvm_name = "zk",
.description = "'Zk' (Standard scalar cryptography extension)",
.dependencies = featureSet(&[_]Feature{
.zkn,
.zkr,
.zkt,
}),
};
result[@enumToInt(Feature.zkn)] = .{
.llvm_name = "zkn",
.description = "'Zkn' (NIST Algorithm Suite)",
.dependencies = featureSet(&[_]Feature{
.zbkb,
.zbkc,
.zbkx,
.zknd,
.zkne,
.zknh,
}),
};
result[@enumToInt(Feature.zknd)] = .{
.llvm_name = "zknd",
.description = "'Zknd' (NIST Suite: AES Decryption)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zkne)] = .{
.llvm_name = "zkne",
.description = "'Zkne' (NIST Suite: AES Encryption)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zknh)] = .{
.llvm_name = "zknh",
.description = "'Zknh' (NIST Suite: Hash Function Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zkr)] = .{
.llvm_name = "zkr",
.description = "'Zkr' (Entropy Source Extension)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zks)] = .{
.llvm_name = "zks",
.description = "'Zks' (ShangMi Algorithm Suite)",
.dependencies = featureSet(&[_]Feature{
.zbkb,
.zbkc,
.zbkx,
.zksed,
.zksh,
}),
};
result[@enumToInt(Feature.zksed)] = .{
.llvm_name = "zksed",
.description = "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zksh)] = .{
.llvm_name = "zksh",
.description = "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zkt)] = .{
.llvm_name = "zkt",
.description = "'Zkt' (Data Independent Execution Latency)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zve32f)] = .{
.llvm_name = "zve32f",
.description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)",
.dependencies = featureSet(&[_]Feature{
.zve32x,
}),
};
result[@enumToInt(Feature.zve32x)] = .{
.llvm_name = "zve32x",
.description = "'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW)",
.dependencies = featureSet(&[_]Feature{
.zvl32b,
}),
};
result[@enumToInt(Feature.zve64d)] = .{
.llvm_name = "zve64d",
.description = "'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension)",
.dependencies = featureSet(&[_]Feature{
.zve64f,
}),
};
result[@enumToInt(Feature.zve64f)] = .{
.llvm_name = "zve64f",
.description = "'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension)",
.dependencies = featureSet(&[_]Feature{
.zve32f,
.zve64x,
}),
};
result[@enumToInt(Feature.zve64x)] = .{
.llvm_name = "zve64x",
.description = "'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW)",
.dependencies = featureSet(&[_]Feature{
.zve32x,
.zvl64b,
}),
};
result[@enumToInt(Feature.zvl1024b)] = .{
.llvm_name = "zvl1024b",
.description = "'Zvl' (Minimum Vector Length) 1024",
.dependencies = featureSet(&[_]Feature{
.zvl512b,
}),
};
result[@enumToInt(Feature.zvl128b)] = .{
.llvm_name = "zvl128b",
.description = "'Zvl' (Minimum Vector Length) 128",
.dependencies = featureSet(&[_]Feature{
.zvl64b,
}),
};
result[@enumToInt(Feature.zvl16384b)] = .{
.llvm_name = "zvl16384b",
.description = "'Zvl' (Minimum Vector Length) 16384",
.dependencies = featureSet(&[_]Feature{
.zvl8192b,
}),
};
result[@enumToInt(Feature.zvl2048b)] = .{
.llvm_name = "zvl2048b",
.description = "'Zvl' (Minimum Vector Length) 2048",
.dependencies = featureSet(&[_]Feature{
.zvl1024b,
}),
};
result[@enumToInt(Feature.zvl256b)] = .{
.llvm_name = "zvl256b",
.description = "'Zvl' (Minimum Vector Length) 256",
.dependencies = featureSet(&[_]Feature{
.zvl128b,
}),
};
result[@enumToInt(Feature.zvl32768b)] = .{
.llvm_name = "zvl32768b",
.description = "'Zvl' (Minimum Vector Length) 32768",
.dependencies = featureSet(&[_]Feature{
.zvl16384b,
}),
};
result[@enumToInt(Feature.zvl32b)] = .{
.llvm_name = "zvl32b",
.description = "'Zvl' (Minimum Vector Length) 32",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.zvl4096b)] = .{
.llvm_name = "zvl4096b",
.description = "'Zvl' (Minimum Vector Length) 4096",
.dependencies = featureSet(&[_]Feature{
.zvl2048b,
}),
};
result[@enumToInt(Feature.zvl512b)] = .{
.llvm_name = "zvl512b",
.description = "'Zvl' (Minimum Vector Length) 512",
.dependencies = featureSet(&[_]Feature{
.zvl256b,
}),
};
result[@enumToInt(Feature.zvl64b)] = .{
.llvm_name = "zvl64b",
.description = "'Zvl' (Minimum Vector Length) 64",
.dependencies = featureSet(&[_]Feature{
.zvl32b,
}),
};
result[@enumToInt(Feature.zvl8192b)] = .{
.llvm_name = "zvl8192b",
.description = "'Zvl' (Minimum Vector Length) 8192",
.dependencies = featureSet(&[_]Feature{
.zvl4096b,
}),
};
const ti = @typeInfo(Feature); const ti = @typeInfo(Feature);
for (result) |*elem, i| { for (result) |*elem, i| {
elem.index = i; elem.index = i;
@ -443,6 +668,33 @@ pub const cpu = struct {
.@"64bit", .@"64bit",
}), }),
}; };
pub const sifive_e20 = CpuModel{
.name = "sifive_e20",
.llvm_name = "sifive-e20",
.features = featureSet(&[_]Feature{
.c,
.m,
}),
};
pub const sifive_e21 = CpuModel{
.name = "sifive_e21",
.llvm_name = "sifive-e21",
.features = featureSet(&[_]Feature{
.a,
.c,
.m,
}),
};
pub const sifive_e24 = CpuModel{
.name = "sifive_e24",
.llvm_name = "sifive-e24",
.features = featureSet(&[_]Feature{
.a,
.c,
.f,
.m,
}),
};
pub const sifive_e31 = CpuModel{ pub const sifive_e31 = CpuModel{
.name = "sifive_e31", .name = "sifive_e31",
.llvm_name = "sifive-e31", .llvm_name = "sifive-e31",
@ -452,6 +704,16 @@ pub const cpu = struct {
.m, .m,
}), }),
}; };
pub const sifive_e34 = CpuModel{
.name = "sifive_e34",
.llvm_name = "sifive-e34",
.features = featureSet(&[_]Feature{
.a,
.c,
.f,
.m,
}),
};
pub const sifive_e76 = CpuModel{ pub const sifive_e76 = CpuModel{
.name = "sifive_e76", .name = "sifive_e76",
.llvm_name = "sifive-e76", .llvm_name = "sifive-e76",
@ -462,6 +724,48 @@ pub const cpu = struct {
.m, .m,
}), }),
}; };
pub const sifive_s21 = CpuModel{
.name = "sifive_s21",
.llvm_name = "sifive-s21",
.features = featureSet(&[_]Feature{
.@"64bit",
.a,
.c,
.m,
}),
};
pub const sifive_s51 = CpuModel{
.name = "sifive_s51",
.llvm_name = "sifive-s51",
.features = featureSet(&[_]Feature{
.@"64bit",
.a,
.c,
.m,
}),
};
pub const sifive_s54 = CpuModel{
.name = "sifive_s54",
.llvm_name = "sifive-s54",
.features = featureSet(&[_]Feature{
.@"64bit",
.a,
.c,
.d,
.m,
}),
};
pub const sifive_s76 = CpuModel{
.name = "sifive_s76",
.llvm_name = "sifive-s76",
.features = featureSet(&[_]Feature{
.@"64bit",
.a,
.c,
.d,
.m,
}),
};
pub const sifive_u54 = CpuModel{ pub const sifive_u54 = CpuModel{
.name = "sifive_u54", .name = "sifive_u54",
.llvm_name = "sifive-u54", .llvm_name = "sifive-u54",

6
lib/std/target/wasm.zig
View File

@ -12,6 +12,7 @@ pub const Feature = enum {
mutable_globals, mutable_globals,
nontrapping_fptoint, nontrapping_fptoint,
reference_types, reference_types,
relaxed_simd,
sign_ext, sign_ext,
simd128, simd128,
tail_call, tail_call,
@ -61,6 +62,11 @@ pub const all_features = blk: {
.description = "Enable reference types", .description = "Enable reference types",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.relaxed_simd)] = .{
.llvm_name = "relaxed-simd",
.description = "Enable relaxed-simd instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.sign_ext)] = .{ result[@enumToInt(Feature.sign_ext)] = .{
.llvm_name = "sign-ext", .llvm_name = "sign-ext",
.description = "Enable sign extension operators", .description = "Enable sign extension operators",

157
lib/std/target/x86.zig
View File

@ -24,6 +24,7 @@ pub const Feature = enum {
avx512dq, avx512dq,
avx512er, avx512er,
avx512f, avx512f,
avx512fp16,
avx512ifma, avx512ifma,
avx512pf, avx512pf,
avx512vbmi, avx512vbmi,
@ -41,6 +42,7 @@ pub const Feature = enum {
clwb, clwb,
clzero, clzero,
cmov, cmov,
crc32,
cx16, cx16,
cx8, cx8,
enqcmd, enqcmd,
@ -130,11 +132,13 @@ pub const Feature = enum {
sse4a, sse4a,
sse_unaligned_mem, sse_unaligned_mem,
ssse3, ssse3,
tagged_globals,
tbm, tbm,
tsxldtrk, tsxldtrk,
uintr, uintr,
use_aa, use_aa,
use_glm_div_sqrt_costs, use_glm_div_sqrt_costs,
use_slm_arith_costs,
vaes, vaes,
vpclmulqdq, vpclmulqdq,
vzeroupper, vzeroupper,
@ -283,6 +287,15 @@ pub const all_features = blk: {
.fma, .fma,
}), }),
}; };
result[@enumToInt(Feature.avx512fp16)] = .{
.llvm_name = "avx512fp16",
.description = "Support 16-bit floating point",
.dependencies = featureSet(&[_]Feature{
.avx512bw,
.avx512dq,
.avx512vl,
}),
};
result[@enumToInt(Feature.avx512ifma)] = .{ result[@enumToInt(Feature.avx512ifma)] = .{
.llvm_name = "avx512ifma", .llvm_name = "avx512ifma",
.description = "Enable AVX-512 Integer Fused Multiple-Add", .description = "Enable AVX-512 Integer Fused Multiple-Add",
@ -386,6 +399,11 @@ pub const all_features = blk: {
.description = "Enable conditional move instructions", .description = "Enable conditional move instructions",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.crc32)] = .{
.llvm_name = "crc32",
.description = "Enable SSE 4.2 CRC32 instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.cx16)] = .{ result[@enumToInt(Feature.cx16)] = .{
.llvm_name = "cx16", .llvm_name = "cx16",
.description = "64-bit with cmpxchg16b", .description = "64-bit with cmpxchg16b",
@ -867,6 +885,11 @@ pub const all_features = blk: {
.sse3, .sse3,
}), }),
}; };
result[@enumToInt(Feature.tagged_globals)] = .{
.llvm_name = "tagged-globals",
.description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.tbm)] = .{ result[@enumToInt(Feature.tbm)] = .{
.llvm_name = "tbm", .llvm_name = "tbm",
.description = "Enable TBM instructions", .description = "Enable TBM instructions",
@ -892,6 +915,11 @@ pub const all_features = blk: {
.description = "Use Goldmont specific floating point div/sqrt costs", .description = "Use Goldmont specific floating point div/sqrt costs",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.use_slm_arith_costs)] = .{
.llvm_name = "use-slm-arith-costs",
.description = "Use Silvermont specific arithmetic costs",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.vaes)] = .{ result[@enumToInt(Feature.vaes)] = .{
.llvm_name = "vaes", .llvm_name = "vaes",
.description = "Promote selected AES instructions to AVX512/AVX registers", .description = "Promote selected AES instructions to AVX512/AVX registers",
@ -977,45 +1005,6 @@ pub const all_features = blk: {
}; };
pub const cpu = struct { pub const cpu = struct {
pub const _i386 = CpuModel{
.name = "_i386",
.llvm_name = "i386",
.features = featureSet(&[_]Feature{
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const _i486 = CpuModel{
.name = "_i486",
.llvm_name = "i486",
.features = featureSet(&[_]Feature{
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const _i586 = CpuModel{
.name = "_i586",
.llvm_name = "i586",
.features = featureSet(&[_]Feature{
.cx8,
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const _i686 = CpuModel{
.name = "_i686",
.llvm_name = "i686",
.features = featureSet(&[_]Feature{
.cmov,
.cx8,
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const alderlake = CpuModel{ pub const alderlake = CpuModel{
.name = "alderlake", .name = "alderlake",
.llvm_name = "alderlake", .llvm_name = "alderlake",
@ -1029,6 +1018,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.false_deps_popcnt, .false_deps_popcnt,
@ -1281,6 +1271,7 @@ pub const cpu = struct {
.aes, .aes,
.branchfusion, .branchfusion,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fast_11bytenop, .fast_11bytenop,
.fast_scalar_shift_masks, .fast_scalar_shift_masks,
@ -1309,6 +1300,7 @@ pub const cpu = struct {
.bmi, .bmi,
.branchfusion, .branchfusion,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_11bytenop, .fast_11bytenop,
@ -1342,6 +1334,7 @@ pub const cpu = struct {
.bmi, .bmi,
.branchfusion, .branchfusion,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_11bytenop, .fast_11bytenop,
@ -1378,6 +1371,7 @@ pub const cpu = struct {
.bmi2, .bmi2,
.branchfusion, .branchfusion,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_11bytenop, .fast_11bytenop,
@ -1440,6 +1434,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.f16c, .f16c,
@ -1504,6 +1499,7 @@ pub const cpu = struct {
.aes, .aes,
.bmi, .bmi,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_15bytenop, .fast_15bytenop,
@ -1568,6 +1564,7 @@ pub const cpu = struct {
.bmi2, .bmi2,
.clflushopt, .clflushopt,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.fast_15bytenop, .fast_15bytenop,
@ -1620,6 +1617,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.false_deps_popcnt, .false_deps_popcnt,
@ -1672,6 +1670,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.false_deps_popcnt, .false_deps_popcnt,
@ -1734,6 +1733,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.f16c, .f16c,
@ -1770,6 +1770,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.false_deps_popcnt, .false_deps_popcnt,
@ -1799,6 +1800,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fxsr, .fxsr,
.macrofusion, .macrofusion,
@ -1818,6 +1820,7 @@ pub const cpu = struct {
.@"64bit", .@"64bit",
.avx, .avx,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_15bytenop, .fast_15bytenop,
@ -1871,6 +1874,7 @@ pub const cpu = struct {
.aes, .aes,
.clflushopt, .clflushopt,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_movbe, .fast_movbe,
@ -1906,6 +1910,7 @@ pub const cpu = struct {
.aes, .aes,
.clflushopt, .clflushopt,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fast_movbe, .fast_movbe,
.fsgsbase, .fsgsbase,
@ -1943,6 +1948,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.f16c, .f16c,
@ -1973,6 +1979,45 @@ pub const cpu = struct {
.xsaveopt, .xsaveopt,
}), }),
}; };
pub const @"i386" = CpuModel{
.name = "i386",
.llvm_name = "i386",
.features = featureSet(&[_]Feature{
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const @"i486" = CpuModel{
.name = "i486",
.llvm_name = "i486",
.features = featureSet(&[_]Feature{
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const @"i586" = CpuModel{
.name = "i586",
.llvm_name = "i586",
.features = featureSet(&[_]Feature{
.cx8,
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const @"i686" = CpuModel{
.name = "i686",
.llvm_name = "i686",
.features = featureSet(&[_]Feature{
.cmov,
.cx8,
.slow_unaligned_mem_16,
.vzeroupper,
.x87,
}),
};
pub const icelake_client = CpuModel{ pub const icelake_client = CpuModel{
.name = "icelake_client", .name = "icelake_client",
.llvm_name = "icelake-client", .llvm_name = "icelake-client",
@ -1992,6 +2037,7 @@ pub const cpu = struct {
.bmi2, .bmi2,
.clflushopt, .clflushopt,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.fast_15bytenop, .fast_15bytenop,
@ -2051,6 +2097,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.fast_15bytenop, .fast_15bytenop,
@ -2098,6 +2145,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.false_deps_popcnt, .false_deps_popcnt,
@ -2203,6 +2251,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fast_gather, .fast_gather,
.fast_movbe, .fast_movbe,
@ -2243,6 +2292,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fast_gather, .fast_gather,
.fast_movbe, .fast_movbe,
@ -2285,6 +2335,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fxsr, .fxsr,
.macrofusion, .macrofusion,
@ -2523,6 +2574,7 @@ pub const cpu = struct {
.bmi2, .bmi2,
.clflushopt, .clflushopt,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.fast_15bytenop, .fast_15bytenop,
@ -2569,6 +2621,7 @@ pub const cpu = struct {
.@"64bit", .@"64bit",
.avx, .avx,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_15bytenop, .fast_15bytenop,
@ -2600,11 +2653,10 @@ pub const cpu = struct {
.avx512bf16, .avx512bf16,
.avx512bitalg, .avx512bitalg,
.avx512cd, .avx512cd,
.avx512dq, .avx512fp16,
.avx512ifma, .avx512ifma,
.avx512vbmi, .avx512vbmi,
.avx512vbmi2, .avx512vbmi2,
.avx512vl,
.avx512vnni, .avx512vnni,
.avx512vp2intersect, .avx512vp2intersect,
.avx512vpopcntdq, .avx512vpopcntdq,
@ -2615,6 +2667,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.enqcmd, .enqcmd,
.ermsb, .ermsb,
@ -2671,6 +2724,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_7bytenop, .fast_7bytenop,
@ -2690,6 +2744,7 @@ pub const cpu = struct {
.slow_pmulld, .slow_pmulld,
.slow_two_mem_ops, .slow_two_mem_ops,
.sse4_2, .sse4_2,
.use_slm_arith_costs,
.vzeroupper, .vzeroupper,
.x87, .x87,
}), }),
@ -2710,6 +2765,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.false_deps_popcnt, .false_deps_popcnt,
@ -2757,6 +2813,7 @@ pub const cpu = struct {
.bmi2, .bmi2,
.clflushopt, .clflushopt,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.f16c, .f16c,
@ -2808,6 +2865,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.false_deps_popcnt, .false_deps_popcnt,
@ -2849,6 +2907,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_7bytenop, .fast_7bytenop,
@ -2868,6 +2927,7 @@ pub const cpu = struct {
.slow_pmulld, .slow_pmulld,
.slow_two_mem_ops, .slow_two_mem_ops,
.sse4_2, .sse4_2,
.use_slm_arith_costs,
.vzeroupper, .vzeroupper,
.x87, .x87,
}), }),
@ -2893,6 +2953,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.ermsb, .ermsb,
.fast_15bytenop, .fast_15bytenop,
@ -2944,6 +3005,7 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clwb, .clwb,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fast_movbe, .fast_movbe,
.fsgsbase, .fsgsbase,
@ -2979,6 +3041,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.fxsr, .fxsr,
.macrofusion, .macrofusion,
@ -3037,6 +3100,7 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.@"64bit", .@"64bit",
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_15bytenop, .fast_15bytenop,
@ -3065,6 +3129,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.false_deps_lzcnt_tzcnt, .false_deps_lzcnt_tzcnt,
@ -3102,6 +3167,7 @@ pub const cpu = struct {
.bmi, .bmi,
.bmi2, .bmi2,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.false_deps_popcnt, .false_deps_popcnt,
.fast_15bytenop, .fast_15bytenop,
@ -3156,13 +3222,16 @@ pub const cpu = struct {
.clflushopt, .clflushopt,
.clzero, .clzero,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_15bytenop, .fast_15bytenop,
.fast_bextr, .fast_bextr,
.fast_lzcnt, .fast_lzcnt,
.fast_movbe, .fast_movbe,
.fast_scalar_fsqrt,
.fast_scalar_shift_masks, .fast_scalar_shift_masks,
.fast_vector_fsqrt,
.fma, .fma,
.fsgsbase, .fsgsbase,
.fxsr, .fxsr,
@ -3202,13 +3271,16 @@ pub const cpu = struct {
.clwb, .clwb,
.clzero, .clzero,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_15bytenop, .fast_15bytenop,
.fast_bextr, .fast_bextr,
.fast_lzcnt, .fast_lzcnt,
.fast_movbe, .fast_movbe,
.fast_scalar_fsqrt,
.fast_scalar_shift_masks, .fast_scalar_shift_masks,
.fast_vector_fsqrt,
.fma, .fma,
.fsgsbase, .fsgsbase,
.fxsr, .fxsr,
@ -3249,14 +3321,17 @@ pub const cpu = struct {
.clwb, .clwb,
.clzero, .clzero,
.cmov, .cmov,
.crc32,
.cx16, .cx16,
.f16c, .f16c,
.fast_15bytenop, .fast_15bytenop,
.fast_bextr, .fast_bextr,
.fast_lzcnt, .fast_lzcnt,
.fast_movbe, .fast_movbe,
.fast_scalar_fsqrt,
.fast_scalar_shift_masks, .fast_scalar_shift_masks,
.fast_variable_perlane_shuffle, .fast_variable_perlane_shuffle,
.fast_vector_fsqrt,
.fma, .fma,
.fsgsbase, .fsgsbase,
.fsrm, .fsrm,

14
lib/std/zig/fmt.zig
View File

@ -32,7 +32,18 @@ pub fn isValidId(bytes: []const u8) bool {
else => return false, else => return false,
} }
} }
return std.zig.Token.getKeyword(bytes) == null; if (std.zig.Token.getKeyword(bytes) != null) return false;
if (bytes.len >= 2) switch (bytes[0]) {
'u', 'i' => {
for (bytes[1..]) |b| switch (b) {
'0'...'9' => continue,
else => break,
} else return false;
},
else => {},
};
return true;
} }
test "isValidId" { test "isValidId" {
@ -41,6 +52,7 @@ test "isValidId" {
try std.testing.expect(!isValidId("a b c")); try std.testing.expect(!isValidId("a b c"));
try std.testing.expect(!isValidId("3d")); try std.testing.expect(!isValidId("3d"));
try std.testing.expect(!isValidId("enum")); try std.testing.expect(!isValidId("enum"));
try std.testing.expect(!isValidId("i386"));
} }
/// Print the string as escaped contents of a double quoted or single-quoted string. /// Print the string as escaped contents of a double quoted or single-quoted string.

6
lib/std/zig/system/x86.zig
View File

@ -80,11 +80,11 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32
} }
switch (family) { switch (family) {
3 => { 3 => {
cpu.model = &Target.x86.cpu._i386; cpu.model = &Target.x86.cpu.i386;
return; return;
}, },
4 => { 4 => {
cpu.model = &Target.x86.cpu._i486; cpu.model = &Target.x86.cpu.i486;
return; return;
}, },
5 => { 5 => {
@ -229,7 +229,7 @@ fn detectAMDProcessor(cpu: *Target.Cpu, family: u32, model: u32) void {
// This is very unscientific, and not necessarily correct. // This is very unscientific, and not necessarily correct.
switch (family) { switch (family) {
4 => { 4 => {
cpu.model = &Target.x86.cpu._i486; cpu.model = &Target.x86.cpu.i486;
return; return;
}, },
5 => { 5 => {

113
tools/update_cpu_features.zig
View File

@ -50,6 +50,10 @@ const llvm_targets = [_]LlvmTarget{
.td_name = "AArch64.td", .td_name = "AArch64.td",
.branch_quota = 2000, .branch_quota = 2000,
.feature_overrides = &.{ .feature_overrides = &.{
.{
.llvm_name = "v8a",
.extra_deps = &.{ "fp_armv8", "neon" },
},
.{ .{
.llvm_name = "CONTEXTIDREL2", .llvm_name = "CONTEXTIDREL2",
.zig_name = "contextidr_el2", .zig_name = "contextidr_el2",
@ -57,19 +61,23 @@ const llvm_targets = [_]LlvmTarget{
}, },
.{ .{
.llvm_name = "neoversee1", .llvm_name = "neoversee1",
.zig_name = "neoverse_e1", .flatten = true,
}, },
.{ .{
.llvm_name = "neoversen1", .llvm_name = "neoversen1",
.zig_name = "neoverse_n1", .flatten = true,
}, },
.{ .{
.llvm_name = "neoversen2", .llvm_name = "neoversen2",
.zig_name = "neoverse_n2", .flatten = true,
}, },
.{ .{
.llvm_name = "neoversev1", .llvm_name = "neoversev1",
.zig_name = "neoverse_v1", .flatten = true,
},
.{
.llvm_name = "neoverse512tvb",
.flatten = true,
}, },
.{ .{
.llvm_name = "exynosm3", .llvm_name = "exynosm3",
@ -126,6 +134,10 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "a77", .llvm_name = "a77",
.flatten = true, .flatten = true,
}, },
.{
.llvm_name = "apple-a7",
.flatten = true,
},
.{ .{
.llvm_name = "apple-a10", .llvm_name = "apple-a10",
.flatten = true, .flatten = true,
@ -134,10 +146,22 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "apple-a11", .llvm_name = "apple-a11",
.flatten = true, .flatten = true,
}, },
.{
.llvm_name = "apple-a12",
.flatten = true,
},
.{
.llvm_name = "apple-a13",
.flatten = true,
},
.{ .{
.llvm_name = "apple-a14", .llvm_name = "apple-a14",
.flatten = true, .flatten = true,
}, },
.{
.llvm_name = "apple-a7-sysreg",
.flatten = true,
},
.{ .{
.llvm_name = "carmel", .llvm_name = "carmel",
.flatten = true, .flatten = true,
@ -150,6 +174,10 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "cortex-x1", .llvm_name = "cortex-x1",
.flatten = true, .flatten = true,
}, },
.{
.llvm_name = "cortex-x2",
.flatten = true,
},
.{ .{
.llvm_name = "falkor", .llvm_name = "falkor",
.flatten = true, .flatten = true,
@ -196,12 +224,9 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "tsv110", .llvm_name = "tsv110",
.flatten = true, .flatten = true,
}, },
},
.extra_features = &.{
.{ .{
.zig_name = "v8a", .llvm_name = "ampere1",
.desc = "Support ARM v8a instructions", .flatten = true,
.deps = &.{ "fp_armv8", "neon" },
}, },
}, },
.extra_cpus = &.{ .extra_cpus = &.{
@ -309,6 +334,14 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "cortex-a78", .llvm_name = "cortex-a78",
.flatten = true, .flatten = true,
}, },
.{
.llvm_name = "cortex-a710",
.flatten = true,
},
.{
.llvm_name = "cortex-x1c",
.flatten = true,
},
.{ .{
.llvm_name = "r5", .llvm_name = "r5",
.flatten = true, .flatten = true,
@ -542,6 +575,10 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "armv8.7-a", .llvm_name = "armv8.7-a",
.zig_name = "v8_7a", .zig_name = "v8_7a",
}, },
.{
.llvm_name = "armv8.8-a",
.zig_name = "v8_8a",
},
.{ .{
.llvm_name = "armv8-a", .llvm_name = "armv8-a",
.zig_name = "v8a", .zig_name = "v8a",
@ -558,6 +595,22 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "armv8-r", .llvm_name = "armv8-r",
.zig_name = "v8r", .zig_name = "v8r",
}, },
.{
.llvm_name = "armv9.1-a",
.zig_name = "v9_1a",
},
.{
.llvm_name = "armv9.2-a",
.zig_name = "v9_2a",
},
.{
.llvm_name = "armv9.3-a",
.zig_name = "v9_3a",
},
.{
.llvm_name = "armv9-a",
.zig_name = "v9a",
},
.{ .{
.llvm_name = "v4t", .llvm_name = "v4t",
.zig_name = "has_v4t", .zig_name = "has_v4t",
@ -638,6 +691,26 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "v8.7a", .llvm_name = "v8.7a",
.zig_name = "has_v8_7a", .zig_name = "has_v8_7a",
}, },
.{
.llvm_name = "v8.8a",
.zig_name = "has_v8_8a",
},
.{
.llvm_name = "v9a",
.zig_name = "has_v9a",
},
.{
.llvm_name = "v9.1a",
.zig_name = "has_v9_1a",
},
.{
.llvm_name = "v9.2a",
.zig_name = "has_v9_2a",
},
.{
.llvm_name = "v9.3a",
.zig_name = "has_v9_3a",
},
}, },
}, },
.{ .{
@ -695,6 +768,12 @@ const llvm_targets = [_]LlvmTarget{
.zig_name = "riscv", .zig_name = "riscv",
.llvm_name = "RISCV", .llvm_name = "RISCV",
.td_name = "RISCV.td", .td_name = "RISCV.td",
.feature_overrides = &.{
.{
.llvm_name = "sifive7",
.flatten = true,
},
},
.extra_cpus = &.{ .extra_cpus = &.{
.{ .{
.llvm_name = null, .llvm_name = null,
@ -737,22 +816,6 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "64bit-mode", .llvm_name = "64bit-mode",
.omit = true, .omit = true,
}, },
.{
.llvm_name = "i386",
.zig_name = "_i386",
},
.{
.llvm_name = "i486",
.zig_name = "_i486",
},
.{
.llvm_name = "i586",
.zig_name = "_i586",
},
.{
.llvm_name = "i686",
.zig_name = "_i686",
},
.{ .{
.llvm_name = "lakemont", .llvm_name = "lakemont",
.extra_deps = &.{"soft_float"}, .extra_deps = &.{"soft_float"},