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compiler: Update defaultFunctionAlignment()/minFunctionAlignment() for more targets.

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defaultFunctionAlignment() can be made more sophisticated over time based on the
CPU model and/or features. For now, I've picked some reasonable values for the
CPUs that are most commonly used in practice. (Values are sourced from LLVM.)
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Alex Rønne Petersen 2024-10-15 20:35:56 +02:00
parent 40104f2145
commit d2f04e919c
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1 changed files with 53 additions and 8 deletions
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src/target.zig
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@ -461,26 +461,71 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
/// This function returns 1 if function alignment is not observable or settable.
pub fn defaultFunctionAlignment(target: std.Target) Alignment {
// Overrides of the minimum for performance.
return switch (target.cpu.arch) {
.arm, .armeb => .@"4",
.aarch64, .aarch64_be => .@"4",
.sparc, .sparc64 => .@"4",
.riscv64 => .@"2",
else => .@"1",
.csky,
.thumb,
.thumbeb,
.xcore,
=> .@"4",
.aarch64,
.aarch64_be,
.hexagon,
.powerpc,
.powerpcle,
.powerpc64,
.powerpc64le,
.s390x,
.x86,
.x86_64,
=> .@"16",
.loongarch32,
.loongarch64,
=> .@"32",
else => minFunctionAlignment(target),
};
}
/// This function returns 1 if function alignment is not observable or settable.
pub fn minFunctionAlignment(target: std.Target) Alignment {
return switch (target.cpu.arch) {
.riscv32,
.riscv64,
=> if (std.Target.riscv.featureSetHasAny(target.cpu.features, .{ .c, .zca })) .@"2" else .@"4",
.thumb,
.thumbeb,
.csky,
.m68k,
.msp430,
.s390x,
.xcore,
=> .@"2",
.arc,
.arm,
.armeb,
.aarch64,
.aarch64_be,
.riscv32,
.riscv64,
.hexagon,
.lanai,
.loongarch32,
.loongarch64,
.mips,
.mipsel,
.powerpc,
.powerpcle,
.powerpc64,
.powerpc64le,
.sparc,
.sparc64,
=> .@"2",
.xtensa,
=> .@"4",
.bpfel,
.bpfeb,
.mips64,
.mips64el,
=> .@"8",
.ve,
=> .@"16",
else => .@"1",
};
}