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spirv: allow generation of *i0

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This commit is contained in:
Robin Voetter 2023-10-08 11:04:48 +02:00
parent 2d52fc762d
commit d0e7a3596b
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2 changed files with 8 additions and 3 deletions
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9
src/codegen/spirv.zig
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@ -1219,7 +1219,14 @@ const DeclGen = struct {
},
.Int => {
const int_info = ty.intInfo(mod);
// TODO: Integers in OpenCL kernels are always unsigned.
if (int_info.bits == 0) {
// Some times, the backend will be asked to generate a pointer to i0. OpTypeInt
// with 0 bits is invalid, so return an opaque type in this case.
assert(repr == .indirect);
return try self.spv.resolve(.{ .opaque_type = .{
.name = try self.spv.resolveString("u0"),
} });
}
return try self.intType(int_info.signedness, int_info.bits);
},
.Enum => {

2
test/behavior/array.zig
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@ -261,7 +261,6 @@ fn doSomeMangling(array: *[4]u8) void {
test "implicit cast zero sized array ptr to slice" {
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
{
var b = "".*;
@ -732,7 +731,6 @@ test "slicing array of zero-sized values" {
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
var arr: [32]u0 = undefined;
for (arr[0..]) |*zero|