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x86_64: rewrite unsafe int vector multiplication
This commit is contained in:
Jacob Young
parent
d7b93c7876
commit
cec6867d76
File diff suppressed because it is too large
Load Diff
@ -459,6 +459,7 @@ pub const Mnemonic = enum {
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vhaddpd, vhaddps,
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vinsertf128, vinsertps,
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vlddqu, vldmxcsr,
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vmaskmovpd, vmaskmovps,
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vmaxpd, vmaxps, vmaxsd, vmaxss,
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vminpd, vminps, vminsd, vminss,
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vmovapd, vmovaps,
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@ -481,6 +482,7 @@ pub const Mnemonic = enum {
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vpblendvb, vpblendw, vpclmulqdq,
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vpcmpeqb, vpcmpeqd, vpcmpeqq, vpcmpeqw,
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vpcmpgtb, vpcmpgtd, vpcmpgtq, vpcmpgtw,
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vperm2f128, vpermilpd, vpermilps,
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vpextrb, vpextrd, vpextrq, vpextrw,
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vpinsrb, vpinsrd, vpinsrq, vpinsrw,
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vpmaxsb, vpmaxsd, vpmaxsw, vpmaxub, vpmaxud, vpmaxuw,
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@ -521,6 +523,9 @@ pub const Mnemonic = enum {
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// AVX2
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vbroadcasti128, vpbroadcastb, vpbroadcastd, vpbroadcastq, vpbroadcastw,
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vextracti128, vinserti128, vpblendd,
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vperm2i128, vpermd, vpermpd, vpermps, vpermq,
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vpmaskmovd, vpmaskmovq,
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vpsllvd, vpsllvq, vpsravd, vpsrlvd, vpsrlvq,
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// ADX
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adcx, adox,
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// AESKLE
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@ -997,7 +1002,7 @@ fn estimateInstructionLength(prefix: Prefix, encoding: Encoding, ops: []const Op
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}
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const mnemonic_to_encodings_map = init: {
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@setEvalBranchQuota(5_600);
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@setEvalBranchQuota(5_700);
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const mnemonic_count = @typeInfo(Mnemonic).@"enum".fields.len;
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var mnemonic_map: [mnemonic_count][]Data = @splat(&.{});
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const encodings = @import("encodings.zig");
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@ -756,6 +756,8 @@ pub const Inst = struct {
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/// Swap GS base register
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swapgs,
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/// Test condition
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/// Logical compare
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/// Packed bit test
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@"test",
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/// Undefined instruction
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ud,
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@ -1053,6 +1055,7 @@ pub const Inst = struct {
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/// Blend scalar single-precision floating-point values
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/// Blend packed double-precision floating-point values
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/// Blend scalar double-precision floating-point values
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/// Blend packed dwords
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blend,
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/// Variable blend packed single-precision floating-point values
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/// Variable blend scalar single-precision floating-point values
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@ -1127,20 +1130,37 @@ pub const Inst = struct {
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sha256rnds,
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// AVX
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/// Load with broadcast floating-point data
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/// Load integer and broadcast
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broadcast,
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/// Conditional SIMD packed loads and stores
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/// Condition SIMD integer packed loads and stores
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maskmov,
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/// Permute floating-point values
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/// Permute integer values
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perm2,
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/// Permute in-lane pairs of double-precision floating-point values
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/// Permute in-lane quadruples of single-precision floating-point values
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permil,
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// BMI
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/// Bit field extract
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bextr,
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/// Extract lowest set isolated bit
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/// Get mask up to lowest set bit
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/// Reset lowest set bit
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bls,
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/// Load with broadcast floating-point data
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/// Load integer and broadcast
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broadcast,
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/// Zero high bits starting with specified bit position
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bzhi,
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/// Count the number of trailing zero bits
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tzcnt,
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// BMI2
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/// Zero high bits starting with specified bit position
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bzhi,
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/// Parallel bits deposit
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pdep,
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/// Parallel bits extract
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pext,
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// F16C
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/// Convert 16-bit floating-point values to single-precision floating-point values
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cvtph2,
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@ -1164,6 +1184,19 @@ pub const Inst = struct {
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/// Fused multiply-add of scalar double-precision floating-point values
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fmadd231,
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// AVX2
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/// Permute packed doubleword elements
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/// Permute packed qword elements
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/// Permute double-precision floating-point elements
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/// Permute single-precision floating-point elements
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perm,
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/// Variable bit shift left logical
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sllv,
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/// Variable bit shift right arithmetic
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srav,
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/// Variable bit shift right logical
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srlv,
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// ADX
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/// Unsigned integer addition of two operands with overflow flag
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ado,
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@ -1932,6 +1932,15 @@ pub const table = [_]Entry{
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.{ .vldmxcsr, .m, &.{ .m32 }, &.{ 0x0f, 0xae }, 2, .vex_lz_wig, .avx },
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.{ .vmaskmovps, .rvm, &.{ .xmm, .xmm, .m128 }, &.{ 0x66, 0x0f, 0x38, 0x2c }, 0, .vex_128_w0, .avx },
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.{ .vmaskmovps, .rvm, &.{ .ymm, .ymm, .m256 }, &.{ 0x66, 0x0f, 0x38, 0x2c }, 0, .vex_256_w0, .avx },
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.{ .vmaskmovpd, .rvm, &.{ .xmm, .xmm, .m128 }, &.{ 0x66, 0x0f, 0x38, 0x2d }, 0, .vex_128_w0, .avx },
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.{ .vmaskmovpd, .rvm, &.{ .ymm, .ymm, .m256 }, &.{ 0x66, 0x0f, 0x38, 0x2d }, 0, .vex_256_w0, .avx },
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.{ .vmaskmovps, .mvr, &.{ .m128, .xmm, .xmm }, &.{ 0x66, 0x0f, 0x38, 0x2e }, 0, .vex_128_w0, .avx },
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.{ .vmaskmovps, .mvr, &.{ .m256, .ymm, .ymm }, &.{ 0x66, 0x0f, 0x38, 0x2e }, 0, .vex_256_w0, .avx },
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.{ .vmaskmovpd, .mvr, &.{ .m128, .xmm, .xmm }, &.{ 0x66, 0x0f, 0x38, 0x2f }, 0, .vex_128_w0, .avx },
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.{ .vmaskmovpd, .mvr, &.{ .m256, .ymm, .ymm }, &.{ 0x66, 0x0f, 0x38, 0x2f }, 0, .vex_256_w0, .avx },
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.{ .vmaxpd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x5f }, 0, .vex_128_wig, .avx },
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.{ .vmaxpd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x5f }, 0, .vex_256_wig, .avx },
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@ -2097,6 +2106,18 @@ pub const table = [_]Entry{
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.{ .vpcmpgtq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x37 }, 0, .vex_128_wig, .avx },
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.{ .vperm2f128, .rvmi, &.{ .ymm, .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x06 }, 0, .vex_256_w0, .avx },
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.{ .vpermilpd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x0d }, 0, .vex_128_w0, .avx },
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.{ .vpermilpd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x0d }, 0, .vex_256_w0, .avx },
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.{ .vpermilpd, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x05 }, 0, .vex_128_w0, .avx },
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.{ .vpermilpd, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x05 }, 0, .vex_256_w0, .avx },
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.{ .vpermilpd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x0c }, 0, .vex_128_w0, .avx },
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.{ .vpermilps, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x04 }, 0, .vex_128_w0, .avx },
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.{ .vpermilps, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x0c }, 0, .vex_256_w0, .avx },
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.{ .vpermilps, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x04 }, 0, .vex_256_w0, .avx },
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.{ .vpextrb, .mri, &.{ .r32_m8, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x14 }, 0, .vex_128_w0, .avx },
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.{ .vpextrd, .mri, &.{ .rm32, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x16 }, 0, .vex_128_w0, .avx },
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.{ .vpextrq, .mri, &.{ .rm64, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x16 }, 0, .vex_128_w1, .avx },
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@ -2418,6 +2439,25 @@ pub const table = [_]Entry{
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.{ .vpcmpgtq, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x37 }, 0, .vex_256_wig, .avx2 },
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.{ .vperm2i128, .rvmi, &.{ .ymm, .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x46 }, 0, .vex_256_w0, .avx2 },
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.{ .vpermd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x36 }, 0, .vex_256_w0, .avx2 },
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.{ .vpermpd, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x01 }, 0, .vex_256_w1, .avx2 },
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.{ .vpermps, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x16 }, 0, .vex_256_w0, .avx2 },
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.{ .vpermq, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x00 }, 0, .vex_256_w1, .avx2 },
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.{ .vpmaskmovd, .rvm, &.{ .xmm, .xmm, .m128 }, &.{ 0x66, 0x0f, 0x38, 0x8c }, 0, .vex_128_w0, .avx2 },
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.{ .vpmaskmovd, .rvm, &.{ .ymm, .ymm, .m256 }, &.{ 0x66, 0x0f, 0x38, 0x8c }, 0, .vex_256_w0, .avx2 },
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.{ .vpmaskmovq, .rvm, &.{ .xmm, .xmm, .m128 }, &.{ 0x66, 0x0f, 0x38, 0x8c }, 0, .vex_128_w1, .avx2 },
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.{ .vpmaskmovq, .rvm, &.{ .ymm, .ymm, .m256 }, &.{ 0x66, 0x0f, 0x38, 0x8c }, 0, .vex_256_w1, .avx2 },
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.{ .vpmaskmovd, .mvr, &.{ .m128, .xmm, .xmm }, &.{ 0x66, 0x0f, 0x38, 0x8e }, 0, .vex_128_w0, .avx2 },
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.{ .vpmaskmovd, .mvr, &.{ .m256, .ymm, .ymm }, &.{ 0x66, 0x0f, 0x38, 0x8e }, 0, .vex_256_w0, .avx2 },
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.{ .vpmaskmovq, .mvr, &.{ .m128, .xmm, .xmm }, &.{ 0x66, 0x0f, 0x38, 0x8e }, 0, .vex_128_w1, .avx2 },
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.{ .vpmaskmovq, .mvr, &.{ .m256, .ymm, .ymm }, &.{ 0x66, 0x0f, 0x38, 0x8e }, 0, .vex_256_w1, .avx2 },
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.{ .vpmaxsb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3c }, 0, .vex_256_wig, .avx2 },
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.{ .vpmaxsw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xee }, 0, .vex_256_wig, .avx2 },
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.{ .vpmaxsd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3d }, 0, .vex_256_wig, .avx2 },
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@ -2477,11 +2517,19 @@ pub const table = [_]Entry{
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.{ .vpslldq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 7, .vex_256_wig, .avx2 },
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.{ .vpsllvd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x47 }, 0, .vex_128_w0, .avx2 },
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.{ .vpsllvq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x47 }, 0, .vex_128_w1, .avx2 },
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.{ .vpsllvd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x47 }, 0, .vex_256_w0, .avx2 },
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.{ .vpsllvq, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x47 }, 0, .vex_256_w1, .avx2 },
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.{ .vpsraw, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe1 }, 0, .vex_256_wig, .avx2 },
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.{ .vpsraw, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 4, .vex_256_wig, .avx2 },
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.{ .vpsrad, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe2 }, 0, .vex_256_wig, .avx2 },
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.{ .vpsrad, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 4, .vex_256_wig, .avx2 },
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.{ .vpsravd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x46 }, 0, .vex_128_w0, .avx2 },
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.{ .vpsravd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x46 }, 0, .vex_256_w0, .avx2 },
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.{ .vpsrlw, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd1 }, 0, .vex_256_wig, .avx2 },
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.{ .vpsrlw, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 2, .vex_256_wig, .avx2 },
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.{ .vpsrld, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd2 }, 0, .vex_256_wig, .avx2 },
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@ -2489,7 +2537,12 @@ pub const table = [_]Entry{
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.{ .vpsrlq, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd3 }, 0, .vex_256_wig, .avx2 },
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.{ .vpsrlq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 2, .vex_256_wig, .avx2 },
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.{ .vpsrldq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 3, .vex_128_wig, .avx2 },
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.{ .vpsrldq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 3, .vex_256_wig, .avx2 },
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.{ .vpsrlvd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x45 }, 0, .vex_128_w0, .avx2 },
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.{ .vpsrlvq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x45 }, 0, .vex_128_w1, .avx2 },
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.{ .vpsrlvd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x45 }, 0, .vex_256_w0, .avx2 },
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.{ .vpsrlvq, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x45 }, 0, .vex_256_w1, .avx2 },
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.{ .vpsubb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xf8 }, 0, .vex_256_wig, .avx2 },
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.{ .vpsubw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xf9 }, 0, .vex_256_wig, .avx2 },
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@ -17962,6 +17962,78 @@ fn binary(comptime op: anytype, comptime opts: struct { compare: Compare = .rela
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try testArgs(f128, nan(f128), nan(f128));
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}
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fn testIntVectors() !void {
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try testArgs(@Vector(1, i4), .{
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0x1,
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}, .{
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0x3,
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});
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try testArgs(@Vector(2, i4), .{
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-0x1, 0x7,
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}, .{
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-0x7, 0x6,
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});
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try testArgs(@Vector(4, i4), .{
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-0x1, 0x2, -0x3, -0x6,
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}, .{
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-0x2, -0x6, -0x4, 0x1,
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});
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try testArgs(@Vector(8, i4), .{
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-0x4, 0x6, -0x4, -0x1, -0x1, 0x6, 0x5, 0x2,
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}, .{
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0x2, 0x4, -0x3, -0x6, 0x1, -0x5, -0x1, 0x2,
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});
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// workaround https://github.com/ziglang/zig/issues/22914
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// TODO: try testArgs(@Vector(16, i4), .{
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// 0x4, 0x1, -0x7, -0x2, -0x7, 0x4, -0x4, -0x8, -0x1, 0x0, -0x8, 0x5, -0x5, 0x3, 0x3, 0x2,
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// }, .{
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// 0x7, -0x7, -0x6, -0x1, 0x3, -0x5, -0x3, -0x6, 0x4, 0x4, -0x2, 0x7, -0x2, 0x6, -0x4, -0x1,
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// });
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try testArgs(@Vector(16, i4), .{
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0x7, -0x7, -0x6, -0x1, 0x3, -0x5, -0x3, -0x6, 0x4, 0x4, -0x2, 0x7, -0x2, 0x6, -0x4, -0x1,
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}, .{
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0x4, 0x1, -0x7, -0x2, -0x7, 0x4, -0x4, -0x8, -0x1, 0x1, -0x8, 0x5, -0x5, 0x3, 0x3, 0x2,
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});
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try testArgs(@Vector(32, i4), .{
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0x0, 0x4, 0x0, -0x6, -0x7, 0x4, -0x3, 0x4, -0x5, 0x2, 0x3, 0x2, -0x6, -0x4, -0x4, -0x3,
|
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0x7, -0x5, -0x3, 0x2, -0x4, 0x4, -0x1, 0x6, -0x7, -0x1, -0x6, -0x2, -0x4, -0x2, 0x5, 0x0,
|
||||
}, .{
|
||||
0x5, 0x1, 0x5, 0x7, 0x1, -0x3, 0x3, 0x3, 0x5, 0x4, 0x1, 0x5, 0x4, -0x8, -0x3, -0x6,
|
||||
-0x2, 0x3, 0x1, 0x2, 0x4, 0x4, -0x8, 0x2, 0x6, -0x1, 0x1, 0x3, -0x1, -0x3, 0x7, -0x7,
|
||||
});
|
||||
|
||||
try testArgs(@Vector(1, u4), .{
|
||||
0xe,
|
||||
}, .{
|
||||
0xc,
|
||||
});
|
||||
try testArgs(@Vector(2, u4), .{
|
||||
0x2, 0x5,
|
||||
}, .{
|
||||
0x9, 0xe,
|
||||
});
|
||||
try testArgs(@Vector(4, u4), .{
|
||||
0x2, 0xb, 0xc, 0x7,
|
||||
}, .{
|
||||
0x2, 0xa, 0x8, 0x1,
|
||||
});
|
||||
try testArgs(@Vector(8, u4), .{
|
||||
0xf, 0x9, 0x0, 0x6, 0x8, 0x7, 0xd, 0x7,
|
||||
}, .{
|
||||
0xb, 0xb, 0x3, 0x6, 0x1, 0x5, 0x4, 0xd,
|
||||
});
|
||||
try testArgs(@Vector(16, u4), .{
|
||||
0x5, 0x1, 0xa, 0x6, 0xb, 0x3, 0x0, 0x7, 0x8, 0x0, 0x9, 0xe, 0x2, 0x9, 0x2, 0x5,
|
||||
}, .{
|
||||
0x4, 0x9, 0x4, 0x8, 0x5, 0x7, 0xf, 0x8, 0x3, 0xc, 0x6, 0x9, 0xd, 0xd, 0x2, 0xd,
|
||||
});
|
||||
try testArgs(@Vector(32, u4), .{
|
||||
0xa, 0x5, 0xd, 0x4, 0xe, 0xf, 0xf, 0x2, 0xb, 0x3, 0x9, 0x2, 0x1, 0x9, 0x6, 0x8,
|
||||
0x7, 0xc, 0x3, 0x5, 0x4, 0xb, 0x5, 0x4, 0x8, 0x2, 0x5, 0x9, 0xf, 0x6, 0x7, 0x7,
|
||||
}, .{
|
||||
0xb, 0xf, 0xf, 0xf, 0xb, 0xf, 0xd, 0xc, 0x1, 0xa, 0x1, 0xd, 0x7, 0x4, 0x4, 0x8,
|
||||
0x2, 0xb, 0xb, 0x4, 0xa, 0x7, 0x6, 0xd, 0xb, 0xb, 0x6, 0xb, 0x1, 0x8, 0xa, 0x6,
|
||||
});
|
||||
|
||||
try testArgs(@Vector(1, i8), .{
|
||||
-0x54,
|
||||
}, .{
|
||||
@ -19013,6 +19085,7 @@ inline fn mulUnsafe(comptime Type: type, lhs: Type, rhs: Type) DoubleBits(Type)
|
||||
test mulUnsafe {
|
||||
const test_mul_unsafe = binary(mulUnsafe, .{});
|
||||
try test_mul_unsafe.testInts();
|
||||
try test_mul_unsafe.testIntVectors();
|
||||
}
|
||||
|
||||
inline fn multiply(comptime Type: type, lhs: Type, rhs: Type) @TypeOf(lhs * rhs) {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user