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std.simd: return comptime_int from suggestVectorSize
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@ -82,7 +82,7 @@ pub const HeadersParser = struct {
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/// If the amount returned is less than `bytes.len`, you may assume that the parser is in a content state and the
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/// first byte of content is located at `bytes[result]`.
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pub fn findHeadersEnd(r: *HeadersParser, bytes: []const u8) u32 {
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const vector_len: comptime_int = comptime @max(std.simd.suggestVectorSize(u8) orelse 1, 8);
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const vector_len: comptime_int = @max(std.simd.suggestVectorSize(u8) orelse 1, 8);
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const len = @as(u32, @intCast(bytes.len));
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var index: u32 = 0;
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@ -974,7 +974,7 @@ pub fn indexOfSentinel(comptime T: type, comptime sentinel: T, p: [*:sentinel]co
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// The below branch assumes that reading past the end of the buffer is valid, as long
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// as we don't read into a new page. This should be the case for most architectures
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// which use paged memory, however should be confirmed before adding a new arch below.
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.aarch64, .x86, .x86_64 => if (comptime std.simd.suggestVectorSize(T)) |block_len| {
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.aarch64, .x86, .x86_64 => if (std.simd.suggestVectorSize(T)) |block_len| {
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comptime std.debug.assert(std.mem.page_size % block_len == 0);
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const Block = @Vector(block_len, T);
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const mask: Block = @splat(sentinel);
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@ -1027,7 +1027,7 @@ test "indexOfSentinel vector paths" {
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const allocator = std.testing.allocator;
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inline for (Types) |T| {
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const block_len = comptime std.simd.suggestVectorSize(T) orelse continue;
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const block_len = std.simd.suggestVectorSize(T) orelse continue;
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// Allocate three pages so we guarantee a page-crossing address with a full page after
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const memory = try allocator.alloc(T, 3 * std.mem.page_size / @sizeOf(T));
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@ -1118,11 +1118,11 @@ pub fn indexOfScalarPos(comptime T: type, slice: []const T, start_index: usize,
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!@inComptime() and
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(@typeInfo(T) == .Int or @typeInfo(T) == .Float) and std.math.isPowerOfTwo(@bitSizeOf(T)))
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{
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if (comptime std.simd.suggestVectorSize(T)) |block_len| {
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if (std.simd.suggestVectorSize(T)) |block_len| {
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// For Intel Nehalem (2009) and AMD Bulldozer (2012) or later, unaligned loads on aligned data result
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// in the same execution as aligned loads. We ignore older arch's here and don't bother pre-aligning.
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//
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// Use `comptime std.simd.suggestVectorSize(T)` to get the same alignment as used in this function
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// Use `std.simd.suggestVectorSize(T)` to get the same alignment as used in this function
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// however this usually isn't necessary unless your arch has a performance penalty due to this.
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//
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// This may differ for other arch's. Arm for example costs a cycle when loading across a cache
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@ -6,7 +6,7 @@
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const std = @import("std");
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const builtin = @import("builtin");
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pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?usize {
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pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?comptime_int {
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// This is guesswork, if you have better suggestions can add it or edit the current here
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// This can run in comptime only, but stage 1 fails at it, stage 2 can understand it
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const element_bit_size = @max(8, std.math.ceilPowerOfTwo(u16, @bitSizeOf(T)) catch unreachable);
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@ -55,7 +55,7 @@ pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?
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/// Suggests a target-dependant vector size for a given type, or null if scalars are recommended.
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/// Not yet implemented for every CPU architecture.
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pub fn suggestVectorSize(comptime T: type) ?usize {
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pub fn suggestVectorSize(comptime T: type) ?comptime_int {
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return suggestVectorSizeForCpu(T, builtin.cpu);
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}
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@ -200,7 +200,7 @@ pub fn utf8CountCodepoints(s: []const u8) !usize {
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pub fn utf8ValidateSlice(input: []const u8) bool {
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var remaining = input;
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const V_len = comptime std.simd.suggestVectorSize(usize) orelse 1;
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const V_len = std.simd.suggestVectorSize(usize) orelse 1;
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const V = @Vector(V_len, usize);
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const u8s_in_vector = @sizeOf(usize) * V_len;
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