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x86_64: rewrite arithmetic

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This commit is contained in:
Jacob Young 2024-11-08 08:32:00 -05:00
parent af1191ea8b
commit beadf702b8
4 changed files with 693 additions and 359 deletions
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4
lib/std/mem.zig
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@ -883,8 +883,8 @@ fn SliceTo(comptime T: type, comptime end: std.meta.Elem(T)) type {
@compileError("invalid type given to std.mem.sliceTo: " ++ @typeName(T));
}
/// Takes an array, a pointer to an array, a sentinel-terminated pointer, or a slice and
/// iterates searching for the first occurrence of `end`, returning the scanned slice.
/// Takes a pointer to an array, a sentinel-terminated pointer, or a slice and iterates searching for
/// the first occurrence of `end`, returning the scanned slice.
/// If `end` is not found, the full length of the array/slice/sentinel terminated pointer is returned.
/// If the pointer type is sentinel terminated and `end` matches that terminator, the
/// resulting slice is also sentinel terminated.

1024
src/arch/x86_64/CodeGen.zig
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File diff suppressed because it is too large Load Diff

2
src/arch/x86_64/Mir.zig
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@ -22,7 +22,7 @@ pub const Inst = struct {
/// ___
@"_",
/// Integer __
/// Integer ___
i_,
/// ___ Left

22
src/register_manager.zig
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@ -41,12 +41,12 @@ pub fn RegisterManager(
registers: TrackedRegisters = undefined,
/// Tracks which registers are free (in which case the
/// corresponding bit is set to 1)
free_registers: RegisterBitSet = RegisterBitSet.initFull(),
free_registers: RegisterBitSet = .initFull(),
/// Tracks all registers allocated in the course of this
/// function
allocated_registers: RegisterBitSet = RegisterBitSet.initEmpty(),
allocated_registers: RegisterBitSet = .initEmpty(),
/// Tracks registers which are locked from being allocated
locked_registers: RegisterBitSet = RegisterBitSet.initEmpty(),
locked_registers: RegisterBitSet = .initEmpty(),
const Self = @This();
@ -420,8 +420,8 @@ const MockRegister1 = enum(u2) {
&MockRegister1.allocatable_registers,
);
const gp: RM.RegisterBitSet = blk: {
var set = RM.RegisterBitSet.initEmpty();
const gp = blk: {
var set: RM.RegisterBitSet = .initEmpty();
set.setRangeValue(.{
.start = 0,
.end = allocatable_registers.len,
@ -448,8 +448,8 @@ const MockRegister2 = enum(u2) {
&MockRegister2.allocatable_registers,
);
const gp: RM.RegisterBitSet = blk: {
var set = RM.RegisterBitSet.initEmpty();
const gp = blk: {
var set: RM.RegisterBitSet = .initEmpty();
set.setRangeValue(.{
.start = 0,
.end = allocatable_registers.len,
@ -489,16 +489,16 @@ const MockRegister3 = enum(u3) {
&MockRegister3.allocatable_registers,
);
const gp: RM.RegisterBitSet = blk: {
var set = RM.RegisterBitSet.initEmpty();
const gp = blk: {
var set: RM.RegisterBitSet = .initEmpty();
set.setRangeValue(.{
.start = 0,
.end = gp_regs.len,
}, true);
break :blk set;
};
const ext: RM.RegisterBitSet = blk: {
var set = RM.RegisterBitSet.initEmpty();
const ext = blk: {
var set: RM.RegisterBitSet = .initEmpty();
set.setRangeValue(.{
.start = gp_regs.len,
.end = allocatable_registers.len,