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riscv: float args
This commit is contained in:
David Rubin
parent
031d8248e0
commit
b2cb090c37
@ -5226,13 +5226,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, src_mcv: MCValue) InnerError!
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const src_reg_class = src_reg.class();
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if (src_reg_class == .float) {
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if (dst_reg_class == .float) {
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return self.fail("TODO: genSetReg float -> float", .{});
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}
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assert(dst_reg_class == .int); // a bit of future proofing
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if (src_reg_class == .float and dst_reg_class == .int) {
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// to move from float -> int, we use FMV.X.W
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return self.fail("TODO: genSetReg float -> int", .{});
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}
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@ -6031,6 +6025,7 @@ fn resolveCallingConventionValues(
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} else {
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var ret_tracking: [2]InstTracking = undefined;
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var ret_tracking_i: usize = 0;
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var ret_float_reg_i: usize = 0;
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const classes = mem.sliceTo(&abi.classifySystem(ret_ty, zcu), .none);
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@ -6042,6 +6037,13 @@ fn resolveCallingConventionValues(
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ret_tracking[ret_tracking_i] = InstTracking.init(.{ .register = ret_int_reg });
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ret_tracking_i += 1;
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},
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.float => {
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const ret_float_reg = abi.Registers.Float.function_ret_regs[ret_float_reg_i];
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ret_float_reg_i += 1;
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ret_tracking[ret_tracking_i] = InstTracking.init(.{ .register = ret_float_reg });
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ret_tracking_i += 1;
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},
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.memory => {
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const ret_int_reg = abi.Registers.Integer.function_ret_regs[ret_int_reg_i];
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ret_int_reg_i += 1;
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@ -6076,6 +6078,8 @@ fn resolveCallingConventionValues(
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var arg_mcv: [2]MCValue = undefined;
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var arg_mcv_i: usize = 0;
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var param_float_reg_i: usize = 0;
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const classes = mem.sliceTo(&abi.classifySystem(ty, zcu), .none);
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for (classes) |class| switch (class) {
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@ -6089,6 +6093,16 @@ fn resolveCallingConventionValues(
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arg_mcv[arg_mcv_i] = .{ .register = param_int_reg };
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arg_mcv_i += 1;
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},
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.float => {
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const param_float_regs = abi.Registers.Float.function_arg_regs;
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if (param_float_reg_i >= param_float_regs.len) break;
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const param_float_reg = param_float_regs[param_float_reg_i];
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param_float_reg_i += 1;
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arg_mcv[arg_mcv_i] = .{ .register = param_float_reg };
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arg_mcv_i += 1;
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},
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.memory => {
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const param_int_regs = abi.Registers.Integer.function_arg_regs;
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@ -6118,9 +6132,8 @@ fn resolveCallingConventionValues(
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return result;
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}
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/// TODO support scope overrides. Also note this logic is duplicated with `Module.wantSafety`.
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fn wantSafety(self: *Self) bool {
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return switch (self.bin_file.comp.root_mod.optimize_mode) {
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return switch (self.mod.optimize_mode) {
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.Debug => true,
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.ReleaseSafe => true,
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.ReleaseFast => false,
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@ -124,6 +124,8 @@ pub const Mnemonic = enum {
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fsd,
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fsw,
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fsgnjns,
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pub fn encoding(mnem: Mnemonic) Enc {
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return switch (mnem) {
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// zig fmt: off
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@ -164,6 +166,8 @@ pub const Mnemonic = enum {
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.feqs => .{ .opcode = .OP_FP, .data = .{ .fmt = .{ .funct5 = 0b10100, .fmt = .S, .rm = 0b010 } } },
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.feqd => .{ .opcode = .OP_FP, .data = .{ .fmt = .{ .funct5 = 0b10100, .fmt = .D, .rm = 0b010 } } },
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.fsgnjns => .{ .opcode = .OP_FP, .data = .{ .fmt = .{ .funct5 = 0b00100, .fmt = .S, .rm = 0b000 } } },
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// LOAD
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.ld => .{ .opcode = .LOAD, .data = .{ .fo = .{ .funct3 = 0b011 } } },
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@ -308,6 +312,7 @@ pub const InstEnc = enum {
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.faddd,
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.feqs,
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.feqd,
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.fsgnjns,
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=> .R,
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.ecall,
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@ -132,12 +132,28 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index) Error!struct {
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.pseudo_mv => {
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const rr = inst.data.rr;
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const dst_class = rr.rd.class();
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const src_class = rr.rs.class();
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assert(dst_class == src_class);
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switch (dst_class) {
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.float => {
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try lower.emit(.fsgnjns, &.{
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.{ .reg = rr.rd },
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.{ .reg = rr.rs },
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.{ .reg = rr.rs },
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});
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},
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.int => {
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try lower.emit(.addi, &.{
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.{ .reg = rr.rd },
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.{ .reg = rr.rs },
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.{ .imm = Immediate.s(0) },
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});
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},
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}
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},
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.pseudo_ret => {
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try lower.emit(.jalr, &.{
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@ -7,7 +7,7 @@ const InternPool = @import("../../InternPool.zig");
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const Module = @import("../../Module.zig");
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const assert = std.debug.assert;
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pub const Class = enum { memory, byval, integer, double_integer, fields, none };
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pub const Class = enum { memory, byval, integer, double_integer, fields };
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pub fn classifyType(ty: Type, mod: *Module) Class {
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const target = mod.getTarget();
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@ -93,11 +93,13 @@ pub fn classifyType(ty: Type, mod: *Module) Class {
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}
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}
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pub const SystemClass = enum { integer, float, memory, none };
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/// There are a maximum of 8 possible return slots. Returned values are in
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/// the beginning of the array; unused slots are filled with .none.
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pub fn classifySystem(ty: Type, zcu: *Module) [8]Class {
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var result = [1]Class{.none} ** 8;
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const memory_class = [_]Class{
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pub fn classifySystem(ty: Type, zcu: *Module) [8]SystemClass {
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var result = [1]SystemClass{.none} ** 8;
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const memory_class = [_]SystemClass{
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.memory, .none, .none, .none,
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.none, .none, .none, .none,
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};
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@ -139,6 +141,18 @@ pub fn classifySystem(ty: Type, zcu: *Module) [8]Class {
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}
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unreachable; // support > 128 bit int arguments
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},
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.Float => {
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const target = zcu.getTarget();
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const features = target.cpu.features;
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const float_bits = ty.floatBits(zcu.getTarget());
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const float_reg_size: u32 = if (std.Target.riscv.featureSetHas(features, .d)) 64 else 32;
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if (float_bits <= float_reg_size) {
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result[0] = .float;
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return result;
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}
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unreachable; // support split float args
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},
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.ErrorUnion => {
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const payload_ty = ty.errorUnionPayload(zcu);
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const payload_bits = payload_ty.bitSize(zcu);
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@ -2,6 +2,9 @@ const std = @import("std");
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const DW = std.dwarf;
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const assert = std.debug.assert;
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const testing = std.testing;
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const Target = std.Target;
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const Module = @import("../../Module.zig");
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const Encoding = @import("Encoding.zig");
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const Mir = @import("Mir.zig");
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const abi = @import("abi.zig");
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@ -227,11 +230,13 @@ pub const Register = enum(u8) {
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return @as(u8, reg.id());
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}
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pub fn bitSize(reg: Register) u32 {
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pub fn bitSize(reg: Register, zcu: Module) u32 {
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const features = zcu.getTarget().cpu.features;
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return switch (@intFromEnum(reg)) {
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// zig fmt: off
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@intFromEnum(Register.zero) ... @intFromEnum(Register.x31) => 64,
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@intFromEnum(Register.ft0) ... @intFromEnum(Register.f31) => 32,
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@intFromEnum(Register.ft0) ... @intFromEnum(Register.f31) => if (Target.riscv.featureSetHas(features, .d)) 64 else 32,
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else => unreachable,
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// zig fmt: on
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};
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@ -11148,7 +11148,6 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
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}
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return o.builder.structType(.normal, types[0..types_len]);
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},
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.none => unreachable,
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}
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},
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// TODO investigate C ABI for other architectures
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@ -11406,7 +11405,6 @@ const ParamTypeIterator = struct {
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it.llvm_index += it.types_len - 1;
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return .multiple_llvm_types;
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},
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.none => unreachable,
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}
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},
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// TODO investigate C ABI for other architectures
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