mirror/zig
1
0
Fork 0
mirror of https://github.com/ziglang/zig.git synced 2026-02-15 13:58:27 +00:00
Code Issues Packages Projects Releases Wiki Activity

stage2: add support for zig cc assembler -mcpu option

Browse Source
This commit is contained in:
jacob gw 2021-04-16 18:04:46 -04:00 committed by Andrew Kelley
parent 01a1365857
commit afb9f695b1
1 changed files with 19 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
src/Compilation.zig
View File

@ -2679,25 +2679,29 @@ pub fn addCCArgs(
try argv.append("-fPIC");
}
},
.shared_library, .assembly, .ll, .bc, .unknown, .static_library, .object, .zig => {},
.shared_library, .ll, .bc, .unknown, .static_library, .object, .zig => {},
.assembly => {
// Argh, why doesn't the assembler accept the list of CPU features?!
// I don't see a way to do this other than hard coding everything.
switch (target.cpu.arch) {
.riscv32, .riscv64 => {
if (std.Target.riscv.featureSetHas(target.cpu.features, .relax)) {
try argv.append("-mrelax");
} else {
try argv.append("-mno-relax");
}
},
else => {
// TODO
},
}
if (target.cpu.model.llvm_name) |ln|
try argv.append(try std.fmt.allocPrint(arena, "-mcpu={s}", .{ln}));
},
}
if (out_dep_path) |p| {
try argv.appendSlice(&[_][]const u8{ "-MD", "-MV", "-MF", p });
}
// Argh, why doesn't the assembler accept the list of CPU features?!
// I don't see a way to do this other than hard coding everything.
switch (target.cpu.arch) {
.riscv32, .riscv64 => {
if (std.Target.riscv.featureSetHas(target.cpu.features, .relax)) {
try argv.append("-mrelax");
} else {
try argv.append("-mno-relax");
}
},
else => {
// TODO
},
}
if (target.os.tag == .freestanding) {
try argv.append("-ffreestanding");