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Module: ignore xnack and sramecc features on some gpu models
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@ -6010,6 +6010,10 @@ pub fn addCCArgs(
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// We communicate float ABI to Clang through the dedicated options further down.
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// We communicate float ABI to Clang through the dedicated options further down.
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if (std.mem.eql(u8, llvm_name, "soft-float")) continue;
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if (std.mem.eql(u8, llvm_name, "soft-float")) continue;
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// Ignore these until we figure out how to handle the concept of omitting features.
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// See https://github.com/ziglang/zig/issues/23539
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if (target_util.isDynamicAMDGCNFeature(target, feature)) continue;
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argv.appendSliceAssumeCapacity(&[_][]const u8{ "-Xclang", "-target-feature", "-Xclang" });
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argv.appendSliceAssumeCapacity(&[_][]const u8{ "-Xclang", "-target-feature", "-Xclang" });
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const plus_or_minus = "-+"[@intFromBool(is_enabled)];
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const plus_or_minus = "-+"[@intFromBool(is_enabled)];
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const arg = try std.fmt.allocPrint(arena, "{c}{s}", .{ plus_or_minus, llvm_name });
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const arg = try std.fmt.allocPrint(arena, "{c}{s}", .{ plus_or_minus, llvm_name });
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@ -331,6 +331,10 @@ pub fn create(arena: Allocator, options: CreateOptions) !*Package.Module {
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// Append disabled features after enabled ones, so that their effects aren't overwritten.
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// Append disabled features after enabled ones, so that their effects aren't overwritten.
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for (target.cpu.arch.allFeaturesList()) |feature| {
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for (target.cpu.arch.allFeaturesList()) |feature| {
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if (feature.llvm_name) |llvm_name| {
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if (feature.llvm_name) |llvm_name| {
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// Ignore these until we figure out how to handle the concept of omitting features.
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// See https://github.com/ziglang/zig/issues/23539
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if (target_util.isDynamicAMDGCNFeature(target, feature)) continue;
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const is_enabled = target.cpu.features.isEnabled(feature.index);
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const is_enabled = target.cpu.features.isEnabled(feature.index);
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if (is_enabled) {
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if (is_enabled) {
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@ -474,6 +474,54 @@ pub fn arePointersLogical(target: std.Target, as: AddressSpace) bool {
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};
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};
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}
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}
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pub fn isDynamicAMDGCNFeature(target: std.Target, feature: std.Target.Cpu.Feature) bool {
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if (target.cpu.arch != .amdgcn) return false;
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const sramecc_only = &[_]*const std.Target.Cpu.Model{
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&std.Target.amdgcn.cpu.gfx1010,
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&std.Target.amdgcn.cpu.gfx1011,
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&std.Target.amdgcn.cpu.gfx1012,
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&std.Target.amdgcn.cpu.gfx1013,
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};
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const xnack_or_sramecc = &[_]*const std.Target.Cpu.Model{
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&std.Target.amdgcn.cpu.gfx1030,
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&std.Target.amdgcn.cpu.gfx1031,
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&std.Target.amdgcn.cpu.gfx1032,
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&std.Target.amdgcn.cpu.gfx1033,
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&std.Target.amdgcn.cpu.gfx1034,
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&std.Target.amdgcn.cpu.gfx1035,
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&std.Target.amdgcn.cpu.gfx1036,
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&std.Target.amdgcn.cpu.gfx1100,
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&std.Target.amdgcn.cpu.gfx1101,
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&std.Target.amdgcn.cpu.gfx1102,
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&std.Target.amdgcn.cpu.gfx1103,
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&std.Target.amdgcn.cpu.gfx1150,
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&std.Target.amdgcn.cpu.gfx1151,
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&std.Target.amdgcn.cpu.gfx1152,
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&std.Target.amdgcn.cpu.gfx1153,
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&std.Target.amdgcn.cpu.gfx1200,
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&std.Target.amdgcn.cpu.gfx1201,
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};
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const feature_tag: std.Target.amdgcn.Feature = @enumFromInt(feature.index);
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if (feature_tag == .sramecc) {
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if (std.mem.indexOfScalar(
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*const std.Target.Cpu.Model,
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sramecc_only ++ xnack_or_sramecc,
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target.cpu.model,
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)) |_| return true;
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}
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if (feature_tag == .xnack) {
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if (std.mem.indexOfScalar(
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*const std.Target.Cpu.Model,
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xnack_or_sramecc,
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target.cpu.model,
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)) |_| return true;
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}
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return false;
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}
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pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
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pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
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// LLD does not support ELFv1. Rather than having LLVM produce ELFv1 code and then linking it
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// LLD does not support ELFv1. Rather than having LLVM produce ELFv1 code and then linking it
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// into a broken ELFv2 binary, just force LLVM to use ELFv2 as well. This will break when glibc
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// into a broken ELFv2 binary, just force LLVM to use ELFv2 as well. This will break when glibc
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