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stage2: add inline memset for x86_64 backend
* introduce new Mir tag `mov_mem_index_imm` which selects instruction of the form `OP ptr [reg + rax*1 + imm32], imm32` where the encoded flags select the appropriate ptr width for memory store operation (note that scale is fixed and set at 1)
This commit is contained in:
Jakub Konka
parent
4938fb8f5c
commit
aaa641feba
@ -3148,7 +3148,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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2 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaa }),
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4 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaa }),
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8 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
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else => return self.fail("TODO implement memset", .{}),
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else => return self.genInlineMemset(ty, stack_offset, .{ .immediate = 0xaa }),
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}
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},
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.compare_flags_unsigned => |op| {
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@ -3398,6 +3398,97 @@ fn genInlineMemcpy(
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try self.performReloc(loop_reloc);
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}
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fn genInlineMemset(self: *Self, ty: Type, stack_offset: u32, value: MCValue) InnerError!void {
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try self.register_manager.getReg(.rax, null);
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const abi_size = ty.abiSize(self.target.*);
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const adj_off = stack_offset + abi_size;
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if (adj_off > 128) {
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return self.fail("TODO inline memset with large stack offset", .{});
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}
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const negative_offset = @bitCast(u32, -@intCast(i32, adj_off));
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// We are actually counting `abi_size` bytes; however, we reuse the index register
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// as both the counter and offset scaler, hence we need to subtract one from `abi_size`
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// and count until -1.
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if (abi_size > math.maxInt(i32)) {
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// movabs rax, abi_size - 1
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const payload = try self.addExtra(Mir.Imm64.encode(abi_size - 1));
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_ = try self.addInst(.{
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.tag = .movabs,
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.ops = (Mir.Ops{
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.reg1 = .rax,
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}).encode(),
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.data = .{ .payload = payload },
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});
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} else {
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// mov rax, abi_size - 1
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_ = try self.addInst(.{
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.tag = .mov,
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.ops = (Mir.Ops{
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.reg1 = .rax,
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}).encode(),
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.data = .{ .imm = @truncate(u32, abi_size - 1) },
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});
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}
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// loop:
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// cmp rax, -1
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const loop_start = try self.addInst(.{
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.tag = .cmp,
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.ops = (Mir.Ops{
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.reg1 = .rax,
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}).encode(),
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.data = .{ .imm = @bitCast(u32, @as(i32, -1)) },
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});
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// je end
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const loop_reloc = try self.addInst(.{
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.tag = .cond_jmp_eq_ne,
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.ops = (Mir.Ops{ .flags = 0b01 }).encode(),
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.data = .{ .inst = undefined },
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});
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switch (value) {
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.immediate => |x| {
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if (x > math.maxInt(i32)) {
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return self.fail("TODO inline memset for value immediate larger than 32bits", .{});
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}
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// mov byte ptr [rbp + rax + stack_offset], imm
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const payload = try self.addExtra(Mir.ImmPair{
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.dest_off = negative_offset,
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.operand = @truncate(u32, x),
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});
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_ = try self.addInst(.{
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.tag = .mov_mem_index_imm,
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.ops = (Mir.Ops{
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.reg1 = .rbp,
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}).encode(),
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.data = .{ .payload = payload },
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});
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},
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else => return self.fail("TODO inline memset for value of type {}", .{value}),
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}
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// sub rax, 1
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_ = try self.addInst(.{
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.tag = .sub,
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.ops = (Mir.Ops{
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.reg1 = .rax,
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}).encode(),
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.data = .{ .imm = 1 },
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});
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// jmp loop
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_ = try self.addInst(.{
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.tag = .jmp,
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.ops = (Mir.Ops{ .flags = 0b00 }).encode(),
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.data = .{ .inst = loop_start },
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});
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// end:
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try self.performReloc(loop_reloc);
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}
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fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void {
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switch (mcv) {
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.dead => unreachable,
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@ -3639,7 +3730,7 @@ fn airArrayToSlice(self: *Self, inst: Air.Inst.Index) !void {
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const stack_offset = try self.allocMem(inst, 16, 16);
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const array_ty = ptr_ty.childType();
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const array_len = array_ty.arrayLenIncludingSentinel();
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try self.genSetStack(Type.initTag(.usize), stack_offset + 8, ptr);
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try self.genSetStack(ptr_ty, stack_offset + 8, ptr);
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try self.genSetStack(Type.initTag(.u64), stack_offset + 16, .{ .immediate = array_len });
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break :blk .{ .stack_offset = stack_offset };
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};
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@ -115,6 +115,16 @@ pub fn lowerMir(emit: *Emit) InnerError!void {
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.cmp_scale_imm => try emit.mirArithScaleImm(.cmp, inst),
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.mov_scale_imm => try emit.mirArithScaleImm(.mov, inst),
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.adc_mem_index_imm => try emit.mirArithMemIndexImm(.adc, inst),
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.add_mem_index_imm => try emit.mirArithMemIndexImm(.add, inst),
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.sub_mem_index_imm => try emit.mirArithMemIndexImm(.sub, inst),
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.xor_mem_index_imm => try emit.mirArithMemIndexImm(.xor, inst),
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.and_mem_index_imm => try emit.mirArithMemIndexImm(.@"and", inst),
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.or_mem_index_imm => try emit.mirArithMemIndexImm(.@"or", inst),
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.sbb_mem_index_imm => try emit.mirArithMemIndexImm(.sbb, inst),
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.cmp_mem_index_imm => try emit.mirArithMemIndexImm(.cmp, inst),
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.mov_mem_index_imm => try emit.mirArithMemIndexImm(.mov, inst),
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.movabs => try emit.mirMovabs(inst),
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.lea => try emit.mirLea(inst),
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@ -549,6 +559,29 @@ fn mirArithScaleImm(emit: *Emit, tag: Tag, inst: Mir.Inst.Index) InnerError!void
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}), imm_pair.operand, emit.code) catch |err| emit.failWithLoweringError(err);
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}
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fn mirArithMemIndexImm(emit: *Emit, tag: Tag, inst: Mir.Inst.Index) InnerError!void {
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const ops = Mir.Ops.decode(emit.mir.instructions.items(.ops)[inst]);
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assert(ops.reg2 == .none);
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const payload = emit.mir.instructions.items(.data)[inst].payload;
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const imm_pair = emit.mir.extraData(Mir.ImmPair, payload).data;
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const ptr_size: Memory.PtrSize = switch (ops.flags) {
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0b00 => .byte_ptr,
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0b01 => .word_ptr,
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0b10 => .dword_ptr,
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0b11 => .qword_ptr,
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};
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const scale_index = ScaleIndex{
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.scale = 0,
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.index = .rax,
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};
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// OP ptr [reg1 + rax*1 + imm32], imm32
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return lowerToMiEnc(tag, RegisterOrMemory.mem(ptr_size, .{
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.disp = imm_pair.dest_off,
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.base = ops.reg1,
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.scale_index = scale_index,
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}), imm_pair.operand, emit.code) catch |err| emit.failWithLoweringError(err);
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}
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fn mirMovabs(emit: *Emit, inst: Mir.Inst.Index) InnerError!void {
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const tag = emit.mir.instructions.items(.tag)[inst];
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assert(tag == .movabs);
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@ -79,6 +79,13 @@ pub const Inst = struct {
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/// * Data field `payload` points at `ImmPair`.
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adc_scale_imm,
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/// ops flags: form:
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/// 0b00 byte ptr [reg1 + rax + imm32], imm8
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/// 0b01 word ptr [reg1 + rax + imm32], imm16
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/// 0b10 dword ptr [reg1 + rax + imm32], imm32
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/// 0b11 qword ptr [reg1 + rax + imm32], imm32 (sign-extended to imm64)
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adc_mem_index_imm,
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// The following instructions all have the same encoding as `adc`.
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add,
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@ -86,81 +93,97 @@ pub const Inst = struct {
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add_scale_src,
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add_scale_dst,
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add_scale_imm,
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add_mem_index_imm,
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sub,
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sub_mem_imm,
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sub_scale_src,
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sub_scale_dst,
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sub_scale_imm,
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sub_mem_index_imm,
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xor,
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xor_mem_imm,
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xor_scale_src,
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xor_scale_dst,
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xor_scale_imm,
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xor_mem_index_imm,
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@"and",
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and_mem_imm,
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and_scale_src,
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and_scale_dst,
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and_scale_imm,
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and_mem_index_imm,
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@"or",
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or_mem_imm,
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or_scale_src,
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or_scale_dst,
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or_scale_imm,
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or_mem_index_imm,
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rol,
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rol_mem_imm,
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rol_scale_src,
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rol_scale_dst,
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rol_scale_imm,
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rol_mem_index_imm,
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ror,
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ror_mem_imm,
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ror_scale_src,
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ror_scale_dst,
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ror_scale_imm,
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ror_mem_index_imm,
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rcl,
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rcl_mem_imm,
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rcl_scale_src,
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rcl_scale_dst,
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rcl_scale_imm,
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rcl_mem_index_imm,
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rcr,
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rcr_mem_imm,
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rcr_scale_src,
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rcr_scale_dst,
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rcr_scale_imm,
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rcr_mem_index_imm,
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shl,
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shl_mem_imm,
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shl_scale_src,
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shl_scale_dst,
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shl_scale_imm,
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shl_mem_index_imm,
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sal,
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sal_mem_imm,
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sal_scale_src,
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sal_scale_dst,
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sal_scale_imm,
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sal_mem_index_imm,
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shr,
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shr_mem_imm,
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shr_scale_src,
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shr_scale_dst,
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shr_scale_imm,
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shr_mem_index_imm,
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sar,
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sar_mem_imm,
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sar_scale_src,
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sar_scale_dst,
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sar_scale_imm,
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sar_mem_index_imm,
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sbb,
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sbb_mem_imm,
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sbb_scale_src,
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sbb_scale_dst,
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sbb_scale_imm,
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sbb_mem_index_imm,
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cmp,
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cmp_mem_imm,
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cmp_scale_src,
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cmp_scale_dst,
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cmp_scale_imm,
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cmp_mem_index_imm,
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mov,
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mov_mem_imm,
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mov_scale_src,
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mov_scale_dst,
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mov_scale_imm,
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mov_mem_index_imm,
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/// ops flags: form:
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/// 0b00 reg1, [reg2 + imm32]
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@ -64,6 +64,7 @@ pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap
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.@"or" => try print.mirArith(.@"or", inst, w),
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.sbb => try print.mirArith(.sbb, inst, w),
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.cmp => try print.mirArith(.cmp, inst, w),
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.mov => try print.mirArith(.mov, inst, w),
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.adc_mem_imm => try print.mirArithMemImm(.adc, inst, w),
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.add_mem_imm => try print.mirArithMemImm(.add, inst, w),
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@ -73,6 +74,7 @@ pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap
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.or_mem_imm => try print.mirArithMemImm(.@"or", inst, w),
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.sbb_mem_imm => try print.mirArithMemImm(.sbb, inst, w),
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.cmp_mem_imm => try print.mirArithMemImm(.cmp, inst, w),
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.mov_mem_imm => try print.mirArithMemImm(.mov, inst, w),
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.adc_scale_src => try print.mirArithScaleSrc(.adc, inst, w),
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.add_scale_src => try print.mirArithScaleSrc(.add, inst, w),
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@ -82,6 +84,7 @@ pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap
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.or_scale_src => try print.mirArithScaleSrc(.@"or", inst, w),
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.sbb_scale_src => try print.mirArithScaleSrc(.sbb, inst, w),
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.cmp_scale_src => try print.mirArithScaleSrc(.cmp, inst, w),
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.mov_scale_src => try print.mirArithScaleSrc(.mov, inst, w),
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.adc_scale_dst => try print.mirArithScaleDst(.adc, inst, w),
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.add_scale_dst => try print.mirArithScaleDst(.add, inst, w),
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@ -91,6 +94,7 @@ pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap
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.or_scale_dst => try print.mirArithScaleDst(.@"or", inst, w),
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.sbb_scale_dst => try print.mirArithScaleDst(.sbb, inst, w),
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.cmp_scale_dst => try print.mirArithScaleDst(.cmp, inst, w),
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.mov_scale_dst => try print.mirArithScaleDst(.mov, inst, w),
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.adc_scale_imm => try print.mirArithScaleImm(.adc, inst, w),
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.add_scale_imm => try print.mirArithScaleImm(.add, inst, w),
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@ -100,11 +104,18 @@ pub fn printMir(print: *const Print, w: anytype, mir_to_air_map: std.AutoHashMap
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.or_scale_imm => try print.mirArithScaleImm(.@"or", inst, w),
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.sbb_scale_imm => try print.mirArithScaleImm(.sbb, inst, w),
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.cmp_scale_imm => try print.mirArithScaleImm(.cmp, inst, w),
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.mov => try print.mirArith(.mov, inst, w),
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.mov_scale_src => try print.mirArithScaleSrc(.mov, inst, w),
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.mov_scale_dst => try print.mirArithScaleDst(.mov, inst, w),
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.mov_scale_imm => try print.mirArithScaleImm(.mov, inst, w),
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.adc_mem_index_imm => try print.mirArithMemIndexImm(.adc, inst, w),
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.add_mem_index_imm => try print.mirArithMemIndexImm(.add, inst, w),
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.sub_mem_index_imm => try print.mirArithMemIndexImm(.sub, inst, w),
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.xor_mem_index_imm => try print.mirArithMemIndexImm(.xor, inst, w),
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.and_mem_index_imm => try print.mirArithMemIndexImm(.@"and", inst, w),
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.or_mem_index_imm => try print.mirArithMemIndexImm(.@"or", inst, w),
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.sbb_mem_index_imm => try print.mirArithMemIndexImm(.sbb, inst, w),
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.cmp_mem_index_imm => try print.mirArithMemIndexImm(.cmp, inst, w),
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.mov_mem_index_imm => try print.mirArithMemIndexImm(.mov, inst, w),
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.movabs => try print.mirMovabs(inst, w),
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.lea => try print.mirLea(inst, w),
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@ -316,11 +327,11 @@ fn mirArithScaleDst(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index
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if (ops.reg2 == .none) {
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// OP [reg1 + scale*rax + 0], imm32
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try w.print("{s} [{s} + {d}*rcx + 0], {d}\n", .{ @tagName(tag), @tagName(ops.reg1), scale, imm });
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try w.print("{s} [{s} + {d}*rax + 0], {d}\n", .{ @tagName(tag), @tagName(ops.reg1), scale, imm });
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}
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// OP [reg1 + scale*rax + imm32], reg2
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try w.print("{s} [{s} + {d}*rcx + {d}], {s}\n", .{ @tagName(tag), @tagName(ops.reg1), scale, imm, @tagName(ops.reg2) });
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try w.print("{s} [{s} + {d}*rax + {d}], {s}\n", .{ @tagName(tag), @tagName(ops.reg1), scale, imm, @tagName(ops.reg2) });
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}
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fn mirArithScaleImm(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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@ -328,7 +339,21 @@ fn mirArithScaleImm(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index
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const scale = ops.flags;
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const payload = print.mir.instructions.items(.data)[inst].payload;
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const imm_pair = print.mir.extraData(Mir.ImmPair, payload).data;
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try w.print("{s} [{s} + {d}*rcx + {d}], {d}\n", .{ @tagName(tag), @tagName(ops.reg1), scale, imm_pair.dest_off, imm_pair.operand });
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try w.print("{s} [{s} + {d}*rax + {d}], {d}\n", .{ @tagName(tag), @tagName(ops.reg1), scale, imm_pair.dest_off, imm_pair.operand });
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}
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fn mirArithMemIndexImm(print: *const Print, tag: Mir.Inst.Tag, inst: Mir.Inst.Index, w: anytype) !void {
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const ops = Mir.Ops.decode(print.mir.instructions.items(.ops)[inst]);
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const payload = print.mir.instructions.items(.data)[inst].payload;
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const imm_pair = print.mir.extraData(Mir.ImmPair, payload).data;
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try w.print("{s} ", .{@tagName(tag)});
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switch (ops.flags) {
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0b00 => try w.print("byte ptr ", .{}),
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0b01 => try w.print("word ptr ", .{}),
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0b10 => try w.print("dword ptr ", .{}),
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0b11 => try w.print("qword ptr ", .{}),
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}
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try w.print("[{s} + 1*rax + {d}], {d}\n", .{ @tagName(ops.reg1), imm_pair.dest_off, imm_pair.operand });
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}
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fn mirMovabs(print: *const Print, inst: Mir.Inst.Index, w: anytype) !void {
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