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Merge pull request #20823 from alexrp/start-pie-mips-ppc
`std.os.linux.start_pie`: Add mips and powerpc support
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commit
9c22a6b3ad
@ -12,6 +12,8 @@ const R_CSKY_RELATIVE = 9;
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const R_HEXAGON_RELATIVE = 35;
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const R_LARCH_RELATIVE = 3;
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const R_68K_RELATIVE = 22;
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const R_MIPS_RELATIVE = 128;
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const R_PPC_RELATIVE = 22;
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const R_RISCV_RELATIVE = 3;
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const R_390_RELATIVE = 12;
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const R_SPARC_RELATIVE = 22;
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@ -26,6 +28,8 @@ const R_RELATIVE = switch (builtin.cpu.arch) {
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.hexagon => R_HEXAGON_RELATIVE,
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.loongarch32, .loongarch64 => R_LARCH_RELATIVE,
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.m68k => R_68K_RELATIVE,
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.mips, .mipsel, .mips64, .mips64el => R_MIPS_RELATIVE,
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.powerpc, .powerpcle, .powerpc64, .powerpc64le => R_PPC_RELATIVE,
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.riscv32, .riscv64 => R_RISCV_RELATIVE,
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.s390x => R_390_RELATIVE,
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else => @compileError("Missing R_RELATIVE definition for this target"),
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@ -34,7 +38,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {
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// Obtain a pointer to the _DYNAMIC array.
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// We have to compute its address as a PC-relative quantity not to require a
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// relocation that, at this point, is not yet applied.
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fn getDynamicSymbol() [*]elf.Dyn {
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inline fn getDynamicSymbol() [*]elf.Dyn {
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return switch (builtin.cpu.arch) {
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.x86 => asm volatile (
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\\ .weak _DYNAMIC
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@ -111,6 +115,57 @@ fn getDynamicSymbol() [*]elf.Dyn {
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\\ lea (%[ret], %%pc), %[ret]
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: [ret] "=r" (-> [*]elf.Dyn),
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),
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.mips, .mipsel => asm volatile (
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\\ .weak _DYNAMIC
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\\ .hidden _DYNAMIC
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\\ bal 1f
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\\ .gpword _DYNAMIC
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\\ 1:
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\\ lw %[ret], 0($ra)
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\\ addu %[ret], %[ret], $gp
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: [ret] "=r" (-> [*]elf.Dyn),
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:
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: "lr"
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),
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.mips64, .mips64el => asm volatile (
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\\ .weak _DYNAMIC
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\\ .hidden _DYNAMIC
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\\ .balign 8
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\\ bal 1f
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\\ .gpdword _DYNAMIC
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\\ 1:
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\\ ld %[ret], 0($ra)
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\\ daddu %[ret], %[ret], $gp
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: [ret] "=r" (-> [*]elf.Dyn),
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:
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: "lr"
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),
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.powerpc, .powerpcle => asm volatile (
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\\ .weak _DYNAMIC
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\\ .hidden _DYNAMIC
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\\ bl 1f
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\\ .long _DYNAMIC - .
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\\ 1:
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\\ mflr %[ret]
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\\ lwz 4, 0(%[ret])
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\\ add %[ret], 4, %[ret]
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: [ret] "=r" (-> [*]elf.Dyn),
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:
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: "lr", "r4"
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),
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.powerpc64, .powerpc64le => asm volatile (
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\\ .weak _DYNAMIC
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\\ .hidden _DYNAMIC
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\\ bl 1f
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\\ .quad _DYNAMIC - .
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\\ 1:
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\\ mflr %[ret]
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\\ ld 4, 0(%[ret])
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\\ add %[ret], 4, %[ret]
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: [ret] "=r" (-> [*]elf.Dyn),
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:
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: "lr", "r4"
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),
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.riscv32, .riscv64 => asm volatile (
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\\ .weak _DYNAMIC
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\\ .hidden _DYNAMIC
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@ -121,9 +176,9 @@ fn getDynamicSymbol() [*]elf.Dyn {
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\\ .weak _DYNAMIC
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\\ .hidden _DYNAMIC
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\\ larl %[ret], 1f
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\\ agf %[ret], 0(%[ret])
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\\ ag %[ret], 0(%[ret])
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\\ b 2f
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\\ 1: .long _DYNAMIC - .
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\\ 1: .quad _DYNAMIC - .
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\\ 2:
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: [ret] "=r" (-> [*]elf.Dyn),
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),
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@ -138,6 +193,7 @@ pub fn relocate(phdrs: []elf.Phdr) void {
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@disableInstrumentation();
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const dynv = getDynamicSymbol();
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// Recover the delta applied by the loader by comparing the effective and
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// the theoretical load addresses for the `_DYNAMIC` symbol.
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const base_addr = base: {
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@ -149,34 +205,63 @@ pub fn relocate(phdrs: []elf.Phdr) void {
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@trap();
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};
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var rel_addr: usize = 0;
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var rela_addr: usize = 0;
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var rel_size: usize = 0;
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var rela_size: usize = 0;
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var sorted_dynv: [elf.DT_NUM]elf.Addr = undefined;
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// Zero-initialized this way to prevent the compiler from turning this into
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// `memcpy` or `memset` calls (which can require relocations).
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for (&sorted_dynv) |*dyn| {
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const pdyn: *volatile elf.Addr = @ptrCast(dyn);
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pdyn.* = 0;
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}
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{
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// `dynv` has no defined order. Fix that.
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var i: usize = 0;
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while (dynv[i].d_tag != elf.DT_NULL) : (i += 1) {
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switch (dynv[i].d_tag) {
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elf.DT_REL => rel_addr = base_addr + dynv[i].d_val,
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elf.DT_RELA => rela_addr = base_addr + dynv[i].d_val,
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elf.DT_RELSZ => rel_size = dynv[i].d_val,
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elf.DT_RELASZ => rela_size = dynv[i].d_val,
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else => {},
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}
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if (dynv[i].d_tag < elf.DT_NUM) sorted_dynv[@bitCast(dynv[i].d_tag)] = dynv[i].d_val;
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}
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}
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// Apply the relocations.
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if (rel_addr != 0) {
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const rel = std.mem.bytesAsSlice(elf.Rel, @as([*]u8, @ptrFromInt(rel_addr))[0..rel_size]);
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for (rel) |r| {
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// Deal with the GOT relocations that MIPS uses first.
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if (builtin.cpu.arch.isMIPS()) {
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const count: elf.Addr = blk: {
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// This is an architecture-specific tag, so not part of `sorted_dynv`.
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var i: usize = 0;
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while (dynv[i].d_tag != elf.DT_NULL) : (i += 1) {
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if (dynv[i].d_tag == elf.DT_MIPS_LOCAL_GOTNO) break :blk dynv[i].d_val;
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}
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break :blk 0;
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};
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const got: [*]usize = @ptrFromInt(base_addr + sorted_dynv[elf.DT_PLTGOT]);
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for (0..count) |i| {
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got[i] += base_addr;
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}
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}
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// Apply normal relocations.
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const rel = sorted_dynv[elf.DT_REL];
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if (rel != 0) {
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const rels = @call(.always_inline, std.mem.bytesAsSlice, .{
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elf.Rel,
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@as([*]u8, @ptrFromInt(base_addr + rel))[0..sorted_dynv[elf.DT_RELSZ]],
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});
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for (rels) |r| {
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if (r.r_type() != R_RELATIVE) continue;
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@as(*usize, @ptrFromInt(base_addr + r.r_offset)).* += base_addr;
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}
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}
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if (rela_addr != 0) {
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const rela = std.mem.bytesAsSlice(elf.Rela, @as([*]u8, @ptrFromInt(rela_addr))[0..rela_size]);
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for (rela) |r| {
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const rela = sorted_dynv[elf.DT_RELA];
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if (rela != 0) {
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const relas = @call(.always_inline, std.mem.bytesAsSlice, .{
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elf.Rela,
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@as([*]u8, @ptrFromInt(base_addr + rela))[0..sorted_dynv[elf.DT_RELASZ]],
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});
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for (relas) |r| {
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if (r.r_type() != R_RELATIVE) continue;
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@as(*usize, @ptrFromInt(base_addr + r.r_offset)).* = base_addr + @as(usize, @bitCast(r.r_addend));
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}
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