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stage2 RISCV64: remove MCValue.compare_flags_(un)signed
These status flags do not exist in the RISCV architecture
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@ -119,12 +119,6 @@ const MCValue = union(enum) {
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stack_offset: u32,
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/// The value is a pointer to one of the stack variables (payload is stack offset).
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ptr_stack_offset: u32,
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/// The value is in the compare flags assuming an unsigned operation,
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/// with this operator applied on top of it.
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compare_flags_unsigned: math.CompareOperator,
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/// The value is in the compare flags assuming a signed operation,
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/// with this operator applied on top of it.
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compare_flags_signed: math.CompareOperator,
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fn isMemory(mcv: MCValue) bool {
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return switch (mcv) {
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@ -149,8 +143,6 @@ const MCValue = union(enum) {
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.immediate,
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.embedded_in_code,
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.memory,
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.compare_flags_unsigned,
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.compare_flags_signed,
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.ptr_stack_offset,
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.ptr_embedded_in_code,
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.undef,
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@ -844,45 +836,8 @@ fn airBoolToInt(self: *Self, inst: Air.Inst.Index) !void {
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fn airNot(self: *Self, inst: Air.Inst.Index) !void {
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const ty_op = self.air.instructions.items(.data)[inst].ty_op;
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const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
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const operand = try self.resolveInst(ty_op.operand);
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switch (operand) {
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.dead => unreachable,
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.unreach => unreachable,
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.compare_flags_unsigned => |op| {
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const r = MCValue{
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.compare_flags_unsigned = switch (op) {
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.gte => .lt,
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.gt => .lte,
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.neq => .eq,
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.lt => .gte,
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.lte => .gt,
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.eq => .neq,
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},
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};
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break :result r;
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},
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.compare_flags_signed => |op| {
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const r = MCValue{
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.compare_flags_signed = switch (op) {
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.gte => .lt,
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.gt => .lte,
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.neq => .eq,
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.lt => .gte,
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.lte => .gt,
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.eq => .neq,
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},
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};
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break :result r;
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},
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else => {},
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}
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return self.fail("TODO implement NOT for {}", .{self.target.cpu.arch});
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};
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_ = result;
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// return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
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const result: MCValue = if (self.liveness.isUnused(inst)) .dead else return self.fail("TODO implement NOT for {}", .{self.target.cpu.arch});
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return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
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}
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fn airMin(self: *Self, inst: Air.Inst.Index) !void {
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@ -1211,8 +1166,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
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.undef => unreachable,
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.unreach => unreachable,
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.dead => unreachable,
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.compare_flags_unsigned => unreachable,
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.compare_flags_signed => unreachable,
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.immediate => |imm| try self.setRegOrMem(elem_ty, dst_mcv, .{ .memory = imm }),
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.ptr_stack_offset => |off| try self.setRegOrMem(elem_ty, dst_mcv, .{ .stack_offset = off }),
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.ptr_embedded_in_code => |off| {
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@ -1271,8 +1224,6 @@ fn airStore(self: *Self, inst: Air.Inst.Index) !void {
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.undef => unreachable,
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.unreach => unreachable,
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.dead => unreachable,
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.compare_flags_unsigned => unreachable,
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.compare_flags_signed => unreachable,
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.immediate => |imm| {
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try self.setRegOrMem(elem_ty, .{ .memory = imm }, value);
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},
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@ -1427,8 +1378,6 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
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.dead => unreachable,
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.embedded_in_code => unreachable,
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.memory => unreachable,
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.compare_flags_signed => unreachable,
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.compare_flags_unsigned => unreachable,
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.register => |reg| {
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try self.register_manager.getReg(reg, null);
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try self.genSetReg(arg_ty, reg, arg_mcv);
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