From 8f1408578cb255fbbdc555d746b25cefb331105e Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 16 Dec 2020 17:25:48 -0700 Subject: [PATCH] update the CPU target features and models Rather than directly pasting the output from the target-details-generator tool, we have to look at the diff line by line and decide how to incorporate the changes. The baseline abstraction is something that Zig provides. The changes to x86 appear to be incorrect. After LLVM commit 3ad09fd03c51823aeb0bcbd7898aada33e9228d6 the CPU features are stored in a different data layout in their tables, and so we need to update the target details extraction tool to match. --- lib/std/target.zig | 8 +- lib/std/target/aarch64.zig | 732 +++++++----------- lib/std/target/amdgpu.zig | 11 +- lib/std/target/arm.zig | 1464 ++++++++++++++++-------------------- lib/std/target/avr.zig | 4 +- lib/std/target/bpf.zig | 1 - lib/std/target/hexagon.zig | 1 - lib/std/target/mips.zig | 1 - lib/std/target/msp430.zig | 1 - lib/std/target/nvptx.zig | 1 - lib/std/target/powerpc.zig | 91 ++- lib/std/target/riscv.zig | 24 +- lib/std/target/sparc.zig | 6 - lib/std/target/systemz.zig | 1 - lib/std/target/wasm.zig | 1 - lib/std/target/x86.zig | 20 - src/codegen.zig | 6 +- 17 files changed, 1029 insertions(+), 1344 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index ef07f356b3..08fecd7a82 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -551,7 +551,7 @@ pub const Target = struct { pub const Set = struct { ints: [usize_count]usize, - pub const needed_bit_count = 192; + pub const needed_bit_count = 172; pub const byte_count = (needed_bit_count + 7) / 8; pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize); pub const Index = std.math.Log2Int(std.meta.Int(.unsigned, usize_count * @bitSizeOf(usize))); @@ -1149,9 +1149,9 @@ pub const Target = struct { pub fn baseline(arch: Arch) *const Model { return switch (arch) { - // .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline, // TODO removed in LLVM 12 - // .riscv32 => &riscv.cpu.baseline_rv32, // TODO removed in LLVM 12 - // .riscv64 => &riscv.cpu.baseline_rv64, // TODO removed in LLVM 12 + .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline, + .riscv32 => &riscv.cpu.baseline_rv32, + .riscv64 => &riscv.cpu.baseline_rv64, .i386 => &x86.cpu.pentium4, .nvptx, .nvptx64 => &nvptx.cpu.sm_20, diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 5a5eaf5e18..abf7f09943 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -8,18 +8,9 @@ const CpuFeature = std.Target.Cpu.Feature; const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { - CONTEXTIDREL2, - a35, - a53, - a55, - a57, - a64fx, + a34, a65, - a72, - a73, - a75, a76, - a77, aes, aggressive_fma, alternate_sextload_cvt_f32_pattern, @@ -45,14 +36,11 @@ pub const Feature = enum { call_saved_x18, call_saved_x8, call_saved_x9, - carmel, ccdp, ccidx, ccpp, complxnum, - cortex_a78, - cortex_r82, - cortex_x1, + context_id_rel2, crc, crypto, custom_cheap_as_move, @@ -62,11 +50,9 @@ pub const Feature = enum { ecv, ete, exynos_cheap_as_move, - exynosm3, exynosm4, f32mm, f64mm, - falkor, fgt, fmi, force_32bit_jump_tables, @@ -82,19 +68,18 @@ pub const Feature = enum { fuse_literals, harden_sls_blr, harden_sls_retbr, - _i8mm, + i8mm, jsconv, - kryo, lor, lse, lsl_fast, mpam, mte, neon, - neoversee1, - neoversen1, - neoversen2, - neoversev1, + neoverse_e1, + neoverse_n1, + neoverse_n2, + neoverse_v1, no_neg_immediates, nv, outline_atomics, @@ -135,7 +120,6 @@ pub const Feature = enum { reserve_x6, reserve_x7, reserve_x9, - saphira, sb, sel2, sha2, @@ -155,12 +139,6 @@ pub const Feature = enum { sve2_sha3, sve2_sm4, tagged_globals, - thunderx, - thunderx2t99, - thunderx3t110, - thunderxt81, - thunderxt83, - thunderxt88, tlb_rmi, tme, tpidr_el1, @@ -168,12 +146,12 @@ pub const Feature = enum { tpidr_el3, tracev8_4, trbe, - tsv110, uaops, use_aa, use_experimental_zeroing_pseudos, use_postra_scheduler, use_reciprocal_square_root, + v8a, v8_1a, v8_2a, v8_3a, @@ -192,87 +170,18 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); + @setEvalBranchQuota(2000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; - result[@enumToInt(Feature.CONTEXTIDREL2)] = .{ - .llvm_name = "CONTEXTIDREL2", - .description = "Enable RW operand CONTEXTIDR_EL2", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a35)] = .{ + result[@enumToInt(Feature.a34)] = .{ .llvm_name = "a35", - .description = "Cortex-A35 ARM processors", + .description = "Cortex-A34 ARM processors", .dependencies = featureSet(&[_]Feature{ .crc, .crypto, - .fp_armv8, - .neon, .perfmon, - }), - }; - result[@enumToInt(Feature.a53)] = .{ - .llvm_name = "a53", - .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - .use_aa, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.a55)] = .{ - .llvm_name = "a55", - .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, - }), - }; - result[@enumToInt(Feature.a57)] = .{ - .llvm_name = "a57", - .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .fuse_literals, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.a64fx)] = .{ - .llvm_name = "a64fx", - .description = "Fujitsu A64FX processors", - .dependencies = featureSet(&[_]Feature{ - .complxnum, - .fp_armv8, - .fullfp16, - .neon, - .perfmon, - .sha2, - .sve, - .use_postra_scheduler, - .v8_2a, + .v8a, }), }; result[@enumToInt(Feature.a65)] = .{ @@ -290,72 +199,18 @@ pub const all_features = blk: { .v8_2a, }), }; - result[@enumToInt(Feature.a72)] = .{ - .llvm_name = "a72", - .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a73)] = .{ - .llvm_name = "a73", - .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a75)] = .{ - .llvm_name = "a75", - .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, - }), - }; result[@enumToInt(Feature.a76)] = .{ .llvm_name = "a76", .description = "Cortex-A76 ARM processors", .dependencies = featureSet(&[_]Feature{ .crypto, .dotprod, - .fp_armv8, .fullfp16, - .neon, .rcpc, .ssbs, .v8_2a, }), }; - result[@enumToInt(Feature.a77)] = .{ - .llvm_name = "a77", - .description = "Cortex-A77 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .neon, - .rcpc, - .v8_2a, - }), - }; result[@enumToInt(Feature.aes)] = .{ .llvm_name = "aes", .description = "Enable AES support", @@ -564,16 +419,6 @@ pub const all_features = blk: { .description = "Make X9 callee saved.", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.carmel)] = .{ - .llvm_name = "carmel", - .description = "Nvidia Carmel processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .fullfp16, - .neon, - .v8_2a, - }), - }; result[@enumToInt(Feature.ccdp)] = .{ .llvm_name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", @@ -596,48 +441,10 @@ pub const all_features = blk: { .neon, }), }; - result[@enumToInt(Feature.cortex_a78)] = .{ - .llvm_name = "cortex-a78", - .description = "Cortex-A78 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .spe, - .ssbs, - .use_postra_scheduler, - .v8_2a, - }), - }; - result[@enumToInt(Feature.cortex_r82)] = .{ - .llvm_name = "cortex-r82", - .description = "Cortex-R82 ARM Processors", - .dependencies = featureSet(&[_]Feature{ - .use_postra_scheduler, - .v8r, - }), - }; - result[@enumToInt(Feature.cortex_x1)] = .{ - .llvm_name = "cortex-x1", - .description = "Cortex-X1 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .spe, - .use_postra_scheduler, - .v8_2a, - }), + result[@enumToInt(Feature.context_id_rel2)] = .{ + .llvm_name = "CONTEXTIDREL2", + .description = "Enable RW operand CONTEXTIDR_EL2", + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crc)] = .{ .llvm_name = "crc", @@ -692,25 +499,6 @@ pub const all_features = blk: { .custom_cheap_as_move, }), }; - result[@enumToInt(Feature.exynosm3)] = .{ - .llvm_name = "exynosm3", - .description = "Samsung Exynos-M3 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_address, - .fuse_aes, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz_fp, - }), - }; result[@enumToInt(Feature.exynosm4)] = .{ .llvm_name = "exynosm4", .description = "Samsung Exynos-M4 processors", @@ -748,24 +536,6 @@ pub const all_features = blk: { .sve, }), }; - result[@enumToInt(Feature.falkor)] = .{ - .llvm_name = "falkor", - .description = "Qualcomm Falkor processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .rdm, - .slow_strqro_store, - .use_postra_scheduler, - .zcz, - }), - }; result[@enumToInt(Feature.fgt)] = .{ .llvm_name = "fgt", .description = "Enable fine grained virtualization traps extension", @@ -845,7 +615,7 @@ pub const all_features = blk: { .description = "Harden against straight line speculation across RET and BR instructions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature._i8mm)] = .{ + result[@enumToInt(Feature.i8mm)] = .{ .llvm_name = "i8mm", .description = "Enable Matrix Multiply Int8 Extension", .dependencies = featureSet(&[_]Feature{}), @@ -857,22 +627,6 @@ pub const all_features = blk: { .fp_armv8, }), }; - result[@enumToInt(Feature.kryo)] = .{ - .llvm_name = "kryo", - .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz, - }), - }; result[@enumToInt(Feature.lor)] = .{ .llvm_name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", @@ -905,7 +659,7 @@ pub const all_features = blk: { .fp_armv8, }), }; - result[@enumToInt(Feature.neoversee1)] = .{ + result[@enumToInt(Feature.neoverse_e1)] = .{ .llvm_name = "neoversee1", .description = "Neoverse E1 ARM processors", .dependencies = featureSet(&[_]Feature{ @@ -919,7 +673,7 @@ pub const all_features = blk: { .v8_2a, }), }; - result[@enumToInt(Feature.neoversen1)] = .{ + result[@enumToInt(Feature.neoverse_n1)] = .{ .llvm_name = "neoversen1", .description = "Neoverse N1 ARM processors", .dependencies = featureSet(&[_]Feature{ @@ -934,13 +688,13 @@ pub const all_features = blk: { .v8_2a, }), }; - result[@enumToInt(Feature.neoversen2)] = .{ + result[@enumToInt(Feature.neoverse_n2)] = .{ .llvm_name = "neoversen2", .description = "Neoverse N2 ARM processors", .dependencies = featureSet(&[_]Feature{ .bf16, .ete, - ._i8mm, + .i8mm, .mte, .sve2, .sve2_bitperm, @@ -948,7 +702,7 @@ pub const all_features = blk: { .v8_5a, }), }; - result[@enumToInt(Feature.neoversev1)] = .{ + result[@enumToInt(Feature.neoverse_v1)] = .{ .llvm_name = "neoversev1", .description = "Neoverse V1 ARM processors", .dependencies = featureSet(&[_]Feature{ @@ -959,7 +713,7 @@ pub const all_features = blk: { .fp16fml, .fullfp16, .fuse_aes, - ._i8mm, + .i8mm, .neon, .perfmon, .rand, @@ -977,7 +731,7 @@ pub const all_features = blk: { }; result[@enumToInt(Feature.nv)] = .{ .llvm_name = "nv", - .description = "Enable v8.4-A Nested Virtualization Enchancement", + .description = "Enable v8.4-A Nested Virtualization extension", .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.outline_atomics)] = .{ @@ -1174,23 +928,6 @@ pub const all_features = blk: { .description = "Reserve X9, making it unavailable as a GPR", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.saphira)] = .{ - .llvm_name = "saphira", - .description = "Qualcomm Saphira processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .spe, - .use_postra_scheduler, - .v8_4a, - .zcz, - }), - }; result[@enumToInt(Feature.sb)] = .{ .llvm_name = "sb", .description = "Enable v8.5 Speculation Barrier", @@ -1261,9 +998,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.sve)] = .{ .llvm_name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", - .dependencies = featureSet(&[_]Feature{ - .fullfp16, - }), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve2)] = .{ .llvm_name = "sve2", @@ -1308,95 +1043,6 @@ pub const all_features = blk: { .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.thunderx)] = .{ - .llvm_name = "thunderx", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderx2t99)] = .{ - .llvm_name = "thunderx2t99", - .description = "Cavium ThunderX2 processors", - .dependencies = featureSet(&[_]Feature{ - .aggressive_fma, - .arith_bcc_fusion, - .crc, - .crypto, - .fp_armv8, - .lse, - .neon, - .predictable_select_expensive, - .use_postra_scheduler, - .v8_1a, - }), - }; - result[@enumToInt(Feature.thunderx3t110)] = .{ - .llvm_name = "thunderx3t110", - .description = "Marvell ThunderX3 processors", - .dependencies = featureSet(&[_]Feature{ - .aggressive_fma, - .arith_bcc_fusion, - .balance_fp_ops, - .crc, - .crypto, - .fp_armv8, - .lse, - .neon, - .pa, - .perfmon, - .predictable_select_expensive, - .strict_align, - .use_aa, - .use_postra_scheduler, - .v8_3a, - }), - }; - result[@enumToInt(Feature.thunderxt81)] = .{ - .llvm_name = "thunderxt81", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderxt83)] = .{ - .llvm_name = "thunderxt83", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderxt88)] = .{ - .llvm_name = "thunderxt88", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; result[@enumToInt(Feature.tlb_rmi)] = .{ .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", @@ -1432,24 +1078,6 @@ pub const all_features = blk: { .description = "Enable Trace Buffer Extension", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.tsv110)] = .{ - .llvm_name = "tsv110", - .description = "HiSilicon TS-V110 processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .dotprod, - .fp_armv8, - .fp16fml, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .spe, - .use_postra_scheduler, - .v8_2a, - }), - }; result[@enumToInt(Feature.uaops)] = .{ .llvm_name = "uaops", .description = "Enable v8.2 UAO PState", @@ -1475,6 +1103,14 @@ pub const all_features = blk: { .description = "Use the reciprocal square root approximation", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.v8a)] = .{ + .llvm_name = null, + .description = "Support ARM v8a instructions", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + .neon, + }), + }; result[@enumToInt(Feature.v8_1a)] = .{ .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", @@ -1485,6 +1121,7 @@ pub const all_features = blk: { .pan, .rdm, .vh, + .v8a, }), }; result[@enumToInt(Feature.v8_2a)] = .{ @@ -1551,51 +1188,15 @@ pub const all_features = blk: { .bf16, .ecv, .fgt, - ._i8mm, + .i8mm, .v8_5a, }), }; - result[@enumToInt(Feature.v8r)] = .{ - .llvm_name = "v8r", - .description = "Support ARM v8r instructions", - .dependencies = featureSet(&[_]Feature{ - .CONTEXTIDREL2, - .ccidx, - .ccpp, - .complxnum, - .crc, - .dit, - .dotprod, - .fmi, - .fp16fml, - .fullfp16, - .jsconv, - .lse, - .pa, - .pan, - .pan_rwv, - .perfmon, - .predres, - .ras, - .rcpc, - .rcpc_immo, - .rdm, - .sb, - .sel2, - .sha3, - .sm4, - .specrestrict, - .ssbs, - .tlb_rmi, - .tracev8_4, - .uaops, - }), - }; result[@enumToInt(Feature.vh)] = .{ .llvm_name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", .dependencies = featureSet(&[_]Feature{ - .CONTEXTIDREL2, + .context_id_rel2, }), }; result[@enumToInt(Feature.zcm)] = .{ @@ -1639,7 +1240,15 @@ pub const cpu = struct { .name = "a64fx", .llvm_name = "a64fx", .features = featureSet(&[_]Feature{ - .a64fx, + .complxnum, + .fp_armv8, + .fullfp16, + .neon, + .perfmon, + .sha2, + .sve, + .use_postra_scheduler, + .v8_2a, }), }; pub const apple_a10 = CpuModel{ @@ -1716,42 +1325,68 @@ pub const cpu = struct { .name = "carmel", .llvm_name = "carmel", .features = featureSet(&[_]Feature{ - .carmel, + .crypto, + .fullfp16, + .neon, + .v8_2a, }), }; pub const cortex_a34 = CpuModel{ .name = "cortex_a34", .llvm_name = "cortex-a34", .features = featureSet(&[_]Feature{ - .a35, + .a34, }), }; pub const cortex_a35 = CpuModel{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .a35, + .a34, }), }; pub const cortex_a53 = CpuModel{ .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .a53, + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fuse_aes, + .perfmon, + .use_aa, + .use_postra_scheduler, + .v8a, }), }; pub const cortex_a55 = CpuModel{ .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .a55, + .crypto, + .dotprod, + .fullfp16, + .fuse_aes, + .perfmon, + .rcpc, + .v8_2a, }), }; pub const cortex_a57 = CpuModel{ .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .a57, + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fuse_aes, + .fuse_literals, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; pub const cortex_a65 = CpuModel{ @@ -1772,21 +1407,35 @@ pub const cpu = struct { .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .a72, + .crc, + .crypto, + .fuse_aes, + .perfmon, + .v8a, }), }; pub const cortex_a73 = CpuModel{ .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .a73, + .crc, + .crypto, + .fuse_aes, + .perfmon, + .v8a, }), }; pub const cortex_a75 = CpuModel{ .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .a75, + .crypto, + .dotprod, + .fullfp16, + .fuse_aes, + .perfmon, + .rcpc, + .v8_2a, }), }; pub const cortex_a76 = CpuModel{ @@ -1807,28 +1456,56 @@ pub const cpu = struct { .name = "cortex_a77", .llvm_name = "cortex-a77", .features = featureSet(&[_]Feature{ - .a77, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .neon, + .rcpc, + .v8_2a, }), }; pub const cortex_a78 = CpuModel{ .name = "cortex_a78", .llvm_name = "cortex-a78", .features = featureSet(&[_]Feature{ - .cortex_a78, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .spe, + .ssbs, + .use_postra_scheduler, + .v8_2a, }), }; pub const cortex_r82 = CpuModel{ .name = "cortex_r82", .llvm_name = "cortex-r82", .features = featureSet(&[_]Feature{ - .cortex_r82, + .use_postra_scheduler, + .v8r, }), }; pub const cortex_x1 = CpuModel{ .name = "cortex_x1", .llvm_name = "cortex-x1", .features = featureSet(&[_]Feature{ - .cortex_x1, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .spe, + .use_postra_scheduler, + .v8_2a, }), }; pub const cyclone = CpuModel{ @@ -1838,11 +1515,59 @@ pub const cpu = struct { .apple_a7, }), }; + pub const exynos_m1 = CpuModel{ + .name = "exynos_m1", + .llvm_name = null, + .features = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .use_reciprocal_square_root, + .v8a, + .zcz_fp, + }), + }; + pub const exynos_m2 = CpuModel{ + .name = "exynos_m2", + .llvm_name = null, + .features = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .v8a, + .zcz_fp, + }), + }; pub const exynos_m3 = CpuModel{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .exynosm3, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_address, + .fuse_aes, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, + .zcz_fp, }), }; pub const exynos_m4 = CpuModel{ @@ -1863,7 +1588,17 @@ pub const cpu = struct { .name = "falkor", .llvm_name = "falkor", .features = featureSet(&[_]Feature{ - .falkor, + .crc, + .crypto, + .custom_cheap_as_move, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .rdm, + .slow_strqro_store, + .use_postra_scheduler, + .v8a, + .zcz, }), }; pub const generic = CpuModel{ @@ -1871,102 +1606,167 @@ pub const cpu = struct { .llvm_name = "generic", .features = featureSet(&[_]Feature{ .ete, - .fp_armv8, .fuse_aes, - .neon, .perfmon, .use_postra_scheduler, + .v8a, }), }; pub const kryo = CpuModel{ .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .kryo, + .crc, + .crypto, + .custom_cheap_as_move, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz, + .v8a, }), }; pub const neoverse_e1 = CpuModel{ .name = "neoverse_e1", .llvm_name = "neoverse-e1", .features = featureSet(&[_]Feature{ - .neoversee1, + .neoverse_e1, }), }; pub const neoverse_n1 = CpuModel{ .name = "neoverse_n1", .llvm_name = "neoverse-n1", .features = featureSet(&[_]Feature{ - .neoversen1, + .neoverse_n1, }), }; pub const neoverse_n2 = CpuModel{ .name = "neoverse_n2", .llvm_name = "neoverse-n2", .features = featureSet(&[_]Feature{ - .neoversen2, + .neoverse_n2, }), }; pub const neoverse_v1 = CpuModel{ .name = "neoverse_v1", .llvm_name = "neoverse-v1", .features = featureSet(&[_]Feature{ - .neoversev1, + .neoverse_v1, }), }; pub const saphira = CpuModel{ .name = "saphira", .llvm_name = "saphira", .features = featureSet(&[_]Feature{ - .saphira, + .crypto, + .custom_cheap_as_move, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .spe, + .use_postra_scheduler, + .v8_4a, + .zcz, }), }; pub const thunderx = CpuModel{ .name = "thunderx", .llvm_name = "thunderx", .features = featureSet(&[_]Feature{ - .thunderx, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; pub const thunderx2t99 = CpuModel{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .features = featureSet(&[_]Feature{ - .thunderx2t99, + .aggressive_fma, + .arith_bcc_fusion, + .crc, + .crypto, + .lse, + .predictable_select_expensive, + .use_postra_scheduler, + .v8_1a, }), }; pub const thunderx3t110 = CpuModel{ .name = "thunderx3t110", .llvm_name = "thunderx3t110", .features = featureSet(&[_]Feature{ - .thunderx3t110, + .aggressive_fma, + .arith_bcc_fusion, + .balance_fp_ops, + .crc, + .crypto, + .fp_armv8, + .lse, + .neon, + .pa, + .perfmon, + .predictable_select_expensive, + .strict_align, + .use_aa, + .use_postra_scheduler, + .v8_3a, }), }; pub const thunderxt81 = CpuModel{ .name = "thunderxt81", .llvm_name = "thunderxt81", .features = featureSet(&[_]Feature{ - .thunderxt81, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; pub const thunderxt83 = CpuModel{ .name = "thunderxt83", .llvm_name = "thunderxt83", .features = featureSet(&[_]Feature{ - .thunderxt83, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; pub const thunderxt88 = CpuModel{ .name = "thunderxt88", .llvm_name = "thunderxt88", .features = featureSet(&[_]Feature{ - .thunderxt88, + .crc, + .crypto, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8a, }), }; pub const tsv110 = CpuModel{ .name = "tsv110", .llvm_name = "tsv110", .features = featureSet(&[_]Feature{ - .tsv110, + .crypto, + .custom_cheap_as_move, + .dotprod, + .fp16fml, + .fullfp16, + .fuse_aes, + .perfmon, + .spe, + .use_postra_scheduler, + .v8_2a, }), }; }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 7c160838f1..368bd80dc8 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -9,7 +9,6 @@ const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"16_bit_insts", - DumpCode, a16, add_no_carry_insts, aperture_regs, @@ -27,7 +26,7 @@ pub const Feature = enum { dpp, dpp8, ds_src2_insts, - dumpcode, + dump_code, enable_ds128, enable_prt_strict_null, fast_denormal_f32, @@ -128,7 +127,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; @@ -137,11 +135,6 @@ pub const all_features = blk: { .description = "Has i16/f16 instructions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.DumpCode)] = .{ - .llvm_name = "DumpCode", - .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.a16)] = .{ .llvm_name = "a16", .description = "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands", @@ -229,7 +222,7 @@ pub const all_features = blk: { .description = "Has ds_*_src2 instructions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.dumpcode)] = .{ + result[@enumToInt(Feature.dump_code)] = .{ .llvm_name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", .dependencies = featureSet(&[_]Feature{}), diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index f3cfa82f1d..7243fc3805 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -10,60 +10,10 @@ const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { @"32bit", @"8msecext", - a12, - a15, - a17, - a32, - a35, - a5, - a53, - a55, - a57, - a7, - a72, - a73, - a75, a76, - a77, - a8, - a9, aclass, acquire_release, aes, - armv2, - armv2a, - armv3, - armv3m, - armv4, - armv4t, - armv5t, - armv5te, - armv5tej, - armv6, - armv6_m, - armv6j, - armv6k, - armv6kz, - armv6s_m, - armv6t2, - armv7_a, - armv7_m, - armv7_r, - armv7e_m, - armv7k, - armv7s, - armv7ve, - armv8_a, - armv8_m_base, - armv8_m_main, - armv8_r, - armv8_1_a, - armv8_1_m_main, - armv8_2_a, - armv8_3_a, - armv8_4_a, - armv8_5_a, - armv8_6_a, avoid_movs_shop, avoid_partial_cpsr, bf16, @@ -77,8 +27,6 @@ pub const Feature = enum { cdecp6, cdecp7, cheap_predicable_cpsr, - cortex_a78, - cortex_x1, crc, crypto, d32, @@ -91,13 +39,13 @@ pub const Feature = enum { execute_only, expand_fp_mlx, exynos, + fp16, + fp16fml, + fp64, fp_armv8, fp_armv8d16, fp_armv8d16sp, fp_armv8sp, - fp16, - fp16fml, - fp64, fpao, fpregs, fpregs16, @@ -105,13 +53,30 @@ pub const Feature = enum { fullfp16, fuse_aes, fuse_literals, + has_v4t, + has_v5t, + has_v5te, + has_v6, + has_v6k, + has_v6m, + has_v6t2, + has_v7, + has_v7clrex, + has_v8_1a, + has_v8_1m_main, + has_v8_2a, + has_v8_3a, + has_v8_4a, + has_v8_5a, + has_v8_6a, + has_v8, + has_v8m, + has_v8m_main, hwdiv, hwdiv_arm, - _i8mm, + i8mm, iwmmxt, iwmmxt2, - krait, - kryo, lob, long_calls, loop_align, @@ -128,7 +93,6 @@ pub const Feature = enum { neon, neon_fpmovs, neonfp, - neoverse_v1, no_branch_predictor, no_movt, no_neg_immediates, @@ -139,9 +103,6 @@ pub const Feature = enum { prefer_vmovsr, prof_unpr, r4, - r5, - r52, - r7, ras, rclass, read_tp_hard, @@ -160,20 +121,37 @@ pub const Feature = enum { splat_vfp_neon, strict_align, swift, - thumb_mode, thumb2, + thumb_mode, trustzone, use_misched, + v2, + v2a, + v3, + v3m, + v4, v4t, v5t, v5te, + v5tej, v6, + v6j, v6k, + v6kz, v6m, + v6sm, v6t2, - v7, - v7clrex, - v8, + v7a, + v7em, + v7k, + v7m, + v7r, + v7s, + v7ve, + v8a, + v8m, + v8m_main, + v8r, v8_1a, v8_1m_main, v8_2a, @@ -181,8 +159,6 @@ pub const Feature = enum { v8_4a, v8_5a, v8_6a, - v8m, - v8m_main, vfp2, vfp2sp, vfp3, @@ -219,91 +195,11 @@ pub const all_features = blk: { .description = "Enable support for ARMv8-M Security Extensions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.a12)] = .{ - .llvm_name = "a12", - .description = "Cortex-A12 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a15)] = .{ - .llvm_name = "a15", - .description = "Cortex-A15 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a17)] = .{ - .llvm_name = "a17", - .description = "Cortex-A17 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a32)] = .{ - .llvm_name = "a32", - .description = "Cortex-A32 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a35)] = .{ - .llvm_name = "a35", - .description = "Cortex-A35 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a5)] = .{ - .llvm_name = "a5", - .description = "Cortex-A5 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a53)] = .{ - .llvm_name = "a53", - .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a55)] = .{ - .llvm_name = "a55", - .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a57)] = .{ - .llvm_name = "a57", - .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a7)] = .{ - .llvm_name = "a7", - .description = "Cortex-A7 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a72)] = .{ - .llvm_name = "a72", - .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a73)] = .{ - .llvm_name = "a73", - .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a75)] = .{ - .llvm_name = "a75", - .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.a76)] = .{ .llvm_name = "a76", .description = "Cortex-A76 ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.a77)] = .{ - .llvm_name = "a77", - .description = "Cortex-A77 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a8)] = .{ - .llvm_name = "a8", - .description = "Cortex-A8 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.a9)] = .{ - .llvm_name = "a9", - .description = "Cortex-A9 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.aclass)] = .{ .llvm_name = "aclass", .description = "Is application profile ('A' series)", @@ -321,387 +217,6 @@ pub const all_features = blk: { .neon, }), }; - result[@enumToInt(Feature.armv2)] = .{ - .llvm_name = "armv2", - .description = "ARMv2 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv2a)] = .{ - .llvm_name = "armv2a", - .description = "ARMv2a architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv3)] = .{ - .llvm_name = "armv3", - .description = "ARMv3 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv3m)] = .{ - .llvm_name = "armv3m", - .description = "ARMv3m architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv4)] = .{ - .llvm_name = "armv4", - .description = "ARMv4 architecture", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.armv4t)] = .{ - .llvm_name = "armv4t", - .description = "ARMv4t architecture", - .dependencies = featureSet(&[_]Feature{ - .v4t, - }), - }; - result[@enumToInt(Feature.armv5t)] = .{ - .llvm_name = "armv5t", - .description = "ARMv5t architecture", - .dependencies = featureSet(&[_]Feature{ - .v5t, - }), - }; - result[@enumToInt(Feature.armv5te)] = .{ - .llvm_name = "armv5te", - .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.armv5tej)] = .{ - .llvm_name = "armv5tej", - .description = "ARMv5tej architecture", - .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.armv6)] = .{ - .llvm_name = "armv6", - .description = "ARMv6 architecture", - .dependencies = featureSet(&[_]Feature{ - .dsp, - .v6, - }), - }; - result[@enumToInt(Feature.armv6_m)] = .{ - .llvm_name = "armv6-m", - .description = "ARMv6m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - }), - }; - result[@enumToInt(Feature.armv6j)] = .{ - .llvm_name = "armv6j", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv6, - }), - }; - result[@enumToInt(Feature.armv6k)] = .{ - .llvm_name = "armv6k", - .description = "ARMv6k architecture", - .dependencies = featureSet(&[_]Feature{ - .v6k, - }), - }; - result[@enumToInt(Feature.armv6kz)] = .{ - .llvm_name = "armv6kz", - .description = "ARMv6kz architecture", - .dependencies = featureSet(&[_]Feature{ - .trustzone, - .v6k, - }), - }; - result[@enumToInt(Feature.armv6s_m)] = .{ - .llvm_name = "armv6s-m", - .description = "ARMv6sm architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v6m, - }), - }; - result[@enumToInt(Feature.armv6t2)] = .{ - .llvm_name = "armv6t2", - .description = "ARMv6t2 architecture", - .dependencies = featureSet(&[_]Feature{ - .dsp, - .v6t2, - }), - }; - result[@enumToInt(Feature.armv7_a)] = .{ - .llvm_name = "armv7-a", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .neon, - .v7, - }), - }; - result[@enumToInt(Feature.armv7_m)] = .{ - .llvm_name = "armv7-m", - .description = "ARMv7m architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.armv7_r)] = .{ - .llvm_name = "armv7-r", - .description = "ARMv7r architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .rclass, - .v7, - }), - }; - result[@enumToInt(Feature.armv7e_m)] = .{ - .llvm_name = "armv7e-m", - .description = "ARMv7em architecture", - .dependencies = featureSet(&[_]Feature{ - .db, - .dsp, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .thumb2, - .v7, - }), - }; - result[@enumToInt(Feature.armv7k)] = .{ - .llvm_name = "armv7k", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv7_a, - }), - }; - result[@enumToInt(Feature.armv7s)] = .{ - .llvm_name = "armv7s", - .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ - .armv7_a, - }), - }; - result[@enumToInt(Feature.armv7ve)] = .{ - .llvm_name = "armv7ve", - .description = "ARMv7ve architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .db, - .dsp, - .mp, - .neon, - .trustzone, - .v7, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_a)] = .{ - .llvm_name = "armv8-a", - .description = "ARMv8a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .trustzone, - .v8, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_m_base)] = .{ - .llvm_name = "armv8-m.base", - .description = "ARMv8mBaseline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .strict_align, - .thumb_mode, - .v7clrex, - .v8m, - }), - }; - result[@enumToInt(Feature.armv8_m_main)] = .{ - .llvm_name = "armv8-m.main", - .description = "ARMv8mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .mclass, - .noarm, - .thumb_mode, - .v8m_main, - }), - }; - result[@enumToInt(Feature.armv8_r)] = .{ - .llvm_name = "armv8-r", - .description = "ARMv8r architecture", - .dependencies = featureSet(&[_]Feature{ - .crc, - .db, - .dfb, - .dsp, - .fp_armv8, - .mp, - .neon, - .rclass, - .v8, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_1_a)] = .{ - .llvm_name = "armv8.1-a", - .description = "ARMv81a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .trustzone, - .v8_1a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_1_m_main)] = .{ - .llvm_name = "armv8.1-m.main", - .description = "ARMv81mMainline architecture", - .dependencies = featureSet(&[_]Feature{ - .@"8msecext", - .acquire_release, - .db, - .hwdiv, - .lob, - .mclass, - .noarm, - .ras, - .thumb_mode, - .v8_1m_main, - }), - }; - result[@enumToInt(Feature.armv8_2_a)] = .{ - .llvm_name = "armv8.2-a", - .description = "ARMv82a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_2a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_3_a)] = .{ - .llvm_name = "armv8.3-a", - .description = "ARMv83a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_3a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_4_a)] = .{ - .llvm_name = "armv8.4-a", - .description = "ARMv84a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_4a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_5_a)] = .{ - .llvm_name = "armv8.5-a", - .description = "ARMv85a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_5a, - .virtualization, - }), - }; - result[@enumToInt(Feature.armv8_6_a)] = .{ - .llvm_name = "armv8.6-a", - .description = "ARMv86a architecture", - .dependencies = featureSet(&[_]Feature{ - .aclass, - .crc, - .crypto, - .db, - .dotprod, - .dsp, - .fp_armv8, - .mp, - .neon, - .ras, - .trustzone, - .v8_6a, - .virtualization, - }), - }; result[@enumToInt(Feature.avoid_movs_shop)] = .{ .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", @@ -787,16 +302,6 @@ pub const all_features = blk: { .description = "Disable +1 predication cost for instructions updating CPSR", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.cortex_a78)] = .{ - .llvm_name = "cortex-a78", - .description = "Cortex-A78 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.cortex_x1)] = .{ - .llvm_name = "cortex-x1", - .description = "Cortex-X1 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.crc)] = .{ .llvm_name = "crc", .description = "Enable support for CRC instructions", @@ -881,6 +386,25 @@ pub const all_features = blk: { .zcz, }), }; + result[@enumToInt(Feature.fp16)] = .{ + .llvm_name = "fp16", + .description = "Enable half-precision floating point", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.fp16fml)] = .{ + .llvm_name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .dependencies = featureSet(&[_]Feature{ + .fullfp16, + }), + }; + result[@enumToInt(Feature.fp64)] = .{ + .llvm_name = "fp64", + .description = "Floating point unit supports double precision", + .dependencies = featureSet(&[_]Feature{ + .fpregs64, + }), + }; result[@enumToInt(Feature.fp_armv8)] = .{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", @@ -915,25 +439,6 @@ pub const all_features = blk: { .vfp4sp, }), }; - result[@enumToInt(Feature.fp16)] = .{ - .llvm_name = "fp16", - .description = "Enable half-precision floating point", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.fp16fml)] = .{ - .llvm_name = "fp16fml", - .description = "Enable full half-precision floating point fml instructions", - .dependencies = featureSet(&[_]Feature{ - .fullfp16, - }), - }; - result[@enumToInt(Feature.fp64)] = .{ - .llvm_name = "fp64", - .description = "Floating point unit supports double precision", - .dependencies = featureSet(&[_]Feature{ - .fpregs64, - }), - }; result[@enumToInt(Feature.fpao)] = .{ .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", @@ -976,6 +481,144 @@ pub const all_features = blk: { .description = "CPU fuses literal generation operations", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.has_v4t)] = .{ + .llvm_name = "v4t", + .description = "Support ARM v4T instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.has_v5t)] = .{ + .llvm_name = "v5t", + .description = "Support ARM v5T instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v4t, + }), + }; + result[@enumToInt(Feature.has_v5te)] = .{ + .llvm_name = "v5te", + .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v5t, + }), + }; + result[@enumToInt(Feature.has_v6)] = .{ + .llvm_name = "v6", + .description = "Support ARM v6 instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v5te, + }), + }; + result[@enumToInt(Feature.has_v6k)] = .{ + .llvm_name = "v6k", + .description = "Support ARM v6k instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v6, + }), + }; + result[@enumToInt(Feature.has_v6m)] = .{ + .llvm_name = "v6m", + .description = "Support ARM v6M instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v6, + }), + }; + result[@enumToInt(Feature.has_v6t2)] = .{ + .llvm_name = "v6t2", + .description = "Support ARM v6t2 instructions", + .dependencies = featureSet(&[_]Feature{ + .thumb2, + .has_v6k, + .has_v8m, + }), + }; + result[@enumToInt(Feature.has_v7)] = .{ + .llvm_name = "v7", + .description = "Support ARM v7 instructions", + .dependencies = featureSet(&[_]Feature{ + .perfmon, + .has_v6t2, + .has_v7clrex, + }), + }; + result[@enumToInt(Feature.has_v7clrex)] = .{ + .llvm_name = "v7clrex", + .description = "Has v7 clrex instruction", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.has_v8)] = .{ + .llvm_name = "v8", + .description = "Support ARM v8 instructions", + .dependencies = featureSet(&[_]Feature{ + .acquire_release, + .has_v7, + }), + }; + result[@enumToInt(Feature.has_v8_1a)] = .{ + .llvm_name = "v8.1a", + .description = "Support ARM v8.1a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8, + }), + }; + result[@enumToInt(Feature.has_v8_1m_main)] = .{ + .llvm_name = "v8.1m.main", + .description = "Support ARM v8-1M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8m_main, + }), + }; + result[@enumToInt(Feature.has_v8_2a)] = .{ + .llvm_name = "v8.2a", + .description = "Support ARM v8.2a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8_1a, + }), + }; + result[@enumToInt(Feature.has_v8_3a)] = .{ + .llvm_name = "v8.3a", + .description = "Support ARM v8.3a instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v8_2a, + }), + }; + result[@enumToInt(Feature.has_v8_4a)] = .{ + .llvm_name = "v8.4a", + .description = "Support ARM v8.4a instructions", + .dependencies = featureSet(&[_]Feature{ + .dotprod, + .has_v8_3a, + }), + }; + result[@enumToInt(Feature.has_v8_5a)] = .{ + .llvm_name = "v8.5a", + .description = "Support ARM v8.5a instructions", + .dependencies = featureSet(&[_]Feature{ + .sb, + .has_v8_4a, + }), + }; + result[@enumToInt(Feature.has_v8_6a)] = .{ + .llvm_name = "v8.6a", + .description = "Support ARM v8.6a instructions", + .dependencies = featureSet(&[_]Feature{ + .bf16, + .i8mm, + .has_v8_5a, + }), + }; + result[@enumToInt(Feature.has_v8m)] = .{ + .llvm_name = "v8m", + .description = "Support ARM v8M Baseline instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v6m, + }), + }; + result[@enumToInt(Feature.has_v8m_main)] = .{ + .llvm_name = "v8m.main", + .description = "Support ARM v8M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .has_v7, + }), + }; result[@enumToInt(Feature.hwdiv)] = .{ .llvm_name = "hwdiv", .description = "Enable divide instructions in Thumb", @@ -986,7 +629,7 @@ pub const all_features = blk: { .description = "Enable divide instructions in ARM mode", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature._i8mm)] = .{ + result[@enumToInt(Feature.i8mm)] = .{ .llvm_name = "i8mm", .description = "Enable Matrix Multiply Int8 Extension", .dependencies = featureSet(&[_]Feature{ @@ -997,26 +640,16 @@ pub const all_features = blk: { .llvm_name = "iwmmxt", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .armv5te, + .has_v5te, }), }; result[@enumToInt(Feature.iwmmxt2)] = .{ .llvm_name = "iwmmxt2", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .armv5te, + .has_v5te, }), }; - result[@enumToInt(Feature.krait)] = .{ - .llvm_name = "krait", - .description = "Qualcomm Krait processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.kryo)] = .{ - .llvm_name = "kryo", - .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.lob)] = .{ .llvm_name = "lob", .description = "Enable Low Overhead Branch extensions", @@ -1059,7 +692,7 @@ pub const all_features = blk: { .dsp, .fpregs16, .fpregs64, - .v8_1m_main, + .has_v8_1m_main, }), }; result[@enumToInt(Feature.mve_fp)] = .{ @@ -1108,11 +741,6 @@ pub const all_features = blk: { .description = "Use NEON for single precision FP", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.neoverse_v1)] = .{ - .llvm_name = "neoverse-v1", - .description = "Neoverse-V1 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.no_branch_predictor)] = .{ .llvm_name = "no-branch-predictor", .description = "Has no branch predictor", @@ -1163,21 +791,6 @@ pub const all_features = blk: { .description = "Cortex-R4 ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.r5)] = .{ - .llvm_name = "r5", - .description = "Cortex-R5 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.r52)] = .{ - .llvm_name = "r52", - .description = "Cortex-R52 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.r7)] = .{ - .llvm_name = "r7", - .description = "Cortex-R7 ARM processors", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.ras)] = .{ .llvm_name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", @@ -1272,16 +885,16 @@ pub const all_features = blk: { .description = "Swift ARM processors", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.thumb_mode)] = .{ - .llvm_name = "thumb-mode", - .description = "Thumb mode", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.thumb2)] = .{ .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.thumb_mode)] = .{ + .llvm_name = "thumb-mode", + .description = "Thumb mode", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.trustzone)] = .{ .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", @@ -1292,142 +905,399 @@ pub const all_features = blk: { .description = "Use the MachineScheduler", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.v2)] = .{ + .llvm_name = "armv2", + .description = "ARMv2 architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + }), + }; + result[@enumToInt(Feature.v2a)] = .{ + .llvm_name = "armv2a", + .description = "ARMv2a architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + }), + }; + result[@enumToInt(Feature.v3)] = .{ + .llvm_name = "armv3", + .description = "ARMv3 architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + }), + }; + result[@enumToInt(Feature.v3m)] = .{ + .llvm_name = "armv3m", + .description = "ARMv3m architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + }), + }; + result[@enumToInt(Feature.v4)] = .{ + .llvm_name = "armv4", + .description = "ARMv4 architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + }), + }; result[@enumToInt(Feature.v4t)] = .{ - .llvm_name = "v4t", - .description = "Support ARM v4T instructions", - .dependencies = featureSet(&[_]Feature{}), + .llvm_name = "armv4t", + .description = "ARMv4t architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + .has_v4t, + }), }; result[@enumToInt(Feature.v5t)] = .{ - .llvm_name = "v5t", - .description = "Support ARM v5T instructions", + .llvm_name = "armv5t", + .description = "ARMv5t architecture", .dependencies = featureSet(&[_]Feature{ - .v4t, + .strict_align, + .has_v5t, }), }; result[@enumToInt(Feature.v5te)] = .{ - .llvm_name = "v5te", - .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .llvm_name = "armv5te", + .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .v5t, + .strict_align, + .has_v5te, + }), + }; + result[@enumToInt(Feature.v5tej)] = .{ + .llvm_name = "armv5tej", + .description = "ARMv5tej architecture", + .dependencies = featureSet(&[_]Feature{ + .strict_align, + .has_v5te, }), }; result[@enumToInt(Feature.v6)] = .{ - .llvm_name = "v6", - .description = "Support ARM v6 instructions", + .llvm_name = "armv6", + .description = "ARMv6 architecture", .dependencies = featureSet(&[_]Feature{ - .v5te, - }), - }; - result[@enumToInt(Feature.v6k)] = .{ - .llvm_name = "v6k", - .description = "Support ARM v6k instructions", - .dependencies = featureSet(&[_]Feature{ - .v6, + .dsp, + .has_v6, }), }; result[@enumToInt(Feature.v6m)] = .{ - .llvm_name = "v6m", - .description = "Support ARM v6M instructions", + .llvm_name = "armv6-m", + .description = "ARMv6m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .has_v6m, + }), + }; + result[@enumToInt(Feature.v6j)] = .{ + .llvm_name = "armv6j", + .description = "ARMv7a architecture", .dependencies = featureSet(&[_]Feature{ .v6, }), }; + result[@enumToInt(Feature.v6k)] = .{ + .llvm_name = "armv6k", + .description = "ARMv6k architecture", + .dependencies = featureSet(&[_]Feature{ + .has_v6k, + }), + }; + result[@enumToInt(Feature.v6kz)] = .{ + .llvm_name = "armv6kz", + .description = "ARMv6kz architecture", + .dependencies = featureSet(&[_]Feature{ + .trustzone, + .has_v6k, + }), + }; + result[@enumToInt(Feature.v6sm)] = .{ + .llvm_name = "armv6s-m", + .description = "ARMv6sm architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .has_v6m, + }), + }; result[@enumToInt(Feature.v6t2)] = .{ - .llvm_name = "v6t2", - .description = "Support ARM v6t2 instructions", + .llvm_name = "armv6t2", + .description = "ARMv6t2 architecture", .dependencies = featureSet(&[_]Feature{ + .dsp, + .has_v6t2, + }), + }; + result[@enumToInt(Feature.v7a)] = .{ + .llvm_name = "armv7-a", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .neon, + .has_v7, + }), + }; + result[@enumToInt(Feature.v7m)] = .{ + .llvm_name = "armv7-m", + .description = "ARMv7m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, .thumb2, - .v6k, - .v8m, + .has_v7, }), }; - result[@enumToInt(Feature.v7)] = .{ - .llvm_name = "v7", - .description = "Support ARM v7 instructions", + result[@enumToInt(Feature.v7r)] = .{ + .llvm_name = "armv7-r", + .description = "ARMv7r architecture", .dependencies = featureSet(&[_]Feature{ - .perfmon, - .v6t2, - .v7clrex, + .db, + .dsp, + .hwdiv, + .rclass, + .has_v7, }), }; - result[@enumToInt(Feature.v7clrex)] = .{ - .llvm_name = "v7clrex", - .description = "Has v7 clrex instruction", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.v8)] = .{ - .llvm_name = "v8", - .description = "Support ARM v8 instructions", + result[@enumToInt(Feature.v7em)] = .{ + .llvm_name = "armv7e-m", + .description = "ARMv7em architecture", .dependencies = featureSet(&[_]Feature{ - .acquire_release, - .v7, + .db, + .dsp, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .has_v7, }), }; - result[@enumToInt(Feature.v8_1a)] = .{ - .llvm_name = "v8.1a", - .description = "Support ARM v8.1a instructions", + result[@enumToInt(Feature.v7k)] = .{ + .llvm_name = "armv7k", + .description = "ARMv7a architecture", .dependencies = featureSet(&[_]Feature{ - .v8, + .v7a, }), }; - result[@enumToInt(Feature.v8_1m_main)] = .{ - .llvm_name = "v8.1m.main", - .description = "Support ARM v8-1M Mainline instructions", + result[@enumToInt(Feature.v7s)] = .{ + .llvm_name = "armv7s", + .description = "ARMv7a architecture", .dependencies = featureSet(&[_]Feature{ - .v8m_main, + .v7a, }), }; - result[@enumToInt(Feature.v8_2a)] = .{ - .llvm_name = "v8.2a", - .description = "Support ARM v8.2a instructions", + result[@enumToInt(Feature.v7ve)] = .{ + .llvm_name = "armv7ve", + .description = "ARMv7ve architecture", .dependencies = featureSet(&[_]Feature{ - .v8_1a, + .aclass, + .db, + .dsp, + .mp, + .neon, + .trustzone, + .has_v7, + .virtualization, }), }; - result[@enumToInt(Feature.v8_3a)] = .{ - .llvm_name = "v8.3a", - .description = "Support ARM v8.3a instructions", + result[@enumToInt(Feature.v8a)] = .{ + .llvm_name = "armv8-a", + .description = "ARMv8a architecture", .dependencies = featureSet(&[_]Feature{ - .v8_2a, - }), - }; - result[@enumToInt(Feature.v8_4a)] = .{ - .llvm_name = "v8.4a", - .description = "Support ARM v8.4a instructions", - .dependencies = featureSet(&[_]Feature{ - .dotprod, - .v8_3a, - }), - }; - result[@enumToInt(Feature.v8_5a)] = .{ - .llvm_name = "v8.5a", - .description = "Support ARM v8.5a instructions", - .dependencies = featureSet(&[_]Feature{ - .sb, - .v8_4a, - }), - }; - result[@enumToInt(Feature.v8_6a)] = .{ - .llvm_name = "v8.6a", - .description = "Support ARM v8.6a instructions", - .dependencies = featureSet(&[_]Feature{ - .bf16, - ._i8mm, - .v8_5a, + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .has_v8, + .virtualization, }), }; result[@enumToInt(Feature.v8m)] = .{ - .llvm_name = "v8m", - .description = "Support ARM v8M Baseline instructions", + .llvm_name = "armv8-m.base", + .description = "ARMv8mBaseline architecture", .dependencies = featureSet(&[_]Feature{ - .v6m, + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .has_v7clrex, + .has_v8m, }), }; result[@enumToInt(Feature.v8m_main)] = .{ - .llvm_name = "v8m.main", - .description = "Support ARM v8M Mainline instructions", + .llvm_name = "armv8-m.main", + .description = "ARMv8mMainline architecture", .dependencies = featureSet(&[_]Feature{ - .v7, + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .has_v8m_main, + }), + }; + result[@enumToInt(Feature.v8r)] = .{ + .llvm_name = "armv8-r", + .description = "ARMv8r architecture", + .dependencies = featureSet(&[_]Feature{ + .crc, + .db, + .dfb, + .dsp, + .fp_armv8, + .mp, + .neon, + .rclass, + .has_v8, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_1a)] = .{ + .llvm_name = "armv8.1-a", + .description = "ARMv81a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .has_v8_1a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_1m_main)] = .{ + .llvm_name = "armv8.1-m.main", + .description = "ARMv81mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .lob, + .mclass, + .noarm, + .ras, + .thumb_mode, + .has_v8_1m_main, + }), + }; + result[@enumToInt(Feature.v8_2a)] = .{ + .llvm_name = "armv8.2-a", + .description = "ARMv82a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_2a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_3a)] = .{ + .llvm_name = "armv8.3-a", + .description = "ARMv83a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_3a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_4a)] = .{ + .llvm_name = "armv8.4-a", + .description = "ARMv84a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_4a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_5a)] = .{ + .llvm_name = "armv8.5-a", + .description = "ARMv85a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_5a, + .virtualization, + }), + }; + result[@enumToInt(Feature.v8_6a)] = .{ + .llvm_name = "armv8.6-a", + .description = "ARMv86a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .has_v8_6a, + .virtualization, }), }; result[@enumToInt(Feature.vfp2)] = .{ @@ -1547,7 +1417,7 @@ pub const all_features = blk: { .llvm_name = "xscale", .description = "ARMv5te architecture", .dependencies = featureSet(&[_]Feature{ - .armv5te, + .has_v5te, }), }; result[@enumToInt(Feature.zcz)] = .{ @@ -1568,49 +1438,49 @@ pub const cpu = struct { .name = "arm1020e", .llvm_name = "arm1020e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm1020t = CpuModel{ .name = "arm1020t", .llvm_name = "arm1020t", .features = featureSet(&[_]Feature{ - .armv5t, + .v5t, }), }; pub const arm1022e = CpuModel{ .name = "arm1022e", .llvm_name = "arm1022e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm10e = CpuModel{ .name = "arm10e", .llvm_name = "arm10e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm10tdmi = CpuModel{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", .features = featureSet(&[_]Feature{ - .armv5t, + .v5t, }), }; pub const arm1136j_s = CpuModel{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", .features = featureSet(&[_]Feature{ - .armv6, + .v6, }), }; pub const arm1136jf_s = CpuModel{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", .features = featureSet(&[_]Feature{ - .armv6, + .v6, .slowfpvmlx, .vfp2, }), @@ -1619,14 +1489,14 @@ pub const cpu = struct { .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", .features = featureSet(&[_]Feature{ - .armv6t2, + .v6t2, }), }; pub const arm1156t2f_s = CpuModel{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", .features = featureSet(&[_]Feature{ - .armv6t2, + .v6t2, .slowfpvmlx, .vfp2, }), @@ -1635,21 +1505,21 @@ pub const cpu = struct { .name = "arm1176j_s", .llvm_name = "arm1176j-s", .features = featureSet(&[_]Feature{ - .armv6kz, + .v6kz, }), }; pub const arm1176jz_s = CpuModel{ .name = "arm1176jz_s", .llvm_name = "arm1176jz-s", .features = featureSet(&[_]Feature{ - .armv6kz, + .v6kz, }), }; pub const arm1176jzf_s = CpuModel{ .name = "arm1176jzf_s", .llvm_name = "arm1176jzf-s", .features = featureSet(&[_]Feature{ - .armv6kz, + .v6kz, .slowfpvmlx, .vfp2, }), @@ -1658,127 +1528,133 @@ pub const cpu = struct { .name = "arm710t", .llvm_name = "arm710t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm720t = CpuModel{ .name = "arm720t", .llvm_name = "arm720t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm7tdmi = CpuModel{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm7tdmi_s = CpuModel{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm8 = CpuModel{ .name = "arm8", .llvm_name = "arm8", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const arm810 = CpuModel{ .name = "arm810", .llvm_name = "arm810", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const arm9 = CpuModel{ .name = "arm9", .llvm_name = "arm9", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm920 = CpuModel{ .name = "arm920", .llvm_name = "arm920", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm920t = CpuModel{ .name = "arm920t", .llvm_name = "arm920t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm922t = CpuModel{ .name = "arm922t", .llvm_name = "arm922t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm926ej_s = CpuModel{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm940t = CpuModel{ .name = "arm940t", .llvm_name = "arm940t", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, }), }; pub const arm946e_s = CpuModel{ .name = "arm946e_s", .llvm_name = "arm946e-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm966e_s = CpuModel{ .name = "arm966e_s", .llvm_name = "arm966e-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm968e_s = CpuModel{ .name = "arm968e_s", .llvm_name = "arm968e-s", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm9e = CpuModel{ .name = "arm9e", .llvm_name = "arm9e", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const arm9tdmi = CpuModel{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, + }), + }; + pub const baseline = CpuModel{ + .name = "baseline", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{ + .v7a, }), }; pub const cortex_a12 = CpuModel{ .name = "cortex_a12", .llvm_name = "cortex-a12", .features = featureSet(&[_]Feature{ - .a12, - .armv7_a, + .v7a, .avoid_partial_cpsr, .mp, .ret_addr_stack, @@ -1792,8 +1668,7 @@ pub const cpu = struct { .name = "cortex_a15", .llvm_name = "cortex-a15", .features = featureSet(&[_]Feature{ - .a15, - .armv7_a, + .v7a, .avoid_partial_cpsr, .dont_widen_vmovs, .mp, @@ -1810,8 +1685,7 @@ pub const cpu = struct { .name = "cortex_a17", .llvm_name = "cortex-a17", .features = featureSet(&[_]Feature{ - .a17, - .armv7_a, + .v7a, .avoid_partial_cpsr, .mp, .ret_addr_stack, @@ -1825,31 +1699,29 @@ pub const cpu = struct { .name = "cortex_a32", .llvm_name = "cortex-a32", .features = featureSet(&[_]Feature{ - .armv8_a, .crc, .crypto, .hwdiv, .hwdiv_arm, + .v8a, }), }; pub const cortex_a35 = CpuModel{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .a35, - .armv8_a, .crc, .crypto, .hwdiv, .hwdiv_arm, + .v8a, }), }; pub const cortex_a5 = CpuModel{ .name = "cortex_a5", .llvm_name = "cortex-a5", .features = featureSet(&[_]Feature{ - .a5, - .armv7_a, + .v7a, .mp, .ret_addr_stack, .slow_fp_brcc, @@ -1864,8 +1736,7 @@ pub const cpu = struct { .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .a53, - .armv8_a, + .v8a, .crc, .crypto, .fpao, @@ -1877,8 +1748,7 @@ pub const cpu = struct { .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .a55, - .armv8_2_a, + .v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1888,8 +1758,7 @@ pub const cpu = struct { .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .a57, - .armv8_a, + .v8a, .avoid_partial_cpsr, .cheap_predicable_cpsr, .crc, @@ -1903,8 +1772,7 @@ pub const cpu = struct { .name = "cortex_a7", .llvm_name = "cortex-a7", .features = featureSet(&[_]Feature{ - .a7, - .armv7_a, + .v7a, .mp, .ret_addr_stack, .slow_fp_brcc, @@ -1921,8 +1789,7 @@ pub const cpu = struct { .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .a72, - .armv8_a, + .v8a, .crc, .crypto, .hwdiv, @@ -1933,8 +1800,7 @@ pub const cpu = struct { .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .a73, - .armv8_a, + .v8a, .crc, .crypto, .hwdiv, @@ -1945,8 +1811,7 @@ pub const cpu = struct { .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .a75, - .armv8_2_a, + .v8_2a, .dotprod, .hwdiv, .hwdiv_arm, @@ -1957,7 +1822,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ .a76, - .armv8_2_a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1971,7 +1836,7 @@ pub const cpu = struct { .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ .a76, - .armv8_2_a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1984,8 +1849,7 @@ pub const cpu = struct { .name = "cortex_a77", .llvm_name = "cortex-a77", .features = featureSet(&[_]Feature{ - .a77, - .armv8_2_a, + .v8_2a, .crc, .crypto, .dotprod, @@ -1998,8 +1862,7 @@ pub const cpu = struct { .name = "cortex_a78", .llvm_name = "cortex-a78", .features = featureSet(&[_]Feature{ - .armv8_2_a, - .cortex_a78, + .v8_2a, .crc, .crypto, .dotprod, @@ -2012,8 +1875,7 @@ pub const cpu = struct { .name = "cortex_a8", .llvm_name = "cortex-a8", .features = featureSet(&[_]Feature{ - .a8, - .armv7_a, + .v7a, .nonpipelined_vfp, .ret_addr_stack, .slow_fp_brcc, @@ -2028,8 +1890,7 @@ pub const cpu = struct { .name = "cortex_a9", .llvm_name = "cortex-a9", .features = featureSet(&[_]Feature{ - .a9, - .armv7_a, + .v7a, .avoid_partial_cpsr, .expand_fp_mlx, .fp16, @@ -2048,28 +1909,28 @@ pub const cpu = struct { .name = "cortex_m0", .llvm_name = "cortex-m0", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_m0plus = CpuModel{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_m1 = CpuModel{ .name = "cortex_m1", .llvm_name = "cortex-m1", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const cortex_m23 = CpuModel{ .name = "cortex_m23", .llvm_name = "cortex-m23", .features = featureSet(&[_]Feature{ - .armv8_m_base, + .v8m, .no_movt, }), }; @@ -2077,7 +1938,7 @@ pub const cpu = struct { .name = "cortex_m3", .llvm_name = "cortex-m3", .features = featureSet(&[_]Feature{ - .armv7_m, + .v7m, .loop_align, .m3, .no_branch_predictor, @@ -2088,7 +1949,7 @@ pub const cpu = struct { .name = "cortex_m33", .llvm_name = "cortex-m33", .features = featureSet(&[_]Feature{ - .armv8_m_main, + .v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -2102,7 +1963,7 @@ pub const cpu = struct { .name = "cortex_m35p", .llvm_name = "cortex-m35p", .features = featureSet(&[_]Feature{ - .armv8_m_main, + .v8m_main, .dsp, .fp_armv8d16sp, .loop_align, @@ -2116,7 +1977,7 @@ pub const cpu = struct { .name = "cortex_m4", .llvm_name = "cortex-m4", .features = featureSet(&[_]Feature{ - .armv7e_m, + .v7em, .loop_align, .no_branch_predictor, .slowfpvfmx, @@ -2129,7 +1990,7 @@ pub const cpu = struct { .name = "cortex_m55", .llvm_name = "cortex-m55", .features = featureSet(&[_]Feature{ - .armv8_1_m_main, + .v8_1m_main, .dsp, .fp_armv8d16, .loop_align, @@ -2143,16 +2004,15 @@ pub const cpu = struct { .name = "cortex_m7", .llvm_name = "cortex-m7", .features = featureSet(&[_]Feature{ - .armv7e_m, + .v7em, .fp_armv8d16, - .use_misched, }), }; pub const cortex_r4 = CpuModel{ .name = "cortex_r4", .llvm_name = "cortex-r4", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .r4, .ret_addr_stack, @@ -2162,7 +2022,7 @@ pub const cpu = struct { .name = "cortex_r4f", .llvm_name = "cortex-r4f", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .r4, .ret_addr_stack, @@ -2176,10 +2036,9 @@ pub const cpu = struct { .name = "cortex_r5", .llvm_name = "cortex-r5", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .hwdiv_arm, - .r5, .ret_addr_stack, .slow_fp_brcc, .slowfpvfmx, @@ -2191,9 +2050,8 @@ pub const cpu = struct { .name = "cortex_r52", .llvm_name = "cortex-r52", .features = featureSet(&[_]Feature{ - .armv8_r, + .v8r, .fpao, - .r52, .use_misched, }), }; @@ -2201,12 +2059,11 @@ pub const cpu = struct { .name = "cortex_r7", .llvm_name = "cortex-r7", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .fp16, .hwdiv_arm, .mp, - .r7, .ret_addr_stack, .slow_fp_brcc, .slowfpvfmx, @@ -2218,7 +2075,7 @@ pub const cpu = struct { .name = "cortex_r8", .llvm_name = "cortex-r8", .features = featureSet(&[_]Feature{ - .armv7_r, + .v7r, .avoid_partial_cpsr, .fp16, .hwdiv_arm, @@ -2234,8 +2091,7 @@ pub const cpu = struct { .name = "cortex_x1", .llvm_name = "cortex-x1", .features = featureSet(&[_]Feature{ - .armv8_2_a, - .cortex_x1, + .v8_2a, .crc, .crypto, .dotprod, @@ -2248,7 +2104,7 @@ pub const cpu = struct { .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8a, .avoid_movs_shop, .avoid_partial_cpsr, .crypto, @@ -2270,14 +2126,30 @@ pub const cpu = struct { .name = "ep9312", .llvm_name = "ep9312", .features = featureSet(&[_]Feature{ - .armv4t, + .v4t, + }), + }; + pub const exynos_m1 = CpuModel{ + .name = "exynos_m1", + .llvm_name = null, + .features = featureSet(&[_]Feature{ + .v8a, + .exynos, + }), + }; + pub const exynos_m2 = CpuModel{ + .name = "exynos_m2", + .llvm_name = null, + .features = featureSet(&[_]Feature{ + .v8a, + .exynos, }), }; pub const exynos_m3 = CpuModel{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .armv8_a, + .v8_2a, .exynos, }), }; @@ -2285,7 +2157,7 @@ pub const cpu = struct { .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .armv8_2_a, + .v8_2a, .dotprod, .exynos, .fullfp16, @@ -2295,10 +2167,10 @@ pub const cpu = struct { .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ - .armv8_2_a, .dotprod, .exynos, .fullfp16, + .v8_2a, }), }; pub const generic = CpuModel{ @@ -2310,21 +2182,20 @@ pub const cpu = struct { .name = "iwmmxt", .llvm_name = "iwmmxt", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; pub const krait = CpuModel{ .name = "krait", .llvm_name = "krait", .features = featureSet(&[_]Feature{ - .armv7_a, .avoid_partial_cpsr, .fp16, .hwdiv, .hwdiv_arm, - .krait, .muxed_units, .ret_addr_stack, + .v7a, .vfp4, .vldn_align, .vmlx_forwarding, @@ -2334,19 +2205,18 @@ pub const cpu = struct { .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .armv8_a, .crc, .crypto, .hwdiv, .hwdiv_arm, - .kryo, + .v8a, }), }; pub const mpcore = CpuModel{ .name = "mpcore", .llvm_name = "mpcore", .features = featureSet(&[_]Feature{ - .armv6k, + .v6k, .slowfpvmlx, .vfp2, }), @@ -2355,14 +2225,14 @@ pub const cpu = struct { .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", .features = featureSet(&[_]Feature{ - .armv6k, + .v6k, }), }; pub const neoverse_n1 = CpuModel{ .name = "neoverse_n1", .llvm_name = "neoverse-n1", .features = featureSet(&[_]Feature{ - .armv8_2_a, + .v8_2a, .crc, .crypto, .dotprod, @@ -2374,9 +2244,9 @@ pub const cpu = struct { .name = "neoverse_n2", .llvm_name = "neoverse-n2", .features = featureSet(&[_]Feature{ - .armv8_5_a, + .v8_5a, .bf16, - ._i8mm, + .i8mm, .perfmon, }), }; @@ -2384,28 +2254,28 @@ pub const cpu = struct { .name = "neoverse_v1", .llvm_name = "neoverse-v1", .features = featureSet(&[_]Feature{ - .armv8_4_a, + .v8_4a, .bf16, .crc, .crypto, .fullfp16, .hwdiv, .hwdiv_arm, - ._i8mm, + .i8mm, }), }; pub const sc000 = CpuModel{ .name = "sc000", .llvm_name = "sc000", .features = featureSet(&[_]Feature{ - .armv6_m, + .v6m, }), }; pub const sc300 = CpuModel{ .name = "sc300", .llvm_name = "sc300", .features = featureSet(&[_]Feature{ - .armv7_m, + .v7m, .m3, .no_branch_predictor, .use_misched, @@ -2415,35 +2285,35 @@ pub const cpu = struct { .name = "strongarm", .llvm_name = "strongarm", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const strongarm110 = CpuModel{ .name = "strongarm110", .llvm_name = "strongarm110", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const strongarm1100 = CpuModel{ .name = "strongarm1100", .llvm_name = "strongarm1100", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const strongarm1110 = CpuModel{ .name = "strongarm1110", .llvm_name = "strongarm1110", .features = featureSet(&[_]Feature{ - .armv4, + .v4, }), }; pub const swift = CpuModel{ .name = "swift", .llvm_name = "swift", .features = featureSet(&[_]Feature{ - .armv7_a, + .v7a, .avoid_movs_shop, .avoid_partial_cpsr, .disable_postra_scheduler, @@ -2471,7 +2341,7 @@ pub const cpu = struct { .name = "xscale", .llvm_name = "xscale", .features = featureSet(&[_]Feature{ - .armv5te, + .v5te, }), }; }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 96a41dae35..4517fd5abe 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -47,7 +47,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; @@ -164,6 +163,7 @@ pub const all_features = blk: { .dependencies = featureSet(&[_]Feature{ .avr0, .@"break", + .memmappedregs, .sram, .tinyencoding, }), @@ -1859,7 +1859,7 @@ pub const cpu = struct { .name = "atxmega16e5", .llvm_name = "atxmega16e5", .features = featureSet(&[_]Feature{ - .xmegau, + .xmega, }), }; pub const atxmega192a3 = CpuModel{ diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index 302a23bd51..5e23c233c8 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -16,7 +16,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 3ffb57e6ce..34bbf70bb4 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -44,7 +44,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 85b710d793..ccc207ff0f 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -65,7 +65,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 44fe99d3ef..38ea358f90 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -17,7 +17,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index f6d8244463..9a35edc7e9 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -41,7 +41,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 2cd66a1b63..ba59ee5da9 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -62,6 +62,7 @@ pub const Feature = enum { ppc6xx, predictable_select_expensive, prefix_instrs, + qpx, recipprec, secure_plt, slow_popcntd, @@ -75,7 +76,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; @@ -417,6 +417,13 @@ pub const all_features = blk: { .power9_altivec, }), }; + result[@enumToInt(Feature.qpx)] = .{ + .llvm_name = null, + .description = "Enable QPX instructions", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; result[@enumToInt(Feature.recipprec)] = .{ .llvm_name = "recipprec", .description = "Assume higher precision reciprocal estimates", @@ -472,8 +479,8 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const @"440" = CpuModel{ - .name = "440", + pub const @"ppc440" = CpuModel{ + .name = "ppc440", .llvm_name = "440", .features = featureSet(&[_]Feature{ .booke, @@ -484,8 +491,8 @@ pub const cpu = struct { .msync, }), }; - pub const @"450" = CpuModel{ - .name = "450", + pub const @"ppc450" = CpuModel{ + .name = "ppc450", .llvm_name = "450", .features = featureSet(&[_]Feature{ .booke, @@ -496,70 +503,70 @@ pub const cpu = struct { .msync, }), }; - pub const @"601" = CpuModel{ - .name = "601", + pub const @"ppc601" = CpuModel{ + .name = "ppc601", .llvm_name = "601", .features = featureSet(&[_]Feature{ .fpu, }), }; - pub const @"602" = CpuModel{ - .name = "602", + pub const @"ppc602" = CpuModel{ + .name = "ppc602", .llvm_name = "602", .features = featureSet(&[_]Feature{ .fpu, }), }; - pub const @"603" = CpuModel{ - .name = "603", + pub const @"ppc603" = CpuModel{ + .name = "ppc603", .llvm_name = "603", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"603e" = CpuModel{ - .name = "603e", + pub const @"ppc603e" = CpuModel{ + .name = "ppc603e", .llvm_name = "603e", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"603ev" = CpuModel{ - .name = "603ev", + pub const @"ppc603ev" = CpuModel{ + .name = "ppc603ev", .llvm_name = "603ev", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"604" = CpuModel{ - .name = "604", + pub const @"ppc604" = CpuModel{ + .name = "ppc604", .llvm_name = "604", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"604e" = CpuModel{ - .name = "604e", + pub const @"ppc604e" = CpuModel{ + .name = "ppc604e", .llvm_name = "604e", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"620" = CpuModel{ - .name = "620", + pub const @"ppc620" = CpuModel{ + .name = "ppc620", .llvm_name = "620", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"7400" = CpuModel{ - .name = "7400", + pub const @"ppc7400" = CpuModel{ + .name = "ppc7400", .llvm_name = "7400", .features = featureSet(&[_]Feature{ .altivec, @@ -567,8 +574,8 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"7450" = CpuModel{ - .name = "7450", + pub const @"ppc7450" = CpuModel{ + .name = "ppc7450", .llvm_name = "7450", .features = featureSet(&[_]Feature{ .altivec, @@ -576,16 +583,16 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"750" = CpuModel{ - .name = "750", + pub const @"ppc750" = CpuModel{ + .name = "ppc750", .llvm_name = "750", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"970" = CpuModel{ - .name = "970", + pub const @"ppc970" = CpuModel{ + .name = "ppc970", .llvm_name = "970", .features = featureSet(&[_]Feature{ .@"64bit", @@ -622,6 +629,32 @@ pub const cpu = struct { .stfiwx, }), }; + pub const a2q = CpuModel{ + .name = "a2q", + .llvm_name = "a2q", + .features = featureSet(&[_]Feature{ + .@"64bit", + .booke, + .cmpb, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .icbt, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .qpx, + .recipprec, + .slow_popcntd, + .stfiwx, + }), + }; pub const e500 = CpuModel{ .name = "e500", .llvm_name = "e500", diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index 03012179fc..3e26f0a094 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -69,7 +69,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; @@ -382,6 +381,29 @@ pub const all_features = blk: { }; pub const cpu = struct { + pub const baseline_rv32 = CpuModel{ + .name = "baseline_rv32", + .llvm_name = null, + .features = featureSet(&[_]Feature{ + .a, + .c, + .d, + .f, + .m, + }), + }; + pub const baseline_rv64 = CpuModel{ + .name = "baseline_rv64", + .llvm_name = null, + .features = featureSet(&[_]Feature{ + .@"64bit", + .a, + .c, + .d, + .f, + .m, + }), + }; pub const generic_rv32 = CpuModel{ .name = "generic_rv32", .llvm_name = "generic-rv32", diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 7374cf37d9..4b6698e8de 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -32,7 +32,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; @@ -161,11 +160,6 @@ pub const cpu = struct { .llvm_name = "f934", .features = featureSet(&[_]Feature{}), }; - pub const generic = CpuModel{ - .name = "generic", - .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), - }; pub const gr712rc = CpuModel{ .name = "gr712rc", .llvm_name = "gr712rc", diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 9b901e36aa..16b1471d55 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -49,7 +49,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 9f2a2d306d..6a2053c613 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -24,7 +24,6 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 776e683092..d764bc2d21 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -8,12 +8,9 @@ const CpuFeature = std.Target.Cpu.Feature; const CpuModel = std.Target.Cpu.Model; pub const Feature = enum { - @"16bit_mode", - @"32bit_mode", @"3dnow", @"3dnowa", @"64bit", - @"64bit_mode", adx, aes, amx_bf16, @@ -154,20 +151,9 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; - result[@enumToInt(Feature.@"16bit_mode")] = .{ - .llvm_name = "16bit-mode", - .description = "16-bit mode (i8086)", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.@"32bit_mode")] = .{ - .llvm_name = "32bit-mode", - .description = "32-bit mode (80386)", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.@"3dnow")] = .{ .llvm_name = "3dnow", .description = "Enable 3DNow! instructions", @@ -187,11 +173,6 @@ pub const all_features = blk: { .description = "Support 64-bit instructions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.@"64bit_mode")] = .{ - .llvm_name = "64bit-mode", - .description = "64-bit mode (x86_64)", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.adx)] = .{ .llvm_name = "adx", .description = "Support ADX instructions", @@ -1680,7 +1661,6 @@ pub const cpu = struct { .name = "generic", .llvm_name = "generic", .features = featureSet(&[_]Feature{ - .@"64bit", .cx8, .x87, }), diff --git a/src/codegen.zig b/src/codegen.zig index f982dbf382..3b0a383a71 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -1689,7 +1689,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { // TODO: add Instruction.supportedOn // function for ARM - if (Target.arm.featureSetHas(self.target.cpu.features, .armv5t)) { + if (Target.arm.featureSetHas(self.target.cpu.features, .has_v5t)) { writeInt(u32, try self.code.addManyAsArray(4), Instruction.blx(.al, .lr).toU32()); } else { writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .lr, Instruction.Operand.reg(.pc, Instruction.Operand.Shift.none)).toU32()); @@ -2625,7 +2625,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { } else if (Instruction.Operand.fromU32(~@intCast(u32, x))) |op| { writeInt(u32, try self.code.addManyAsArray(4), Instruction.mvn(.al, reg, op).toU32()); } else if (x <= math.maxInt(u16)) { - if (Target.arm.featureSetHas(self.target.cpu.features, .armv7_a)) { + if (Target.arm.featureSetHas(self.target.cpu.features, .has_v7)) { writeInt(u32, try self.code.addManyAsArray(4), Instruction.movw(.al, reg, @intCast(u16, x)).toU32()); } else { writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.imm(@truncate(u8, x), 0)).toU32()); @@ -2634,7 +2634,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { } else { // TODO write constant to code and load // relative to pc - if (Target.arm.featureSetHas(self.target.cpu.features, .armv7_a)) { + if (Target.arm.featureSetHas(self.target.cpu.features, .has_v7)) { // immediate: 0xaaaabbbb // movw reg, #0xbbbb // movt reg, #0xaaaa