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https://github.com/ziglang/zig.git
synced 2026-01-01 19:13:16 +00:00
stage1: emit calls to compiler-rt for f80 on unsupported targets
This commit is contained in:
Veikka Tuominen
Andrew Kelley
parent
67d04a988a
commit
8e9fd042b8
@ -1598,6 +1598,81 @@ static LLVMValueRef gen_assert_zero(CodeGen *g, LLVMValueRef expr_val, ZigType *
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return nullptr;
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}
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static LLVMValueRef gen_soft_f80_widen_or_shorten(CodeGen *g, ZigType *actual_type,
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ZigType *wanted_type, LLVMValueRef expr_val)
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{
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ZigType *scalar_actual_type = (actual_type->id == ZigTypeIdVector) ?
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actual_type->data.vector.elem_type : actual_type;
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ZigType *scalar_wanted_type = (wanted_type->id == ZigTypeIdVector) ?
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wanted_type->data.vector.elem_type : wanted_type;
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uint64_t actual_bits = scalar_actual_type->data.floating.bit_count;
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uint64_t wanted_bits = scalar_wanted_type->data.floating.bit_count;
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LLVMTypeRef param_type;
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LLVMTypeRef return_type;
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const char *func_name;
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if (actual_bits == wanted_bits) {
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return expr_val;
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} else if (actual_bits == 80) {
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param_type = g->builtin_types.entry_f80->llvm_type;
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switch (wanted_bits) {
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case 16:
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return_type = g->builtin_types.entry_f16->llvm_type;
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func_name = "__truncxfhf2";
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break;
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case 32:
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return_type = g->builtin_types.entry_f32->llvm_type;
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func_name = "__truncxfff2";
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break;
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case 64:
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return_type = g->builtin_types.entry_f64->llvm_type;
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func_name = "__truncxfdf2";
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break;
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case 128:
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return_type = g->builtin_types.entry_f128->llvm_type;
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func_name = "__extendxftf2";
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break;
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default:
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zig_unreachable();
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}
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} else if (wanted_bits == 80) {
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return_type = g->builtin_types.entry_f80->llvm_type;
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switch (actual_bits) {
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case 16:
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param_type = g->builtin_types.entry_f16->llvm_type;
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func_name = "__extendhfxf2";
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break;
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case 32:
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param_type = g->builtin_types.entry_f32->llvm_type;
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func_name = "__extendffxf2";
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break;
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case 64:
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param_type = g->builtin_types.entry_f64->llvm_type;
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func_name = "__extenddfxf2";
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break;
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case 128:
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param_type = g->builtin_types.entry_f128->llvm_type;
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func_name = "__trunctfxf2";
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break;
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default:
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zig_unreachable();
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}
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} else {
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zig_unreachable();
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}
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LLVMValueRef func_ref = LLVMGetNamedFunction(g->module, func_name);
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if (func_ref == nullptr) {
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LLVMTypeRef fn_type = LLVMFunctionType(return_type, ¶m_type, 1, false);
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func_ref = LLVMAddFunction(g->module, func_name, fn_type);
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}
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return LLVMBuildCall(g->builder, func_ref, &expr_val, 1, "");
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}
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static LLVMValueRef gen_widen_or_shorten(CodeGen *g, bool want_runtime_safety, ZigType *actual_type,
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ZigType *wanted_type, LLVMValueRef expr_val)
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{
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@ -1612,6 +1687,13 @@ static LLVMValueRef gen_widen_or_shorten(CodeGen *g, bool want_runtime_safety, Z
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uint64_t actual_bits;
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uint64_t wanted_bits;
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if (scalar_actual_type->id == ZigTypeIdFloat) {
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if ((scalar_actual_type == g->builtin_types.entry_f80
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|| scalar_wanted_type == g->builtin_types.entry_f80)
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&& !target_has_f80(g->zig_target))
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{
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return gen_soft_f80_widen_or_shorten(g, actual_type, wanted_type, expr_val);
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}
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actual_bits = scalar_actual_type->data.floating.bit_count;
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wanted_bits = scalar_wanted_type->data.floating.bit_count;
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} else if (scalar_actual_type->id == ZigTypeIdInt) {
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@ -3142,6 +3224,142 @@ static void gen_shift_rhs_check(CodeGen *g, ZigType *lhs_type, ZigType *rhs_type
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}
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}
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static LLVMValueRef get_soft_f80_bin_op_func(CodeGen *g, const char *name, int param_count, LLVMTypeRef return_type) {
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LLVMValueRef existing_llvm_fn = LLVMGetNamedFunction(g->module, name);
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if (existing_llvm_fn != nullptr) return existing_llvm_fn;
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LLVMTypeRef float_type_ref = g->builtin_types.entry_f80->llvm_type;
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LLVMTypeRef param_types[2] = { float_type_ref, float_type_ref };
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LLVMTypeRef fn_type = LLVMFunctionType(return_type, param_types, param_count, false);
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return LLVMAddFunction(g->module, name, fn_type);
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}
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static LLVMValueRef ir_render_soft_f80_bin_op(CodeGen *g, Stage1Air *executable,
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Stage1AirInstBinOp *bin_op_instruction)
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{
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// TODO support vectors
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IrBinOp op_id = bin_op_instruction->op_id;
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Stage1AirInst *op1 = bin_op_instruction->op1;
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Stage1AirInst *op2 = bin_op_instruction->op2;
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LLVMValueRef op1_value = ir_llvm_value(g, op1);
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LLVMValueRef op2_value = ir_llvm_value(g, op2);
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bool div_exact_safety_check = false;
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LLVMTypeRef return_type = g->builtin_types.entry_f80->llvm_type;
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int param_count = 2;
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const char *func_name;
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switch (op_id) {
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case IrBinOpInvalid:
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case IrBinOpArrayCat:
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case IrBinOpArrayMult:
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case IrBinOpRemUnspecified:
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case IrBinOpBitShiftLeftLossy:
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case IrBinOpBitShiftLeftExact:
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case IrBinOpBitShiftRightLossy:
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case IrBinOpBitShiftRightExact:
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case IrBinOpBoolOr:
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case IrBinOpBoolAnd:
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case IrBinOpMultWrap:
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case IrBinOpAddWrap:
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case IrBinOpSubWrap:
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case IrBinOpBinOr:
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case IrBinOpBinXor:
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case IrBinOpBinAnd:
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case IrBinOpAddSat:
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case IrBinOpSubSat:
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case IrBinOpMultSat:
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case IrBinOpShlSat:
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zig_unreachable();
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case IrBinOpCmpEq:
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return_type = g->builtin_types.entry_i32->llvm_type;
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func_name = "__eqxf2";
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break;
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case IrBinOpCmpNotEq:
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return_type = g->builtin_types.entry_i32->llvm_type;
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func_name = "__nexf2";
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break;
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case IrBinOpCmpLessOrEq:
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case IrBinOpCmpLessThan:
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return_type = g->builtin_types.entry_i32->llvm_type;
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func_name = "__lexf2";
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break;
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case IrBinOpCmpGreaterOrEq:
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case IrBinOpCmpGreaterThan:
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return_type = g->builtin_types.entry_i32->llvm_type;
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func_name = "__gexf2";
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break;
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case IrBinOpMaximum:
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func_name = "__fmaxx";
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break;
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case IrBinOpMinimum:
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func_name = "__fminx";
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break;
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case IrBinOpMult:
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func_name = "__mulxf3";
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break;
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case IrBinOpAdd:
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func_name = "__addxf3";
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break;
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case IrBinOpSub:
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func_name = "__subxf3";
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break;
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case IrBinOpDivUnspecified:
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func_name = "__divxf3";
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break;
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case IrBinOpDivExact:
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func_name = "__divxf3";
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div_exact_safety_check = bin_op_instruction->safety_check_on &&
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ir_want_runtime_safety(g, &bin_op_instruction->base);
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break;
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case IrBinOpDivTrunc:
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param_count = 1;
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func_name = "__truncx";
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break;
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case IrBinOpDivFloor:
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param_count = 1;
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func_name = "__floorx";
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break;
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case IrBinOpRemRem:
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param_count = 1;
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func_name = "__remx";
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break;
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case IrBinOpRemMod:
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param_count = 1;
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func_name = "__modx";
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break;
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default:
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zig_unreachable();
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}
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LLVMValueRef func_ref = get_soft_f80_bin_op_func(g, func_name, param_count, return_type);
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LLVMValueRef params[2] = {op1_value, op2_value};
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LLVMValueRef result = LLVMBuildCall(g->builder, func_ref, params, param_count, "");
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if (div_exact_safety_check) {
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// Safety check: a / b == floor(a / b)
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func_ref = get_soft_f80_bin_op_func(g, "__floorx", 1, return_type);
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LLVMValueRef floored = LLVMBuildCall(g->builder, func_ref, &result, 1, "");
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LLVMBasicBlockRef ok_block = LLVMAppendBasicBlock(g->cur_fn_val, "DivExactOk");
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LLVMBasicBlockRef fail_block = LLVMAppendBasicBlock(g->cur_fn_val, "DivExactFail");
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LLVMValueRef params[2] = {result, floored};
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func_ref = get_soft_f80_bin_op_func(g, "__eqxf2", 2, g->builtin_types.entry_i32->llvm_type);
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LLVMValueRef ok_bit = LLVMBuildCall(g->builder, func_ref, params, 2, "");
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LLVMBuildCondBr(g->builder, ok_bit, ok_block, fail_block);
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LLVMPositionBuilderAtEnd(g->builder, fail_block);
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gen_safety_crash(g, PanicMsgIdExactDivisionRemainder);
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LLVMPositionBuilderAtEnd(g->builder, ok_block);
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}
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return result;
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}
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static LLVMValueRef ir_render_bin_op(CodeGen *g, Stage1Air *executable,
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Stage1AirInstBinOp *bin_op_instruction)
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{
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@ -3151,6 +3369,10 @@ static LLVMValueRef ir_render_bin_op(CodeGen *g, Stage1Air *executable,
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ZigType *operand_type = op1->value->type;
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ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
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if (scalar_type == g->builtin_types.entry_f80 && !target_has_f80(g->zig_target)) {
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return ir_render_soft_f80_bin_op(g, executable, bin_op_instruction);
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}
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bool want_runtime_safety = bin_op_instruction->safety_check_on &&
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ir_want_runtime_safety(g, &bin_op_instruction->base);
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@ -3158,7 +3380,6 @@ static LLVMValueRef ir_render_bin_op(CodeGen *g, Stage1Air *executable,
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LLVMValueRef op1_value = ir_llvm_value(g, op1);
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LLVMValueRef op2_value = ir_llvm_value(g, op2);
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switch (op_id) {
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case IrBinOpInvalid:
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case IrBinOpArrayCat:
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@ -5927,7 +6148,7 @@ static LLVMValueRef ir_render_prefetch(CodeGen *g, Stage1Air *executable, Stage1
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static_assert(PrefetchCacheInstruction == 0, "");
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static_assert(PrefetchCacheData == 1, "");
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assert(instruction->cache == PrefetchCacheData || instruction->cache == PrefetchCacheInstruction);
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// LLVM fails during codegen of instruction cache prefetchs for these architectures.
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// This is an LLVM bug as the prefetch intrinsic should be a noop if not supported by the target.
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// To work around this, simply don't emit llvm.prefetch in this case.
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@ -8920,8 +9141,19 @@ static void define_builtin_types(CodeGen *g) {
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if (target_has_f80(g->zig_target)) {
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add_fp_entry(g, "f80", 80, LLVMX86FP80Type(), &g->builtin_types.entry_f80);
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} else {
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// use f128 for correct size and alignment
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add_fp_entry(g, "f80", 128, LLVMFP128Type(), &g->builtin_types.entry_f80);
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ZigType *entry = new_type_table_entry(ZigTypeIdFloat);
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entry->llvm_type = get_int_type(g, false, 128)->llvm_type;
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entry->size_in_bits = 8 * LLVMStoreSizeOfType(g->target_data_ref, entry->llvm_type);
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entry->abi_size = LLVMABISizeOfType(g->target_data_ref, entry->llvm_type);
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entry->abi_align = 16;
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buf_init_from_str(&entry->name, "f80");
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entry->data.floating.bit_count = 80;
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entry->llvm_di_type = ZigLLVMCreateDebugBasicType(g->dbuilder, buf_ptr(&entry->name),
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entry->size_in_bits, ZigLLVMEncoding_DW_ATE_unsigned());
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g->builtin_types.entry_f80 = entry;
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g->primitive_type_table.put(&entry->name, entry);
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}
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switch (g->zig_target->arch) {
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