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llvm: Update the list of targets that use native f16/f128.

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Closes #22003.
Closes #22013.
This commit is contained in:
Alex Rønne Petersen 2025-03-10 07:00:41 +01:00
parent cf9c6f5298
commit 858305385d
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2 changed files with 33 additions and 24 deletions
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30
lib/compiler_rt/common.zig
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@ -96,21 +96,25 @@ pub const want_sparc_abi = builtin.cpu.arch.isSPARC();
// we're trying to test compiler-rt.
pub const panic = if (builtin.is_test) std.debug.FullPanic(std.debug.defaultPanic) else std.debug.no_panic;
/// AArch64 is the only ABI (at the moment) to support f16 arguments without the
/// need for extending them to wider fp types.
/// TODO remove this; do this type selection in the language rather than
/// here in compiler-rt.
/// This seems to mostly correspond to `clang::TargetInfo::HasFloat16`.
pub fn F16T(comptime OtherType: type) type {
return switch (builtin.cpu.arch) {
.arm, .armeb, .thumb, .thumbeb => if (std.Target.arm.featureSetHas(builtin.cpu.features, .has_v8))
switch (builtin.abi.float()) {
.soft => u16,
.hard => f16,
}
else
u16,
.aarch64, .aarch64_be => f16,
.riscv32, .riscv64 => f16,
.amdgcn,
.arm,
.armeb,
.thumb,
.thumbeb,
.aarch64,
.aarch64_be,
.nvptx,
.nvptx64,
.riscv32,
.riscv64,
.spirv,
.spirv32,
.spirv64,
=> f16,
.hexagon => if (std.Target.hexagon.featureSetHas(builtin.target.cpu.features, .v68)) f16 else u16,
.x86, .x86_64 => if (builtin.target.os.tag.isDarwin()) switch (OtherType) {
// Starting with LLVM 16, Darwin uses different abi for f16
// depending on the type of the other return/argument..???

27
src/codegen/llvm.zig
View File

@ -12472,21 +12472,21 @@ fn backendSupportsF80(target: std.Target) bool {
/// or if it produces miscompilations.
fn backendSupportsF16(target: std.Target) bool {
return switch (target.cpu.arch) {
// LoongArch can be removed from this list with LLVM 20.
.loongarch32,
.loongarch64,
// https://github.com/llvm/llvm-project/issues/97981
.csky,
// https://github.com/llvm/llvm-project/issues/97981
.hexagon,
// https://github.com/llvm/llvm-project/issues/97981
.powerpc,
.powerpcle,
.powerpc64,
.powerpc64le,
// https://github.com/llvm/llvm-project/issues/97981
.wasm32,
.wasm64,
.mips,
.mipsel,
.mips64,
.mips64el,
// https://github.com/llvm/llvm-project/issues/50374
.s390x,
// https://github.com/llvm/llvm-project/issues/97981
.sparc,
.sparc64,
=> false,
@ -12494,7 +12494,8 @@ fn backendSupportsF16(target: std.Target) bool {
.armeb,
.thumb,
.thumbeb,
=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fullfp16),
// https://github.com/llvm/llvm-project/issues/129394
.aarch64,
.aarch64_be,
=> std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
@ -12507,11 +12508,18 @@ fn backendSupportsF16(target: std.Target) bool {
/// or if it produces miscompilations.
fn backendSupportsF128(target: std.Target) bool {
return switch (target.cpu.arch) {
// https://github.com/llvm/llvm-project/issues/121122
.amdgcn,
// Test failures all over the place.
.mips64,
.mips64el,
// https://github.com/llvm/llvm-project/issues/95471
.nvptx,
.nvptx64,
// https://github.com/llvm/llvm-project/issues/41838
.sparc,
=> false,
// https://github.com/llvm/llvm-project/issues/101545
.powerpc,
.powerpcle,
.powerpc64,
@ -12522,9 +12530,6 @@ fn backendSupportsF128(target: std.Target) bool {
.thumb,
.thumbeb,
=> target.abi.float() == .soft or std.Target.arm.featureSetHas(target.cpu.features, .fp_armv8),
.aarch64,
.aarch64_be,
=> std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
else => true,
};
}