diff --git a/src/analyze.cpp b/src/analyze.cpp
index 9062c1fb13..72762f4227 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -1003,7 +1003,8 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {
         g->zig_target->arch == ZigLLVM_x86_64 ||
         target_is_arm(g->zig_target) ||
         target_is_riscv(g->zig_target) ||
-        target_is_wasm(g->zig_target))
+        target_is_wasm(g->zig_target) ||
+        target_is_ppc(g->zig_target))
     {
         X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);
         return abi_class == X64CABIClass_MEMORY || abi_class == X64CABIClass_MEMORY_nobyval;
diff --git a/src/target.cpp b/src/target.cpp
index 73c0924ab8..a4cb03aabc 100644
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -853,6 +853,9 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
         case ZigLLVM_riscv32:
         case ZigLLVM_riscv64:
         case ZigLLVM_mipsel:
+        case ZigLLVM_ppc:
+        case ZigLLVM_ppc64:
+        case ZigLLVM_ppc64le:
             return "sp";
 
         case ZigLLVM_wasm32:
@@ -879,7 +882,6 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
         case ZigLLVM_msp430:
         case ZigLLVM_nvptx:
         case ZigLLVM_nvptx64:
-        case ZigLLVM_ppc64le:
         case ZigLLVM_r600:
         case ZigLLVM_renderscript32:
         case ZigLLVM_renderscript64:
@@ -893,8 +895,6 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
         case ZigLLVM_tce:
         case ZigLLVM_tcele:
         case ZigLLVM_xcore:
-        case ZigLLVM_ppc:
-        case ZigLLVM_ppc64:
         case ZigLLVM_ve:
             zig_panic("TODO populate this table with stack pointer register name for this CPU architecture");
     }
@@ -1318,6 +1318,11 @@ bool target_is_mips(const ZigTarget *target) {
         target->arch == ZigLLVM_mips64 || target->arch == ZigLLVM_mips64el;
 }
 
+bool target_is_ppc(const ZigTarget *target) {
+    return target->arch == ZigLLVM_ppc || target->arch == ZigLLVM_ppc64 ||
+        target->arch == ZigLLVM_ppc64le;
+}
+
 unsigned target_fn_align(const ZigTarget *target) {
     return 16;
 }
diff --git a/src/target.hpp b/src/target.hpp
index 898fa90203..9a8e79de97 100644
--- a/src/target.hpp
+++ b/src/target.hpp
@@ -95,6 +95,7 @@ ZigLLVM_OSType get_llvm_os_type(Os os_type);
 
 bool target_is_arm(const ZigTarget *target);
 bool target_is_mips(const ZigTarget *target);
+bool target_is_ppc(const ZigTarget *target);
 bool target_allows_addr_zero(const ZigTarget *target);
 bool target_has_valgrind_support(const ZigTarget *target);
 bool target_os_is_darwin(Os os);