From 844d3a5a74778ba76d5dc05c0dd747e7f8b85d4d Mon Sep 17 00:00:00 2001
From: Koakuma <koachan@protonmail.com>
Date: Sat, 9 Jul 2022 14:46:11 +0700
Subject: [PATCH] stage2: sparc64: Fix SPARCv9 shift opcodes encoding

---
 src/arch/sparc64/bits.zig | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/arch/sparc64/bits.zig b/src/arch/sparc64/bits.zig
index ea85c59f2b..4e6140bdab 100644
--- a/src/arch/sparc64/bits.zig
+++ b/src/arch/sparc64/bits.zig
@@ -1339,48 +1339,48 @@ pub const Instruction = union(enum) {
 
     pub fn sll(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
         return switch (s2) {
-            Register => format3k(0b11, 0b10_0101, .shift32, rs1, rs2, rd),
-            u5 => format3l(0b11, 0b10_0101, rs1, rs2, rd),
+            Register => format3k(0b10, 0b10_0101, .shift32, rs1, rs2, rd),
+            u5 => format3l(0b10, 0b10_0101, rs1, rs2, rd),
             else => unreachable,
         };
     }
 
     pub fn srl(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
         return switch (s2) {
-            Register => format3k(0b11, 0b10_0110, .shift32, rs1, rs2, rd),
-            u5 => format3l(0b11, 0b10_0110, rs1, rs2, rd),
+            Register => format3k(0b10, 0b10_0110, .shift32, rs1, rs2, rd),
+            u5 => format3l(0b10, 0b10_0110, rs1, rs2, rd),
             else => unreachable,
         };
     }
 
     pub fn sra(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
         return switch (s2) {
-            Register => format3k(0b11, 0b10_0111, .shift32, rs1, rs2, rd),
-            u5 => format3l(0b11, 0b10_0111, rs1, rs2, rd),
+            Register => format3k(0b10, 0b10_0111, .shift32, rs1, rs2, rd),
+            u5 => format3l(0b10, 0b10_0111, rs1, rs2, rd),
             else => unreachable,
         };
     }
 
     pub fn sllx(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
         return switch (s2) {
-            Register => format3k(0b11, 0b10_0101, .shift64, rs1, rs2, rd),
-            u6 => format3m(0b11, 0b10_0101, rs1, rs2, rd),
+            Register => format3k(0b10, 0b10_0101, .shift64, rs1, rs2, rd),
+            u6 => format3m(0b10, 0b10_0101, rs1, rs2, rd),
             else => unreachable,
         };
     }
 
     pub fn srlx(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
         return switch (s2) {
-            Register => format3k(0b11, 0b10_0110, .shift64, rs1, rs2, rd),
-            u6 => format3m(0b11, 0b10_0110, rs1, rs2, rd),
+            Register => format3k(0b10, 0b10_0110, .shift64, rs1, rs2, rd),
+            u6 => format3m(0b10, 0b10_0110, rs1, rs2, rd),
             else => unreachable,
         };
     }
 
     pub fn srax(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction {
         return switch (s2) {
-            Register => format3k(0b11, 0b10_0111, .shift64, rs1, rs2, rd),
-            u6 => format3m(0b11, 0b10_0111, rs1, rs2, rd),
+            Register => format3k(0b10, 0b10_0111, .shift64, rs1, rs2, rd),
+            u6 => format3m(0b10, 0b10_0111, rs1, rs2, rd),
             else => unreachable,
         };
     }