From 7e17cbbda5de49759f7b130320578ed96b3810a1 Mon Sep 17 00:00:00 2001 From: Jakub Konka Date: Wed, 27 Apr 2022 23:06:11 +0200 Subject: [PATCH] test: migrate riscv64 incremental tests --- test/cases.zig | 1 - .../hello_world_with_updates.0.zig | 21 ++++++++++++ .../hello_world_with_updates.1.zig | 27 +++++++++++++++ test/stage2/riscv64.zig | 33 ------------------- 4 files changed, 48 insertions(+), 34 deletions(-) create mode 100644 test/incremental/riscv64-linux/hello_world_with_updates.0.zig create mode 100644 test/incremental/riscv64-linux/hello_world_with_updates.1.zig delete mode 100644 test/stage2/riscv64.zig diff --git a/test/cases.zig b/test/cases.zig index cc77104fb9..fc38794cdd 100644 --- a/test/cases.zig +++ b/test/cases.zig @@ -12,7 +12,6 @@ pub fn addCases(ctx: *TestContext) !void { try @import("stage2/arm.zig").addCases(ctx); try @import("stage2/aarch64.zig").addCases(ctx); try @import("stage2/llvm.zig").addCases(ctx); - try @import("stage2/riscv64.zig").addCases(ctx); try @import("stage2/plan9.zig").addCases(ctx); try @import("stage2/x86_64.zig").addCases(ctx); try @import("stage2/sparcv9.zig").addCases(ctx); diff --git a/test/incremental/riscv64-linux/hello_world_with_updates.0.zig b/test/incremental/riscv64-linux/hello_world_with_updates.0.zig new file mode 100644 index 0000000000..dd119fd1f4 --- /dev/null +++ b/test/incremental/riscv64-linux/hello_world_with_updates.0.zig @@ -0,0 +1,21 @@ +pub fn main() void { + print(); +} + +fn print() void { + asm volatile ("ecall" + : + : [number] "{a7}" (64), + [arg1] "{a0}" (1), + [arg2] "{a1}" (@ptrToInt("Hello, World!\n")), + [arg3] "{a2}" ("Hello, World!\n".len), + : "rcx", "r11", "memory" + ); + return; +} + +// run +// target=riscv64-linux +// +// Hello, World! +// diff --git a/test/incremental/riscv64-linux/hello_world_with_updates.1.zig b/test/incremental/riscv64-linux/hello_world_with_updates.1.zig new file mode 100644 index 0000000000..26718738a9 --- /dev/null +++ b/test/incremental/riscv64-linux/hello_world_with_updates.1.zig @@ -0,0 +1,27 @@ +pub fn main() void { + print(); + print(); + print(); + print(); +} + +fn print() void { + asm volatile ("ecall" + : + : [number] "{a7}" (64), + [arg1] "{a0}" (1), + [arg2] "{a1}" (@ptrToInt("Hello, World!\n")), + [arg3] "{a2}" ("Hello, World!\n".len), + : "rcx", "r11", "memory" + ); + return; +} + +// run +// target=riscv64-linux +// +// Hello, World! +// Hello, World! +// Hello, World! +// Hello, World! +// diff --git a/test/stage2/riscv64.zig b/test/stage2/riscv64.zig deleted file mode 100644 index c492f1d6b7..0000000000 --- a/test/stage2/riscv64.zig +++ /dev/null @@ -1,33 +0,0 @@ -const std = @import("std"); -const TestContext = @import("../../src/test.zig").TestContext; - -const linux_riscv64 = std.zig.CrossTarget{ - .cpu_arch = .riscv64, - .os_tag = .linux, -}; - -pub fn addCases(ctx: *TestContext) !void { - { - var case = ctx.exe("riscv64 hello world", linux_riscv64); - // Regular old hello world - case.addCompareOutput( - \\pub fn main() void { - \\ print(); - \\} - \\ - \\fn print() void { - \\ asm volatile ("ecall" - \\ : - \\ : [number] "{a7}" (64), - \\ [arg1] "{a0}" (1), - \\ [arg2] "{a1}" (@ptrToInt("Hello, World!\n")), - \\ [arg3] "{a2}" ("Hello, World!\n".len) - \\ : "rcx", "r11", "memory" - \\ ); - \\ return; - \\} - , - "Hello, World!\n", - ); - } -}