diff --git a/lib/std/fmt.zig b/lib/std/fmt.zig
index e5bfca02b2..262d51bcee 100644
--- a/lib/std/fmt.zig
+++ b/lib/std/fmt.zig
@@ -2790,8 +2790,6 @@ test "positional/alignment/width/precision" {
 }
 
 test "vector" {
-    if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
-
     if (builtin.target.cpu.arch == .riscv64) {
         // https://github.com/ziglang/zig/issues/4486
         return error.SkipZigTest;
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
index d6a295cf27..655a93d9e4 100644
--- a/src/arch/x86_64/CodeGen.zig
+++ b/src/arch/x86_64/CodeGen.zig
@@ -8181,13 +8181,13 @@ fn genShiftBinOp(
         lhs_ty.fmt(mod),
     });
 
-    assert(rhs_ty.abiSize(mod) == 1);
     try self.spillEflagsIfOccupied();
 
     const lhs_abi_size = lhs_ty.abiSize(mod);
     if (lhs_abi_size > 16) return self.fail("TODO implement genShiftBinOp for {}", .{
         lhs_ty.fmt(mod),
     });
+    assert(rhs_ty.abiSize(mod) == 1);
 
     try self.register_manager.getReg(.rcx, null);
     const rcx_lock = self.register_manager.lockRegAssumeUnused(.rcx);