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x86_64: "implement" aggregate_init for vectors

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This commit is contained in:
Jacob Young 2023-12-03 13:55:16 -05:00
parent 82ba9b8560
commit 7c85ea65ba
3 changed files with 24 additions and 17 deletions
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30
src/arch/x86_64/CodeGen.zig
View File

@ -8480,7 +8480,8 @@ fn genBinOp(
if (maybe_mask_reg) |mask_reg| self.register_manager.lockRegAssumeUnused(mask_reg) else null;
defer if (mask_lock) |lock| self.register_manager.unlockReg(lock);
const ordered_air = if (lhs_ty.isVector(mod) and switch (lhs_ty.childType(mod).zigTypeTag(mod)) {
const ordered_air: [2]Air.Inst.Ref = if (lhs_ty.isVector(mod) and
switch (lhs_ty.childType(mod).zigTypeTag(mod)) {
.Int => switch (air_tag) {
.cmp_lt, .cmp_gte => true,
else => false,
@ -8490,14 +8491,24 @@ fn genBinOp(
else => false,
},
else => unreachable,
}) .{ .lhs = rhs_air, .rhs = lhs_air } else .{ .lhs = lhs_air, .rhs = rhs_air };
}) .{ rhs_air, lhs_air } else .{ lhs_air, rhs_air };
const lhs_mcv = try self.resolveInst(ordered_air.lhs);
var rhs_mcv = try self.resolveInst(ordered_air.rhs);
if (lhs_ty.isAbiInt(mod)) for (ordered_air) |op_air| {
switch (try self.resolveInst(op_air)) {
.register => |op_reg| switch (op_reg.class()) {
.sse => try self.register_manager.getReg(op_reg, null),
else => {},
},
else => {},
}
};
const lhs_mcv = try self.resolveInst(ordered_air[0]);
var rhs_mcv = try self.resolveInst(ordered_air[1]);
switch (lhs_mcv) {
.immediate => |imm| switch (imm) {
0 => switch (air_tag) {
.sub, .sub_wrap => return self.genUnOp(maybe_inst, .neg, ordered_air.rhs),
.sub, .sub_wrap => return self.genUnOp(maybe_inst, .neg, ordered_air[1]),
else => {},
},
else => {},
@ -8549,10 +8560,10 @@ fn genBinOp(
};
if (maybe_inst) |inst| {
if ((!sse_op or lhs_mcv.isRegister()) and
self.reuseOperandAdvanced(inst, ordered_air.lhs, 0, lhs_mcv, tracked_inst))
self.reuseOperandAdvanced(inst, ordered_air[0], 0, lhs_mcv, tracked_inst))
break :dst lhs_mcv;
if (is_commutative and (!sse_op or rhs_mcv.isRegister()) and
self.reuseOperandAdvanced(inst, ordered_air.rhs, 1, rhs_mcv, tracked_inst))
self.reuseOperandAdvanced(inst, ordered_air[1], 1, rhs_mcv, tracked_inst))
{
flipped = true;
break :dst rhs_mcv;
@ -8563,7 +8574,7 @@ fn genBinOp(
copied_to_dst = false
else
try self.genCopy(lhs_ty, dst_mcv, lhs_mcv);
rhs_mcv = try self.resolveInst(ordered_air.rhs);
rhs_mcv = try self.resolveInst(ordered_air[1]);
break :dst dst_mcv;
};
const dst_locks: [2]?RegisterLock = switch (dst_mcv) {
@ -15445,7 +15456,7 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void {
}
break :result .{ .load_frame = .{ .index = frame_index } };
},
.Array => {
.Array, .Vector => {
const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, mod));
const elem_ty = result_ty.childType(mod);
const elem_size: u32 = @intCast(elem_ty.abiSize(mod));
@ -15467,7 +15478,6 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void {
);
break :result .{ .load_frame = .{ .index = frame_index } };
},
.Vector => return self.fail("TODO implement aggregate_init for vectors", .{}),
else => unreachable,
}
};

9
test/behavior/cast.zig
View File

@ -1476,7 +1476,7 @@ test "coerce between pointers of compatible differently-named floats" {
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
if (builtin.os.tag == .windows) {
if (builtin.zig_backend == .stage2_llvm and builtin.os.tag == .windows) {
// https://github.com/ziglang/zig/issues/12396
return error.SkipZigTest;
}
@ -1723,7 +1723,6 @@ test "peer type resolution: array and vector with same child type" {
test "peer type resolution: array with smaller child type and vector with larger child type" {
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; // TODO
@ -2311,11 +2310,11 @@ test "cast builtins can wrap result in error union and optional" {
test "@floatCast on vector" {
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
const S = struct {
fn doTheTest() !void {
@ -2332,7 +2331,6 @@ test "@floatCast on vector" {
test "@ptrFromInt on vector" {
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
@ -2382,11 +2380,11 @@ test "@intFromPtr on vector" {
test "@floatFromInt on vector" {
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
const S = struct {
fn doTheTest() !void {
@ -2403,7 +2401,6 @@ test "@floatFromInt on vector" {
test "@intFromFloat on vector" {
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO

2
test/behavior/vector.zig
View File

@ -222,7 +222,7 @@ test "array to vector with element type coercion" {
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
const S = struct {
fn doTheTest() !void {