mirror of
https://github.com/ziglang/zig.git
synced 2026-02-21 16:54:52 +00:00
- move writing code to zig-dwarfdump
- implement restore_state, restore_extended, offset_extended
This commit is contained in:
kcbanner
parent
338df862d1
commit
7b4611cfb3
@ -16,6 +16,7 @@ pub const ATE = @import("dwarf/ATE.zig");
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pub const EH = @import("dwarf/EH.zig");
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pub const abi = @import("dwarf/abi.zig");
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pub const call_frame = @import("dwarf/call_frame.zig");
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pub const expressions = @import("dwarf/expressions.zig");
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pub const LLE = struct {
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pub const end_of_list = 0x00;
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@ -1,9 +1,11 @@
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const builtin = @import("builtin");
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const std = @import("../std.zig");
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const debug = std.debug;
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const leb = @import("../leb128.zig");
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const abi = @import("abi.zig");
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const dwarf = @import("../dwarf.zig");
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const expressions = @import("expressions.zig");
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const assert = std.debug.assert;
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const Opcode = enum(u8) {
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advance_loc = 0x1 << 6,
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@ -36,7 +38,7 @@ const Opcode = enum(u8) {
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// These opcodes encode an operand in the lower 6 bits of the opcode itself
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pub const lo_inline = Opcode.advance_loc;
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pub const hi_inline = Opcode.restore;
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pub const hi_inline = @enumToInt(Opcode.restore) | 0b111111;
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// These opcodes are trailed by zero or more operands
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pub const lo_reserved = Opcode.nop;
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@ -61,7 +63,7 @@ const Operand = enum {
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fn Storage(comptime self: Operand) type {
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return switch (self) {
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.opcode_delta, .opcode_register => u6,
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.opcode_delta, .opcode_register => u8,
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.uleb128_register => u8,
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.uleb128_offset => u64,
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.sleb128_offset => i64,
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@ -110,7 +112,7 @@ const Operand = enum {
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fn InstructionType(comptime definition: anytype) type {
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const definition_type = @typeInfo(@TypeOf(definition));
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debug.assert(definition_type == .Struct);
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assert(definition_type == .Struct);
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const definition_len = definition_type.Struct.fields.len;
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comptime var fields: [definition_len]std.builtin.Type.StructField = undefined;
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@ -159,14 +161,14 @@ fn InstructionType(comptime definition: anytype) type {
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pub const Instruction = union(Opcode) {
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advance_loc: InstructionType(.{ .delta = .opcode_delta }),
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offset: InstructionType(.{ .register = .opcode_register, .offset = .uleb128_offset }),
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offset_extended: InstructionType(.{ .register = .uleb128_register, .offset = .uleb128_offset }),
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restore: InstructionType(.{ .register = .opcode_register }),
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restore_extended: InstructionType(.{ .register = .uleb128_register }),
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nop: InstructionType(.{}),
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set_loc: InstructionType(.{ .address = .address }),
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advance_loc1: InstructionType(.{ .delta = .u8_delta }),
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advance_loc2: InstructionType(.{ .delta = .u16_delta }),
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advance_loc4: InstructionType(.{ .delta = .u32_delta }),
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offset_extended: InstructionType(.{ .register = .uleb128_register, .offset = .uleb128_offset }),
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restore_extended: InstructionType(.{ .register = .uleb128_register }),
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undefined: InstructionType(.{ .register = .uleb128_register }),
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same_value: InstructionType(.{ .register = .uleb128_register }),
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register: InstructionType(.{ .register = .uleb128_register, .offset = .uleb128_offset }),
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@ -192,7 +194,7 @@ pub const Instruction = union(Opcode) {
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@setEvalBranchQuota(1800);
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return switch (try stream.reader().readByte()) {
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inline @enumToInt(Opcode.lo_inline)...@enumToInt(Opcode.hi_inline) => |opcode| blk: {
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inline @enumToInt(Opcode.lo_inline)...Opcode.hi_inline => |opcode| blk: {
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const e = @intToEnum(Opcode, opcode & 0b11000000);
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const payload_type = std.meta.TagPayload(Instruction, e);
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const value = try payload_type.read(stream, @intCast(u6, opcode & 0b111111), addr_size_bytes, endian);
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@ -205,112 +207,15 @@ pub const Instruction = union(Opcode) {
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break :blk @unionInit(Instruction, @tagName(e), value);
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},
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Opcode.lo_user...Opcode.hi_user => error.UnimplementedUserOpcode,
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else => error.InvalidOpcode,
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else => |opcode| blk: {
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std.debug.print("Opcode {x}\n", .{opcode});
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break :blk error.InvalidOpcode;
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},
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};
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}
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pub fn writeOperands(
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self: Instruction,
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writer: anytype,
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cie: dwarf.CommonInformationEntry,
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arch: ?std.Target.Cpu.Arch,
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addr_size_bytes: u8,
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endian: std.builtin.Endian,
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) !void {
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switch (self) {
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inline .advance_loc, .advance_loc1, .advance_loc2, .advance_loc4 => |i| try writer.print("{}", .{i.operands.delta * cie.code_alignment_factor}),
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.offset => |i| {
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try abi.writeRegisterName(writer, arch, i.operands.register);
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try writer.print(" {}", .{@intCast(i64, i.operands.offset) * cie.data_alignment_factor});
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},
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.restore => {},
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.nop => {},
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.set_loc => {},
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.offset_extended => {},
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.restore_extended => {},
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.undefined => {},
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.same_value => {},
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.register => {},
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.remember_state => {},
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.restore_state => {},
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.def_cfa => |i| try writer.print("{} {d:<1}", .{ abi.fmtRegister(i.operands.register, arch), @intCast(i64, i.operands.offset)}),
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.def_cfa_register => |i| try abi.writeRegisterName(writer, arch, i.operands.register),
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.def_cfa_offset => |i| try writer.print("{d:<1}", .{@intCast(i64, i.operands.offset)}),
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.def_cfa_expression => |i| try writeExpression(writer, i.operands.block, arch, addr_size_bytes, endian),
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.expression => {},
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.offset_extended_sf => {},
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.def_cfa_sf => {},
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.def_cfa_offset_sf => {},
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.val_offset => {},
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.val_offset_sf => {},
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.val_expression => {},
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}
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}
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};
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fn writeExpression(
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writer: anytype,
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block: []const u8,
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arch: ?std.Target.Cpu.Arch,
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addr_size_bytes: u8,
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endian: std.builtin.Endian,
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) !void {
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var stream = std.io.fixedBufferStream(block);
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// Generate a lookup table from opcode value to name
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const opcode_lut_len = 256;
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const opcode_lut: [opcode_lut_len]?[]const u8 = comptime blk: {
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var lut: [opcode_lut_len]?[]const u8 = [_]?[]const u8{null} ** opcode_lut_len;
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for (@typeInfo(dwarf.OP).Struct.decls) |decl| {
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lut[@as(u8, @field(dwarf.OP, decl.name))] = decl.name;
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}
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break :blk lut;
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};
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switch (endian) {
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inline .Little, .Big => |e| {
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switch (addr_size_bytes) {
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inline 2, 4, 8 => |size| {
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const StackMachine = expressions.StackMachine(.{
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.addr_size = size,
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.endian = e,
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.call_frame_mode = true,
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});
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const reader = stream.reader();
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while (stream.pos < stream.buffer.len) {
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if (stream.pos > 0) try writer.writeAll(", ");
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const opcode = try reader.readByte();
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if (opcode_lut[opcode]) |opcode_name| {
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try writer.print("DW_OP_{s}", .{opcode_name});
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} else {
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// TODO: See how llvm-dwarfdump prints these?
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if (opcode >= dwarf.OP.lo_user and opcode <= dwarf.OP.lo_user) {
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try writer.print("<unknown vendor opcode: 0x{x}>", .{opcode});
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} else {
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try writer.print("<invalid opcode: 0x{x}>", .{opcode});
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}
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}
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if (try StackMachine.readOperand(&stream, opcode)) |value| {
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switch (value) {
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//.generic => |v| try writer.print("{d}", .{v}),
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.generic => {}, // Constant values are implied by the opcode name
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.register => |v| try writer.print(" {}", .{ abi.fmtRegister(v, arch) }),
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.base_register => |v| try writer.print(" {}{d:<1}", .{ abi.fmtRegister(v.base_register, arch), v.offset }),
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else => try writer.print(" TODO({s})", .{@tagName(value)}),
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}
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}
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}
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},
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else => return error.InvalidAddrSize,
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}
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},
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}
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}
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/// See section 6.4.1 of the DWARF5 specification
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pub const VirtualMachine = struct {
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const RegisterRule = union(enum) {
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@ -324,52 +229,6 @@ pub const VirtualMachine = struct {
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architectural: void,
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};
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pub const Column = struct {
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register: u8 = undefined,
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rule: RegisterRule = .{ .undefined = {} },
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pub fn writeRule(
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self: Column,
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writer: anytype,
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is_cfa: bool,
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arch: ?std.Target.Cpu.Arch,
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addr_size_bytes: u8,
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endian: std.builtin.Endian,
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) !void {
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if (is_cfa) {
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try writer.writeAll("CFA");
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} else {
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try abi.writeRegisterName(writer, arch, self.register);
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}
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try writer.writeByte('=');
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switch (self.rule) {
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.undefined => {},
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.same_value => try writer.writeAll("S"),
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.offset => |offset| {
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if (is_cfa) {
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try abi.writeRegisterName(writer, arch, self.register);
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try writer.print("{d:<1}", .{offset});
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} else {
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try writer.print("[CFA{d:<1}]", .{offset});
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}
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},
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.val_offset => |offset| {
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if (is_cfa) {
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try abi.writeRegisterName(writer, arch, self.register);
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try writer.print("{d:<1}", .{offset});
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} else {
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try writer.print("CFA{d:<1}", .{offset});
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}
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},
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.register => |register| try abi.writeRegisterName(writer, arch, register),
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.expression => |expression| try writeExpression(writer, expression, arch, addr_size_bytes, endian),
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.val_expression => try writer.writeAll("TODO(val_expression)"),
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.architectural => try writer.writeAll("TODO(architectural)"),
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}
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}
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};
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/// Each row contains unwinding rules for a set of registers at a specific location in the
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pub const Row = struct {
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/// Offset from pc_begin
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@ -381,6 +240,12 @@ pub const VirtualMachine = struct {
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columns: ColumnRange = .{},
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};
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pub const Column = struct {
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/// Register can only null in the case of the CFA column
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register: ?u8 = null,
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rule: RegisterRule = .{ .undefined = {} },
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};
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const ColumnRange = struct {
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/// Index into `columns` of the first column in this row.
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start: usize = undefined,
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@ -391,10 +256,14 @@ pub const VirtualMachine = struct {
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stack: std.ArrayListUnmanaged(ColumnRange) = .{},
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current_row: Row = .{},
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/// The result of executing the CIE's initial_instructions
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cie_row: ?Row = null,
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pub fn reset(self: *VirtualMachine) void {
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self.stack.clearRetainingCapacity();
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self.columns.clearRetainingCapacity();
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self.current_row = .{};
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self.cie_row = null;
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}
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pub fn deinit(self: *VirtualMachine, allocator: std.mem.Allocator) void {
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@ -403,12 +272,14 @@ pub const VirtualMachine = struct {
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self.* = undefined;
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}
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pub fn getColumns(self: VirtualMachine, row: Row) []Column {
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/// Return a slice backed by the row's non-CFA columns
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pub fn rowColumns(self: VirtualMachine, row: Row) []Column {
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return self.columns.items[row.columns.start..][0..row.columns.len];
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}
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/// Either retrieves or adds a column for `register` (non-CFA) in the current row
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fn getOrAddColumn(self: *VirtualMachine, allocator: std.mem.Allocator, register: u8) !*Column {
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for (self.getColumns(self.current_row)) |*c| {
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for (self.rowColumns(self.current_row)) |*c| {
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if (c.register == register) return c;
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}
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@ -425,20 +296,82 @@ pub const VirtualMachine = struct {
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return column;
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}
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pub fn step(self: *VirtualMachine, allocator: std.mem.Allocator, cie: dwarf.CommonInformationEntry, instruction: Instruction) !void {
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/// Runs the CIE instructions, then the FDE instructions. Execution halts
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/// once the row that corresponds to `pc` is known, and it is returned.
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pub fn unwindTo(
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self: *VirtualMachine,
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allocator: std.mem.Allocator,
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pc: u64,
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cie: dwarf.CommonInformationEntry,
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fde: dwarf.FrameDescriptionEntry,
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addr_size_bytes: u8,
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endian: std.builtin.Endian,
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) !Row {
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assert(self.cie_row == null);
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if (pc < fde.pc_begin or pc >= fde.pc_begin + fde.pc_range) return error.AddressOutOfRange;
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var prev_row: Row = self.current_row;
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const streams = .{
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std.io.fixedBufferStream(cie.initial_instructions),
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std.io.fixedBufferStream(fde.instructions),
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};
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outer: for (streams, 0..) |*stream, i| {
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while (stream.pos < stream.buffer.len) {
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const instruction = try dwarf.call_frame.Instruction.read(stream, addr_size_bytes, endian);
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prev_row = try self.step(allocator, cie, i == 0, instruction);
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if (pc < fde.pc_begin + self.current_row.offset) {
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break :outer;
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}
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}
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}
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return prev_row;
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}
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pub fn unwindToNative(
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self: *VirtualMachine,
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allocator: std.mem.Allocator,
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pc: u64,
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cie: dwarf.CommonInformationEntry,
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fde: dwarf.FrameDescriptionEntry,
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) void {
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self.stepTo(allocator, pc, cie, fde, @sizeOf(usize), builtin.target.cpu.arch.endian());
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}
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/// Executes a single instruction.
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/// If this instruction is from the CIE, `is_initial` should be set.
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/// Returns the value of `current_row` before executing this instruction
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pub fn step(
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self: *VirtualMachine,
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allocator: std.mem.Allocator,
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cie: dwarf.CommonInformationEntry,
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is_initial: bool,
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instruction: Instruction,
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) !Row {
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// CIE instructions must be run before FDE instructions
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assert(!is_initial or self.cie_row == null);
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if (!is_initial and self.cie_row == null) self.cie_row = self.current_row;
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const prev_row = self.current_row;
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switch (instruction) {
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inline .advance_loc, .advance_loc1, .advance_loc2, .advance_loc4 => |i| {
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self.current_row.offset += i.operands.delta * cie.code_alignment_factor;
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},
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.offset => |i| {
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inline .offset, .offset_extended => |i| {
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const column = try self.getOrAddColumn(allocator, i.operands.register);
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column.rule = .{ .offset = @intCast(i64, i.operands.offset) * cie.data_alignment_factor };
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},
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.restore => {},
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inline .restore, .restore_extended => |i| {
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if (self.cie_row) |cie_row| {
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const column = try self.getOrAddColumn(allocator, i.operands.register);
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column.rule = for (self.rowColumns(cie_row)) |cie_column| {
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if (cie_column.register == i.operands.register) break cie_column.rule;
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} else .{ .undefined = {} };
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} else return error.InvalidOperation;
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},
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.nop => {},
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.set_loc => {},
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.offset_extended => {},
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.restore_extended => {},
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.undefined => {},
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.same_value => {},
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.register => {},
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@ -448,17 +381,19 @@ pub const VirtualMachine = struct {
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const new_start = self.columns.items.len;
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if (self.current_row.columns.len > 0) {
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// Since we're copying from the same backing array, ensure it won't be reallocated
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try self.columns.ensureUnusedCapacity(allocator, self.current_row.columns.len);
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self.columns.appendSliceAssumeCapacity(self.getColumns(self.current_row));
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self.columns.appendSliceAssumeCapacity(self.rowColumns(self.current_row));
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self.current_row.columns.start = new_start;
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}
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},
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.restore_state => {
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// TODO: Is it possible to remove the duplicate from above? Other instructions may have added columns since then though
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const columns = self.stack.popOrNull() orelse return error.InvalidOperation;
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self.current_row.columns.len = columns.len;
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self.current_row.columns.start = columns.start;
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const restored_columns = self.stack.popOrNull() orelse return error.InvalidOperation;
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self.columns.shrinkRetainingCapacity(self.columns.items.len - self.current_row.columns.len);
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try self.columns.ensureUnusedCapacity(allocator, restored_columns.len);
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self.current_row.columns.start = self.columns.items.len;
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self.current_row.columns.len = restored_columns.len;
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self.columns.appendSliceAssumeCapacity(self.columns.items[restored_columns.start..][0..restored_columns.len]);
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},
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.def_cfa => |i| {
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self.current_row.cfa = .{
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@ -488,5 +423,7 @@ pub const VirtualMachine = struct {
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.val_offset_sf => {},
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.val_expression => {},
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}
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return prev_row;
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}
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};
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