mirror of
https://github.com/ziglang/zig.git
synced 2026-02-15 05:48:31 +00:00
stage2 ARM: re-enable debug info for arguments
These were disabled during the MIR transition
This commit is contained in:
parent
4e5495e443
commit
7665401500
@ -43,7 +43,7 @@ err_msg: ?*ErrorMsg,
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args: []MCValue,
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ret_mcv: MCValue,
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fn_type: Type,
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arg_index: usize,
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arg_index: u32,
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src_loc: Module.SrcLoc,
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stack_align: u32,
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@ -302,6 +302,7 @@ pub fn generate(
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var emit = Emit{
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.mir = mir,
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.bin_file = bin_file,
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.function = &function,
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.debug_output = debug_output,
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.target = &bin_file.options.target,
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.src_loc = src_loc,
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@ -706,29 +707,6 @@ fn ensureProcessDeathCapacity(self: *Self, additional_count: usize) !void {
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try table.ensureUnusedCapacity(self.gpa, additional_count);
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}
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/// Adds a Type to the .debug_info at the current position. The bytes will be populated later,
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/// after codegen for this symbol is done.
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fn addDbgInfoTypeReloc(self: *Self, ty: Type) !void {
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switch (self.debug_output) {
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.dwarf => |dbg_out| {
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assert(ty.hasCodeGenBits());
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const index = dbg_out.dbg_info.items.len;
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try dbg_out.dbg_info.resize(index + 4); // DW.AT.type, DW.FORM.ref4
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const gop = try dbg_out.dbg_info_type_relocs.getOrPut(self.gpa, ty);
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if (!gop.found_existing) {
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gop.value_ptr.* = .{
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.off = undefined,
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.relocs = .{},
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};
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}
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try gop.value_ptr.relocs.append(self.gpa, @intCast(u32, index));
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},
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.plan9 => {},
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.none => {},
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}
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}
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fn allocMem(self: *Self, inst: Air.Inst.Index, abi_size: u32, abi_align: u32) !u32 {
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if (abi_align > self.stack_align)
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self.stack_align = abi_align;
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@ -1171,6 +1149,9 @@ fn airSlicePtr(self: *Self, inst: Air.Inst.Index) !void {
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switch (mcv) {
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.dead, .unreach => unreachable,
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.register => unreachable, // a slice doesn't fit in one register
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.stack_argument_offset => |off| {
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break :result MCValue{ .stack_argument_offset = off };
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},
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.stack_offset => |off| {
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break :result MCValue{ .stack_offset = off };
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},
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@ -1190,6 +1171,9 @@ fn airSliceLen(self: *Self, inst: Air.Inst.Index) !void {
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switch (mcv) {
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.dead, .unreach => unreachable,
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.register => unreachable, // a slice doesn't fit in one register
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.stack_argument_offset => |off| {
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break :result MCValue{ .stack_argument_offset = off + 4 };
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},
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.stack_offset => |off| {
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break :result MCValue{ .stack_offset = off + 4 };
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},
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@ -1208,7 +1192,6 @@ fn airPtrSliceLenPtr(self: *Self, inst: Air.Inst.Index) !void {
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const mcv = try self.resolveInst(ty_op.operand);
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switch (mcv) {
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.dead, .unreach => unreachable,
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.register => unreachable, // a slice doesn't fit in one register
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.ptr_stack_offset => |off| {
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break :result MCValue{ .ptr_stack_offset = off + 4 };
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},
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@ -1224,7 +1207,6 @@ fn airPtrSlicePtrPtr(self: *Self, inst: Air.Inst.Index) !void {
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const mcv = try self.resolveInst(ty_op.operand);
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switch (mcv) {
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.dead, .unreach => unreachable,
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.register => unreachable, // a slice doesn't fit in one register
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.ptr_stack_offset => |off| {
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break :result MCValue{ .ptr_stack_offset = off };
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},
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@ -2135,66 +2117,6 @@ fn genArmInlineMemcpy(
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// end:
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}
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fn genArgDbgInfo(self: *Self, inst: Air.Inst.Index, mcv: MCValue) !void {
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const ty_str = self.air.instructions.items(.data)[inst].ty_str;
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const zir = &self.mod_fn.owner_decl.getFileScope().zir;
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const name = zir.nullTerminatedString(ty_str.str);
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const name_with_null = name.ptr[0 .. name.len + 1];
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const ty = self.air.getRefType(ty_str.ty);
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switch (mcv) {
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.register => |reg| {
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switch (self.debug_output) {
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.dwarf => |dbg_out| {
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try dbg_out.dbg_info.ensureUnusedCapacity(3);
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dbg_out.dbg_info.appendAssumeCapacity(link.File.Elf.abbrev_parameter);
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dbg_out.dbg_info.appendSliceAssumeCapacity(&[2]u8{ // DW.AT.location, DW.FORM.exprloc
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1, // ULEB128 dwarf expression length
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reg.dwarfLocOp(),
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});
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try dbg_out.dbg_info.ensureUnusedCapacity(5 + name_with_null.len);
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try self.addDbgInfoTypeReloc(ty); // DW.AT.type, DW.FORM.ref4
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dbg_out.dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string
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},
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.plan9 => {},
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.none => {},
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}
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},
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.stack_offset => |offset| {
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switch (self.debug_output) {
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.dwarf => |dbg_out| {
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const abi_size = math.cast(u32, ty.abiSize(self.target.*)) catch {
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return self.fail("type '{}' too big to fit into stack frame", .{ty});
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};
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const adjusted_stack_offset = math.negateCast(offset + abi_size) catch {
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return self.fail("Stack offset too large for arguments", .{});
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};
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try dbg_out.dbg_info.append(link.File.Elf.abbrev_parameter);
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// Get length of the LEB128 stack offset
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var counting_writer = std.io.countingWriter(std.io.null_writer);
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leb128.writeILEB128(counting_writer.writer(), adjusted_stack_offset) catch unreachable;
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// DW.AT.location, DW.FORM.exprloc
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// ULEB128 dwarf expression length
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try leb128.writeULEB128(dbg_out.dbg_info.writer(), counting_writer.bytes_written + 1);
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try dbg_out.dbg_info.append(DW.OP.breg11);
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try leb128.writeILEB128(dbg_out.dbg_info.writer(), adjusted_stack_offset);
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try dbg_out.dbg_info.ensureUnusedCapacity(5 + name_with_null.len);
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try self.addDbgInfoTypeReloc(ty); // DW.AT.type, DW.FORM.ref4
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dbg_out.dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string
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},
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.plan9 => {},
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.none => {},
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}
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},
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.stack_argument_offset => return self.fail("TODO genArgDbgInfo for stack_argument_offset", .{}),
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else => {},
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}
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}
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fn airArg(self: *Self, inst: Air.Inst.Index) !void {
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const arg_index = self.arg_index;
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self.arg_index += 1;
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@ -2216,8 +2138,15 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void {
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},
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else => result,
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};
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// TODO generate debug info
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// try self.genArgDbgInfo(inst, mcv);
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_ = try self.addInst(.{
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.tag = .dbg_arg,
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.cond = undefined,
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.data = .{ .dbg_arg_info = .{
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.air_inst = inst,
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.arg_index = arg_index,
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} },
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});
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if (self.liveness.isUnused(inst))
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return self.finishAirBookkeeping();
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@ -3496,7 +3425,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
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}
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},
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.stack_argument_offset => |unadjusted_off| {
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// TODO: maybe addressing from sp instead of fp
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const abi_size = ty.abiSize(self.target.*);
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const adj_off = unadjusted_off + abi_size;
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@ -8,6 +8,8 @@ const Mir = @import("Mir.zig");
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const bits = @import("bits.zig");
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const link = @import("../../link.zig");
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const Module = @import("../../Module.zig");
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const Air = @import("../../Air.zig");
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const Type = @import("../../type.zig").Type;
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const ErrorMsg = Module.ErrorMsg;
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const assert = std.debug.assert;
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const DW = std.dwarf;
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@ -16,9 +18,11 @@ const Instruction = bits.Instruction;
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const Register = bits.Register;
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const log = std.log.scoped(.aarch64_emit);
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const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
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const CodeGen = @import("CodeGen.zig");
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mir: Mir,
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bin_file: *link.File,
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function: *const CodeGen,
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debug_output: DebugInfoOutput,
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target: *const std.Target,
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err_msg: ?*ErrorMsg = null,
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@ -95,6 +99,8 @@ pub fn emitMir(
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.blx => try emit.mirBranchExchange(inst),
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.bx => try emit.mirBranchExchange(inst),
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.dbg_arg => try emit.mirDbgArg(inst),
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.dbg_line => try emit.mirDbgLine(inst),
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.dbg_prologue_end => try emit.mirDebugPrologueEnd(),
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@ -106,9 +112,9 @@ pub fn emitMir(
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.str => try emit.mirLoadStore(inst),
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.strb => try emit.mirLoadStore(inst),
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.ldr_stack_argument => try emit.mirLoadStack(inst),
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.ldrb_stack_argument => try emit.mirLoadStack(inst),
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.ldrh_stack_argument => try emit.mirLoadStack(inst),
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.ldr_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldrb_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldrh_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldrh => try emit.mirLoadStoreExtra(inst),
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.strh => try emit.mirLoadStoreExtra(inst),
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@ -168,6 +174,7 @@ fn instructionSize(emit: *Emit, inst: Mir.Inst.Index) usize {
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.dbg_line,
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.dbg_epilogue_begin,
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.dbg_prologue_end,
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.dbg_arg,
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=> return 0,
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else => return 4,
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}
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@ -360,6 +367,98 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {
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}
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}
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/// Adds a Type to the .debug_info at the current position. The bytes will be populated later,
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/// after codegen for this symbol is done.
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fn addDbgInfoTypeReloc(self: *Emit, ty: Type) !void {
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switch (self.debug_output) {
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.dwarf => |dbg_out| {
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assert(ty.hasCodeGenBits());
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const index = dbg_out.dbg_info.items.len;
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try dbg_out.dbg_info.resize(index + 4); // DW.AT.type, DW.FORM.ref4
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const gop = try dbg_out.dbg_info_type_relocs.getOrPut(self.bin_file.allocator, ty);
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if (!gop.found_existing) {
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gop.value_ptr.* = .{
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.off = undefined,
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.relocs = .{},
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};
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}
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try gop.value_ptr.relocs.append(self.bin_file.allocator, @intCast(u32, index));
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},
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.plan9 => {},
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.none => {},
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}
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}
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fn genArgDbgInfo(self: *Emit, inst: Air.Inst.Index, arg_index: u32) !void {
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const mcv = self.function.args[arg_index];
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const ty_str = self.function.air.instructions.items(.data)[inst].ty_str;
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const zir = &self.function.mod_fn.owner_decl.getFileScope().zir;
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const name = zir.nullTerminatedString(ty_str.str);
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const name_with_null = name.ptr[0 .. name.len + 1];
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const ty = self.function.air.getRefType(ty_str.ty);
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switch (mcv) {
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.register => |reg| {
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switch (self.debug_output) {
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.dwarf => |dbg_out| {
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try dbg_out.dbg_info.ensureUnusedCapacity(3);
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dbg_out.dbg_info.appendAssumeCapacity(link.File.Elf.abbrev_parameter);
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dbg_out.dbg_info.appendSliceAssumeCapacity(&[2]u8{ // DW.AT.location, DW.FORM.exprloc
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1, // ULEB128 dwarf expression length
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reg.dwarfLocOp(),
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});
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try dbg_out.dbg_info.ensureUnusedCapacity(5 + name_with_null.len);
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try self.addDbgInfoTypeReloc(ty); // DW.AT.type, DW.FORM.ref4
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dbg_out.dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string
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},
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.plan9 => {},
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.none => {},
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}
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},
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.stack_offset,
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.stack_argument_offset,
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=> {
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switch (self.debug_output) {
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.dwarf => |dbg_out| {
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const abi_size = math.cast(u32, ty.abiSize(self.target.*)) catch {
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return self.fail("type '{}' too big to fit into stack frame", .{ty});
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};
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const adjusted_stack_offset = switch (mcv) {
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.stack_offset => |offset| math.negateCast(offset + abi_size) catch {
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return self.fail("Stack offset too large for arguments", .{});
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},
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.stack_argument_offset => |offset| math.cast(i32, self.prologue_stack_space - offset - abi_size) catch {
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return self.fail("Stack offset too large for arguments", .{});
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},
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else => unreachable,
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};
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try dbg_out.dbg_info.append(link.File.Elf.abbrev_parameter);
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// Get length of the LEB128 stack offset
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var counting_writer = std.io.countingWriter(std.io.null_writer);
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leb128.writeILEB128(counting_writer.writer(), adjusted_stack_offset) catch unreachable;
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// DW.AT.location, DW.FORM.exprloc
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// ULEB128 dwarf expression length
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try leb128.writeULEB128(dbg_out.dbg_info.writer(), counting_writer.bytes_written + 1);
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try dbg_out.dbg_info.append(DW.OP.breg11);
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try leb128.writeILEB128(dbg_out.dbg_info.writer(), adjusted_stack_offset);
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try dbg_out.dbg_info.ensureUnusedCapacity(5 + name_with_null.len);
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try self.addDbgInfoTypeReloc(ty); // DW.AT.type, DW.FORM.ref4
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dbg_out.dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string
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},
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.plan9 => {},
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.none => {},
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}
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},
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else => unreachable, // not a possible argument
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}
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}
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fn mirDataProcessing(emit: *Emit, inst: Mir.Inst.Index) !void {
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const tag = emit.mir.instructions.items(.tag)[inst];
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const cond = emit.mir.instructions.items(.cond)[inst];
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@ -430,6 +529,16 @@ fn mirBranchExchange(emit: *Emit, inst: Mir.Inst.Index) !void {
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}
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}
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fn mirDbgArg(emit: *Emit, inst: Mir.Inst.Index) !void {
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const tag = emit.mir.instructions.items(.tag)[inst];
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const dbg_arg_info = emit.mir.instructions.items(.data)[inst].dbg_arg_info;
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switch (tag) {
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.dbg_arg => try emit.genArgDbgInfo(dbg_arg_info.air_inst, dbg_arg_info.arg_index),
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else => unreachable,
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}
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}
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fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
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const tag = emit.mir.instructions.items(.tag)[inst];
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const dbg_line_column = emit.mir.instructions.items(.data)[inst].dbg_line_column;
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@ -476,7 +585,7 @@ fn mirLoadStore(emit: *Emit, inst: Mir.Inst.Index) !void {
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}
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}
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fn mirLoadStack(emit: *Emit, inst: Mir.Inst.Index) !void {
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fn mirLoadStackArgument(emit: *Emit, inst: Mir.Inst.Index) !void {
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const tag = emit.mir.instructions.items(.tag)[inst];
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const cond = emit.mir.instructions.items(.cond)[inst];
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const r_stack_offset = emit.mir.instructions.items(.data)[inst].r_stack_offset;
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@ -12,6 +12,7 @@ const builtin = @import("builtin");
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const assert = std.debug.assert;
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const bits = @import("bits.zig");
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const Air = @import("../../Air.zig");
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const Register = bits.Register;
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instructions: std.MultiArrayList(Inst).Slice,
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@ -41,6 +42,8 @@ pub const Inst = struct {
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bx,
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/// Compare
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cmp,
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/// Pseudo-instruction: Argument
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dbg_arg,
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/// Pseudo-instruction: End of prologue
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dbg_prologue_end,
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/// Pseudo-instruction: Beginning of epilogue
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@ -195,6 +198,13 @@ pub const Inst = struct {
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line: u32,
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column: u32,
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},
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/// Debug info: argument
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///
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/// Used by e.g. dbg_arg
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dbg_arg_info: struct {
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air_inst: Air.Inst.Index,
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arg_index: u32,
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},
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};
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// Make sure we don't accidentally make instructions bigger than expected.
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