From 731dda18dde439631ed93afb0c0a199dc8842726 Mon Sep 17 00:00:00 2001 From: Koakuma Date: Sat, 19 Mar 2022 09:06:58 +0700 Subject: [PATCH] stage2 sparcv9: zig fmt --- src/arch/sparcv9/abi.zig | 8 ++++---- src/arch/sparcv9/bits.zig | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/arch/sparcv9/abi.zig b/src/arch/sparcv9/abi.zig index 90b565adc1..5c9ea979fc 100644 --- a/src/arch/sparcv9/abi.zig +++ b/src/arch/sparcv9/abi.zig @@ -5,8 +5,8 @@ const Register = bits.Register; // so no need to do it manually pub const callee_preserved_regs = [_]Register{}; -pub const c_abi_int_param_regs_caller_view = [_]Register{.o0, .o1, .o2, .o3, .o4, .o5}; -pub const c_abi_int_param_regs_callee_view = [_]Register{.@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5"}; +pub const c_abi_int_param_regs_caller_view = [_]Register{ .o0, .o1, .o2, .o3, .o4, .o5 }; +pub const c_abi_int_param_regs_callee_view = [_]Register{ .@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5" }; -pub const c_abi_int_return_regs_caller_view = [_]Register{.o0, .o1, .o2, .o3, .o4, .o5}; -pub const c_abi_int_return_regs_callee_view = [_]Register{.@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5"}; +pub const c_abi_int_return_regs_caller_view = [_]Register{ .o0, .o1, .o2, .o3, .o4, .o5 }; +pub const c_abi_int_return_regs_callee_view = [_]Register{ .@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5" }; diff --git a/src/arch/sparcv9/bits.zig b/src/arch/sparcv9/bits.zig index eb75e50583..07cbf7fc91 100644 --- a/src/arch/sparcv9/bits.zig +++ b/src/arch/sparcv9/bits.zig @@ -1078,7 +1078,7 @@ test "Serialize formats" { }, .{ .inst = Instruction.format4d(8, 0, .xcc, 0, .l2), - .expected = 0b10_10010_001000_1_0000_1_1_0_00000000000 + .expected = 0b10_10010_001000_1_0000_1_1_0_00000000000, }, .{ .inst = Instruction.format4e(8, .xcc, .g0, .o1, 0),