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stage2: remove obsolete MOV variant 0b11

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* variant `0b11` when both `reg1 != .none` and `reg2 != .none` is
  identical to `0b00` therefore it can safely be removed
* fix proper destination register size calculation when setting register from
  another source register
This commit is contained in:
Jakub Konka 2021-12-20 18:20:06 +01:00
parent 4a40c0a80c
commit 71c5eebd32
3 changed files with 3 additions and 14 deletions
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3
src/arch/x86_64/CodeGen.zig
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@ -2968,9 +2968,8 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
_ = try self.addInst(.{
.tag = .mov,
.ops = (Mir.Ops{
.reg1 = reg,
.reg1 = registerAlias(reg, @divExact(src_reg.size(), 8)),
.reg2 = src_reg,
.flags = 0b11,
}).encode(),
.data = undefined,
});

12
src/arch/x86_64/Emit.zig
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@ -1119,17 +1119,7 @@ fn mirMovImpl(
encoder.imm32(imm_op);
break :blk;
}
// mov reg1, reg2
// RM
const opc: u8 = if (ops.reg1.size() == 8) 0x8a else 0x8b;
const encoder = try Encoder.init(code, 3);
encoder.rex(.{
.w = ops.reg1.size() == 64 and ops.reg2.size() == 64,
.r = ops.reg1.isExtended(),
.b = ops.reg2.isExtended(),
});
encoder.opcode_1byte(opc);
encoder.modRm_direct(ops.reg1.lowId(), ops.reg2.lowId());
return EmitResult.err(allocator, src_loc, "TODO unused variant: mov reg1, reg2, 0b11", .{});
},
}
return EmitResult.ok();

2
src/arch/x86_64/Mir.zig
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@ -145,7 +145,7 @@ pub const Inst = struct {
/// 0b10 [reg1 + imm32], reg2
/// 0b10 [reg1 + 0], imm32
/// 0b11 [reg1 + imm32], imm32
/// 0b11 reg1, reg2 (RM)
/// 0b11 AVAILABLE
/// Notes:
/// * If reg2 is `none` then it means Data field `imm` is used as the immediate.
/// * When two imm32 values are required, Data field `payload` points at `ImmPair`.