update Target, CPU, OS, ABI, etc. to LLVM 15

lib/std/target.zig

@@ -40,9 +40,11 @@ pub const Target = struct {
             nvcl,
             amdhsa,
             ps4,
+            ps5,
             elfiamcu,
             tvos,
             watchos,
+            driverkit,
             mesa3d,
             contiki,
             amdpal,
@@ -50,6 +52,7 @@ pub const Target = struct {
             hurd,
             wasi,
             emscripten,
+            shadermodel,
             uefi,
             opencl,
             glsl450,
@@ -244,6 +247,7 @@ pub const Target = struct {
                     .nvcl,
                     .amdhsa,
                     .ps4,
+                    .ps5,
                     .elfiamcu,
                     .mesa3d,
                     .contiki,
@@ -252,6 +256,8 @@ pub const Target = struct {
                     .hurd,
                     .wasi,
                     .emscripten,
+                    .driverkit,
+                    .shadermodel,
                     .uefi,
                     .opencl, // TODO: OpenCL versions
                     .glsl450, // TODO: GLSL versions
@@ -419,6 +425,7 @@ pub const Target = struct {
                 .nvcl,
                 .amdhsa,
                 .ps4,
+                .ps5,
                 .elfiamcu,
                 .mesa3d,
                 .contiki,
@@ -427,6 +434,8 @@ pub const Target = struct {
                 .hurd,
                 .wasi,
                 .emscripten,
+                .driverkit,
+                .shadermodel,
                 .uefi,
                 .opencl,
                 .glsl450,
@@ -481,6 +490,21 @@ pub const Target = struct {
         coreclr,
         simulator,
         macabi,
+        pixel,
+        vertex,
+        geometry,
+        hull,
+        domain,
+        compute,
+        library,
+        raygeneration,
+        intersection,
+        anyhit,
+        closesthit,
+        miss,
+        callable,
+        mesh,
+        amplification,
 
         pub fn default(arch: Cpu.Arch, target_os: Os) Abi {
             if (arch.isWasm()) {
@@ -502,6 +526,7 @@ pub const Target = struct {
                 .nvcl,
                 .amdhsa,
                 .ps4,
+                .ps5,
                 .elfiamcu,
                 .mesa3d,
                 .contiki,
@@ -531,6 +556,8 @@ pub const Target = struct {
                 .ios,
                 .tvos,
                 .watchos,
+                .driverkit,
+                .shadermodel,
                 => return .none,
             }
         }
@@ -563,16 +590,18 @@ pub const Target = struct {
     pub const ObjectFormat = enum {
         /// Common Object File Format (Windows)
         coff,
+        /// DirectX Container
+        dxcontainer,
         /// Executable and Linking Format
         elf,
         /// macOS relocatables
         macho,
+        /// Standard, Portable Intermediate Representation V
+        spirv,
         /// WebAssembly
         wasm,
         /// C source code
         c,
-        /// Standard, Portable Intermediate Representation V
-        spirv,
         /// Intel IHEX
         hex,
         /// Machine code with no metadata.
@@ -592,6 +621,7 @@ pub const Target = struct {
                 .raw => ".bin",
                 .plan9 => plan9Ext(cpu_arch),
                 .nvptx => ".ptx",
+                .dxcontainer => @panic("TODO what's the extension for these?"),
             };
         }
     };
@@ -769,7 +799,10 @@ pub const Target = struct {
             bpfel,
             bpfeb,
             csky,
+            dxil,
             hexagon,
+            loongarch32,
+            loongarch64,
             m68k,
             mips,
             mipsel,
@@ -920,6 +953,7 @@ pub const Target = struct {
                     .arm => .ARM,
                     .armeb => .ARM,
                     .hexagon => .HEXAGON,
+                    .dxil => .NONE,
                     .m68k => .@"68K",
                     .le32 => .NONE,
                     .mips => .MIPS,
@@ -970,6 +1004,8 @@ pub const Target = struct {
                     .spu_2 => .SPU_2,
                     .spirv32 => .NONE,
                     .spirv64 => .NONE,
+                    .loongarch32 => .NONE,
+                    .loongarch64 => .NONE,
                 };
             }
 
@@ -980,6 +1016,7 @@ pub const Target = struct {
                     .arc => .Unknown,
                     .arm => .ARM,
                     .armeb => .Unknown,
+                    .dxil => .Unknown,
                     .hexagon => .Unknown,
                     .m68k => .Unknown,
                     .le32 => .Unknown,
@@ -1031,6 +1068,8 @@ pub const Target = struct {
                     .spu_2 => .Unknown,
                     .spirv32 => .Unknown,
                     .spirv64 => .Unknown,
+                    .loongarch32 => .Unknown,
+                    .loongarch64 => .Unknown,
                 };
             }
 
@@ -1079,6 +1118,9 @@ pub const Target = struct {
                     // GPU bitness is opaque. For now, assume little endian.
                     .spirv32,
                     .spirv64,
+                    .dxil,
+                    .loongarch32,
+                    .loongarch64,
                     => .Little,
 
                     .arc,
@@ -1139,6 +1181,8 @@ pub const Target = struct {
                     .renderscript32,
                     .aarch64_32,
                     .spirv32,
+                    .loongarch32,
+                    .dxil,
                     => return 32,
 
                     .aarch64,
@@ -1163,6 +1207,7 @@ pub const Target = struct {
                     .s390x,
                     .ve,
                     .spirv64,
+                    .loongarch64,
                     => return 64,
                 }
             }
@@ -1636,6 +1681,9 @@ pub const Target = struct {
                 .renderscript32,
                 .renderscript64,
                 .ve,
+                .dxil,
+                .loongarch32,
+                .loongarch64,
                 => return result,
             },
 
@@ -1678,12 +1726,15 @@ pub const Target = struct {
             .nvcl,
             .amdhsa,
             .ps4,
+            .ps5,
             .elfiamcu,
             .mesa3d,
             .contiki,
             .amdpal,
             .hermit,
             .hurd,
+            .driverkit,
+            .shadermodel,
             => return result,
         }
     }
@@ -1852,6 +1903,9 @@ pub const Target = struct {
             .renderscript64,
             .ve,
             .spirv64,
+            .dxil,
+            .loongarch32,
+            .loongarch64,
             => 16,
         };
     }

lib/std/zig.zig

@@ -190,6 +190,7 @@ pub fn binNameAlloc(allocator: std.mem.Allocator, options: BinNameOptions) error
             .Lib => return std.fmt.allocPrint(allocator, "{s}{s}.a", .{ target.libPrefix(), root_name }),
         },
         .nvptx => return std.fmt.allocPrint(allocator, "{s}", .{root_name}),
+        .dxcontainer => @panic("TODO what's the file extension for these?"),
     }
 }
 

lib/std/zig/CrossTarget.zig

@@ -118,6 +118,7 @@ fn updateOsVersionRange(self: *CrossTarget, os: Target.Os) void {
         .nvcl,
         .amdhsa,
         .ps4,
+        .ps5,
         .elfiamcu,
         .mesa3d,
         .contiki,
@@ -126,6 +127,8 @@ fn updateOsVersionRange(self: *CrossTarget, os: Target.Os) void {
         .hurd,
         .wasi,
         .emscripten,
+        .driverkit,
+        .shadermodel,
         .uefi,
         .opencl,
         .glsl450,
@@ -663,6 +666,7 @@ fn parseOs(result: *CrossTarget, diags: *ParseOptions.Diagnostics, text: []const
         .nvcl,
         .amdhsa,
         .ps4,
+        .ps5,
         .elfiamcu,
         .mesa3d,
         .contiki,
@@ -676,6 +680,8 @@ fn parseOs(result: *CrossTarget, diags: *ParseOptions.Diagnostics, text: []const
         .glsl450,
         .vulkan,
         .plan9,
+        .driverkit,
+        .shadermodel,
         .other,
         => return error.InvalidOperatingSystemVersion,
 

src/clang.zig

@@ -859,7 +859,7 @@ pub const StmtExpr = opaque {
 
 pub const StringLiteral = opaque {
     pub const getKind = ZigClangStringLiteral_getKind;
-    extern fn ZigClangStringLiteral_getKind(*const StringLiteral) StringLiteral_StringKind;
+    extern fn ZigClangStringLiteral_getKind(*const StringLiteral) CharacterLiteral_CharacterKind;
 
     pub const getCodeUnit = ZigClangStringLiteral_getCodeUnit;
     extern fn ZigClangStringLiteral_getCodeUnit(*const StringLiteral, usize) u32;
@@ -1117,6 +1117,7 @@ pub const TypeClass = enum(c_int) {
     VariableArray,
     Atomic,
     Attributed,
+    BTFTagAttributed,
     BitInt,
     BlockPointer,
     Builtin,
@@ -1202,25 +1203,33 @@ const StmtClass = enum(c_int) {
     OMPForDirectiveClass,
     OMPForSimdDirectiveClass,
     OMPGenericLoopDirectiveClass,
+    OMPMaskedTaskLoopDirectiveClass,
+    OMPMaskedTaskLoopSimdDirectiveClass,
     OMPMasterTaskLoopDirectiveClass,
     OMPMasterTaskLoopSimdDirectiveClass,
     OMPParallelForDirectiveClass,
     OMPParallelForSimdDirectiveClass,
+    OMPParallelGenericLoopDirectiveClass,
+    OMPParallelMaskedTaskLoopDirectiveClass,
+    OMPParallelMaskedTaskLoopSimdDirectiveClass,
     OMPParallelMasterTaskLoopDirectiveClass,
     OMPParallelMasterTaskLoopSimdDirectiveClass,
     OMPSimdDirectiveClass,
     OMPTargetParallelForSimdDirectiveClass,
+    OMPTargetParallelGenericLoopDirectiveClass,
     OMPTargetSimdDirectiveClass,
     OMPTargetTeamsDistributeDirectiveClass,
     OMPTargetTeamsDistributeParallelForDirectiveClass,
     OMPTargetTeamsDistributeParallelForSimdDirectiveClass,
     OMPTargetTeamsDistributeSimdDirectiveClass,
+    OMPTargetTeamsGenericLoopDirectiveClass,
     OMPTaskLoopDirectiveClass,
     OMPTaskLoopSimdDirectiveClass,
     OMPTeamsDistributeDirectiveClass,
     OMPTeamsDistributeParallelForDirectiveClass,
     OMPTeamsDistributeParallelForSimdDirectiveClass,
     OMPTeamsDistributeSimdDirectiveClass,
+    OMPTeamsGenericLoopDirectiveClass,
     OMPTileDirectiveClass,
     OMPUnrollDirectiveClass,
     OMPMaskedDirectiveClass,
@@ -1228,6 +1237,7 @@ const StmtClass = enum(c_int) {
     OMPMetaDirectiveClass,
     OMPOrderedDirectiveClass,
     OMPParallelDirectiveClass,
+    OMPParallelMaskedDirectiveClass,
     OMPParallelMasterDirectiveClass,
     OMPParallelSectionsDirectiveClass,
     OMPScanDirectiveClass,
@@ -1532,6 +1542,7 @@ pub const DeclKind = enum(c_int) {
     OMPDeclareMapper,
     OMPDeclareReduction,
     TemplateParamObject,
+    UnnamedGlobalConstant,
     UnresolvedUsingValue,
     OMPAllocate,
     OMPRequires,
@@ -1805,6 +1816,8 @@ pub const CallingConv = enum(c_int) {
     PreserveMost,
     PreserveAll,
     AArch64VectorCall,
+    AArch64SVEPCS,
+    AMDGPUKernelCall,
 };
 
 pub const StorageClass = enum(c_int) {
@@ -1826,14 +1839,6 @@ pub const APFloat_roundingMode = enum(i8) {
     Invalid = -1,
 };
 
-pub const StringLiteral_StringKind = enum(c_int) {
-    Ascii,
-    Wide,
-    UTF8,
-    UTF16,
-    UTF32,
-};
-
 pub const CharacterLiteral_CharacterKind = enum(c_int) {
     Ascii,
     Wide,

src/codegen/llvm.zig

@@ -41,7 +41,10 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
         .bpfel => "bpfel",
         .bpfeb => "bpfeb",
         .csky => "csky",
+        .dxil => "dxil",
         .hexagon => "hexagon",
+        .loongarch32 => "loongarch32",
+        .loongarch64 => "loongarch64",
         .m68k => "m68k",
         .mips => "mips",
         .mipsel => "mipsel",
@@ -116,6 +119,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
         .nvcl => "nvcl",
         .amdhsa => "amdhsa",
         .ps4 => "ps4",
+        .ps5 => "ps5",
         .elfiamcu => "elfiamcu",
         .mesa3d => "mesa3d",
         .contiki => "contiki",
@@ -129,6 +133,8 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
         .ios => "ios",
         .tvos => "tvos",
         .watchos => "watchos",
+        .driverkit => "driverkit",
+        .shadermodel => "shadermodel",
         .opencl,
         .glsl450,
         .vulkan,
@@ -171,6 +177,21 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
         .coreclr => "coreclr",
         .simulator => "simulator",
         .macabi => "macabi",
+        .pixel => "pixel",
+        .vertex => "vertex",
+        .geometry => "geometry",
+        .hull => "hull",
+        .domain => "domain",
+        .compute => "compute",
+        .library => "library",
+        .raygeneration => "raygeneration",
+        .intersection => "intersection",
+        .anyhit => "anyhit",
+        .closesthit => "closesthit",
+        .miss => "miss",
+        .callable => "callable",
+        .mesh => "mesh",
+        .amplification => "amplification",
     };
     try llvm_triple.appendSlice(llvm_abi);
 
@@ -9030,6 +9051,9 @@ fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
         .kalimba,
         .renderscript32,
         .renderscript64,
+        .dxil,
+        .loongarch32,
+        .loongarch64,
         => {},
 
         .spu_2 => unreachable, // LLVM does not support this backend

src/codegen/llvm/bindings.zig

@@ -1212,9 +1212,11 @@ pub const LinkWasm = ZigLLDLinkWasm;
 pub const ObjectFormatType = enum(c_int) {
     Unknown,
     COFF,
+    DXContainer,
     ELF,
     GOFF,
     MachO,
+    SPIRV,
     Wasm,
     XCOFF,
 };
@@ -1254,9 +1256,11 @@ pub const OSType = enum(c_int) {
     NVCL,
     AMDHSA,
     PS4,
+    PS5,
     ELFIAMCU,
     TvOS,
     WatchOS,
+    DriverKit,
     Mesa3D,
     Contiki,
     AMDPAL,
@@ -1264,6 +1268,7 @@ pub const OSType = enum(c_int) {
     Hurd,
     WASI,
     Emscripten,
+    ShaderModel,
 };
 
 pub const ArchType = enum(c_int) {
@@ -1278,7 +1283,10 @@ pub const ArchType = enum(c_int) {
     bpfel,
     bpfeb,
     csky,
+    dxil,
     hexagon,
+    loongarch32,
+    loongarch64,
     m68k,
     mips,
     mipsel,
@@ -1314,6 +1322,8 @@ pub const ArchType = enum(c_int) {
     hsail64,
     spir,
     spir64,
+    spirv32,
+    spirv64,
     kalimba,
     shave,
     lanai,

src/link.zig

@@ -290,6 +290,7 @@ pub const File = struct {
                 .nvptx => &(try NvPtx.createEmpty(allocator, options)).base,
                 .hex => return error.HexObjectFormatUnimplemented,
                 .raw => return error.RawObjectFormatUnimplemented,
+                .dxcontainer => return error.DirectXContainerObjectFormatUnimplemented,
             };
         }
         const emit = options.emit.?;
@@ -309,6 +310,7 @@ pub const File = struct {
                     .nvptx => &(try NvPtx.createEmpty(allocator, options)).base,
                     .hex => return error.HexObjectFormatUnimplemented,
                     .raw => return error.RawObjectFormatUnimplemented,
+                    .dxcontainer => return error.DirectXContainerObjectFormatUnimplemented,
                 };
             }
             // Open a temporary object file, not the final output file because we
@@ -330,6 +332,7 @@ pub const File = struct {
             .nvptx => &(try NvPtx.openPath(allocator, sub_path, options)).base,
             .hex => return error.HexObjectFormatUnimplemented,
             .raw => return error.RawObjectFormatUnimplemented,
+            .dxcontainer => return error.DirectXContainerObjectFormatUnimplemented,
         };
 
         if (use_lld) {

src/stage1/stage1.h

@@ -83,9 +83,11 @@ enum Os {
     OsNVCL,       // NVIDIA OpenCL
     OsAMDHSA,     // AMD HSA Runtime
     OsPS4,
+    OsPS5,
     OsELFIAMCU,
     OsTvOS,       // Apple tvOS
     OsWatchOS,    // Apple watchOS
+    OsDriverKit,  // Apple DriverKit
     OsMesa3D,
     OsContiki,
     OsAMDPAL,
@@ -93,6 +95,7 @@ enum Os {
     OsHurd,
     OsWASI,
     OsEmscripten,
+    OsShaderModel, // DirectX ShaderModel
     OsUefi,
     OsOpenCL,
     OsGLSL450,

src/stage1/target.cpp

@@ -24,7 +24,10 @@ static const ZigLLVM_ArchType arch_list[] = {
     ZigLLVM_bpfel,          // eBPF or extended BPF or 64-bit BPF (little endian)
     ZigLLVM_bpfeb,          // eBPF or extended BPF or 64-bit BPF (big endian)
     ZigLLVM_csky,           // CSKY: csky
+    ZigLLVM_dxil,           // DXIL 32-bit DirectX bytecode
     ZigLLVM_hexagon,        // Hexagon: hexagon
+    ZigLLVM_loongarch32,    // LoongArch (32-bit): loongarch32
+    ZigLLVM_loongarch64,    // LoongArch (64-bit): loongarch64
     ZigLLVM_m68k,           // M68k: Motorola 680x0 family
     ZigLLVM_mips,           // MIPS: mips, mipsallegrex, mipsr6
     ZigLLVM_mipsel,         // MIPSEL: mipsel, mipsallegrexe, mipsr6el
@@ -114,9 +117,11 @@ static const Os os_list[] = {
     OsNVCL,       // NVIDIA OpenCL
     OsAMDHSA,     // AMD HSA Runtime
     OsPS4,
+    OsPS5,
     OsELFIAMCU,
     OsTvOS,       // Apple tvOS
     OsWatchOS,    // Apple watchOS
+    OsDriverKit,  // Apple DriverKit
     OsMesa3D,
     OsContiki,
     OsAMDPAL,
@@ -124,6 +129,7 @@ static const Os os_list[] = {
     OsHurd,
     OsWASI,
     OsEmscripten,
+    OsShaderModel, // DirectX ShaderModel
     OsUefi,
     OsOpenCL,
     OsGLSL450,
@@ -156,16 +162,34 @@ static const ZigLLVM_EnvironmentType abi_list[] = {
     ZigLLVM_Itanium,
     ZigLLVM_Cygnus,
     ZigLLVM_CoreCLR,
-    ZigLLVM_Simulator,
+    ZigLLVM_Simulator, // Simulator variants of other systems, e.g., Apple's iOS
-    ZigLLVM_MacABI,
+    ZigLLVM_MacABI, // Mac Catalyst variant of Apple's iOS deployment target.
+
+    ZigLLVM_Pixel,
+    ZigLLVM_Vertex,
+    ZigLLVM_Geometry,
+    ZigLLVM_Hull,
+    ZigLLVM_Domain,
+    ZigLLVM_Compute,
+    ZigLLVM_Library,
+    ZigLLVM_RayGeneration,
+    ZigLLVM_Intersection,
+    ZigLLVM_AnyHit,
+    ZigLLVM_ClosestHit,
+    ZigLLVM_Miss,
+    ZigLLVM_Callable,
+    ZigLLVM_Mesh,
+    ZigLLVM_Amplification,
 };
 
 static const ZigLLVM_ObjectFormatType oformat_list[] = {
     ZigLLVM_UnknownObjectFormat,
     ZigLLVM_COFF,
+    ZigLLVM_DXContainer,
     ZigLLVM_ELF,
     ZigLLVM_GOFF,
     ZigLLVM_MachO,
+    ZigLLVM_SPIRV,
     ZigLLVM_Wasm,
     ZigLLVM_XCOFF,
 };
@@ -183,9 +207,11 @@ const char *target_oformat_name(ZigLLVM_ObjectFormatType oformat) {
     switch (oformat) {
         case ZigLLVM_UnknownObjectFormat: return "unknown";
         case ZigLLVM_COFF: return "coff";
+        case ZigLLVM_DXContainer: return "dxcontainer";
         case ZigLLVM_ELF: return "elf";
         case ZigLLVM_GOFF: return "goff";
         case ZigLLVM_MachO: return "macho";
+        case ZigLLVM_SPIRV: return "spirv";
         case ZigLLVM_Wasm: return "wasm";
         case ZigLLVM_XCOFF: return "xcoff";
     }
@@ -276,12 +302,16 @@ ZigLLVM_OSType get_llvm_os_type(Os os_type) {
             return ZigLLVM_AMDHSA;
         case OsPS4:
             return ZigLLVM_PS4;
+        case OsPS5:
+            return ZigLLVM_PS5;
         case OsELFIAMCU:
             return ZigLLVM_ELFIAMCU;
         case OsTvOS:
             return ZigLLVM_TvOS;
         case OsWatchOS:
             return ZigLLVM_WatchOS;
+        case OsDriverKit:
+            return ZigLLVM_DriverKit;
         case OsMesa3D:
             return ZigLLVM_Mesa3D;
         case OsContiki:
@@ -296,6 +326,8 @@ ZigLLVM_OSType get_llvm_os_type(Os os_type) {
             return ZigLLVM_WASI;
         case OsEmscripten:
             return ZigLLVM_Emscripten;
+        case OsShaderModel:
+            return ZigLLVM_ShaderModel;
     }
     zig_unreachable();
 }
@@ -334,9 +366,11 @@ const char *target_os_name(Os os_type) {
         case OsNVCL:       // NVIDIA OpenCL
         case OsAMDHSA:     // AMD HSA Runtime
         case OsPS4:
+        case OsPS5:
         case OsELFIAMCU:
         case OsTvOS:       // Apple tvOS
         case OsWatchOS:    // Apple watchOS
+        case OsDriverKit:
         case OsMesa3D:
         case OsContiki:
         case OsAMDPAL:
@@ -344,6 +378,7 @@ const char *target_os_name(Os os_type) {
         case OsHurd:
         case OsWASI:
         case OsEmscripten:
+        case OsShaderModel:
         case OsOpenCL:
         case OsGLSL450:
         case OsVulkan:
@@ -532,6 +567,8 @@ uint32_t target_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
         case ZigLLVM_aarch64_32:
         case ZigLLVM_csky:
         case ZigLLVM_spirv32:
+        case ZigLLVM_loongarch32:
+        case ZigLLVM_dxil:
             return 32;
 
         case ZigLLVM_aarch64:
@@ -556,6 +593,7 @@ uint32_t target_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
         case ZigLLVM_renderscript64:
         case ZigLLVM_ve:
         case ZigLLVM_spirv64:
+        case ZigLLVM_loongarch64:
             return 64;
     }
     zig_unreachable();
@@ -601,6 +639,8 @@ uint32_t target_arch_largest_atomic_bits(ZigLLVM_ArchType arch) {
         case ZigLLVM_renderscript32:
         case ZigLLVM_csky:
         case ZigLLVM_spirv32:
+        case ZigLLVM_loongarch32:
+        case ZigLLVM_dxil:
             return 32;
 
         case ZigLLVM_aarch64:
@@ -625,6 +665,7 @@ uint32_t target_arch_largest_atomic_bits(ZigLLVM_ArchType arch) {
         case ZigLLVM_renderscript64:
         case ZigLLVM_ve:
         case ZigLLVM_spirv64:
+        case ZigLLVM_loongarch64:
             return 64;
 
         case ZigLLVM_x86_64:
@@ -751,6 +792,7 @@ uint32_t target_c_type_size_in_bits(const ZigTarget *target, CIntType id) {
         case OsAIX:
         case OsAMDHSA:
         case OsPS4:
+        case OsPS5:
         case OsELFIAMCU:
         case OsTvOS:
         case OsWatchOS:
@@ -763,6 +805,8 @@ uint32_t target_c_type_size_in_bits(const ZigTarget *target, CIntType id) {
         case OsOpenCL:
         case OsGLSL450:
         case OsVulkan:
+        case OsDriverKit:
+        case OsShaderModel:
             zig_panic("TODO c type size in bits for this target");
     }
     zig_unreachable();
@@ -860,6 +904,9 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
         case ZigLLVM_tcele:
         case ZigLLVM_xcore:
         case ZigLLVM_ve:
+        case ZigLLVM_dxil:
+        case ZigLLVM_loongarch32:
+        case ZigLLVM_loongarch64:
             zig_panic("TODO populate this table with stack pointer register name for this CPU architecture");
     }
     zig_unreachable();
@@ -927,6 +974,9 @@ bool target_is_arm(const ZigTarget *target) {
         case ZigLLVM_ve:
         case ZigLLVM_spirv32:
         case ZigLLVM_spirv64:
+        case ZigLLVM_dxil:
+        case ZigLLVM_loongarch32:
+        case ZigLLVM_loongarch64:
             return false;
     }
     zig_unreachable();
@@ -973,6 +1023,7 @@ ZigLLVM_EnvironmentType target_default_abi(ZigLLVM_ArchType arch, Os os) {
         case OsNVCL:
         case OsAMDHSA:
         case OsPS4:
+        case OsPS5:
         case OsELFIAMCU:
         case OsMesa3D:
         case OsContiki:
@@ -1004,6 +1055,8 @@ ZigLLVM_EnvironmentType target_default_abi(ZigLLVM_ArchType arch, Os os) {
         case OsIOS:
         case OsTvOS:
         case OsWatchOS:
+        case OsDriverKit:
+        case OsShaderModel:
             return ZigLLVM_UnknownEnvironment;
     }
     zig_unreachable();

src/stage1/zig0.cpp

@@ -112,6 +112,8 @@ static Os get_zig_os_type(ZigLLVM_OSType os_type) {
             return OsAMDHSA;
         case ZigLLVM_PS4:
             return OsPS4;
+        case ZigLLVM_PS5:
+            return OsPS5;
         case ZigLLVM_ELFIAMCU:
             return OsELFIAMCU;
         case ZigLLVM_TvOS:
@@ -132,6 +134,10 @@ static Os get_zig_os_type(ZigLLVM_OSType os_type) {
             return OsWASI;
         case ZigLLVM_Emscripten:
             return OsEmscripten;
+        case ZigLLVM_DriverKit:
+            return OsDriverKit;
+        case ZigLLVM_ShaderModel:
+            return OsShaderModel;
     }
     zig_unreachable();
 }

src/target.zig

@@ -107,6 +107,23 @@ pub fn libCGenericName(target: std.Target) [:0]const u8 {
         .simulator,
         .macabi,
         => unreachable,
+
+        .pixel,
+        .vertex,
+        .geometry,
+        .hull,
+        .domain,
+        .compute,
+        .library,
+        .raygeneration,
+        .intersection,
+        .anyhit,
+        .closesthit,
+        .miss,
+        .callable,
+        .mesh,
+        .amplification,
+        => unreachable,
     }
 }
 
@@ -219,6 +236,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
         .hex,
         .raw,
         .nvptx,
+        .dxcontainer,
         => {},
     }
 
@@ -233,7 +251,10 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
         .bpfel,
         .bpfeb,
         .csky,
+        .dxil,
         .hexagon,
+        .loongarch32,
+        .loongarch64,
         .m68k,
         .mips,
         .mipsel,
@@ -335,6 +356,7 @@ pub fn osToLLVM(os_tag: std.Target.Os.Tag) llvm.OSType {
         .nvcl => .NVCL,
         .amdhsa => .AMDHSA,
         .ps4 => .PS4,
+        .ps5 => .PS5,
         .elfiamcu => .ELFIAMCU,
         .tvos => .TvOS,
         .watchos => .WatchOS,
@@ -345,6 +367,8 @@ pub fn osToLLVM(os_tag: std.Target.Os.Tag) llvm.OSType {
         .hurd => .Hurd,
         .wasi => .WASI,
         .emscripten => .Emscripten,
+        .driverkit => .DriverKit,
+        .shadermodel => .ShaderModel,
     };
 }
 
@@ -360,7 +384,10 @@ pub fn archToLLVM(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
         .bpfel => .bpfel,
         .bpfeb => .bpfeb,
         .csky => .csky,
+        .dxil => .dxil,
         .hexagon => .hexagon,
+        .loongarch32 => .loongarch32,
+        .loongarch64 => .loongarch64,
         .m68k => .m68k,
         .mips => .mips,
         .mipsel => .mipsel,
@@ -627,6 +654,8 @@ pub fn atomicPtrAlignment(
         .renderscript32,
         .csky,
         .spirv32,
+        .dxil,
+        .loongarch32,
         => 32,
 
         .aarch64,
@@ -651,6 +680,7 @@ pub fn atomicPtrAlignment(
         .renderscript64,
         .ve,
         .spirv64,
+        .loongarch64,
         => 64,
 
         .x86_64 => 128,

src/type.zig

@@ -6627,6 +6627,7 @@ pub const CType = enum {
             .nvcl,
             .amdhsa,
             .ps4,
+            .ps5,
             .elfiamcu,
             .mesa3d,
             .contiki,
@@ -6636,6 +6637,8 @@ pub const CType = enum {
             .opencl,
             .glsl450,
             .vulkan,
+            .driverkit,
+            .shadermodel,
             => @panic("TODO specify the C integer and float type sizes for this OS"),
         }
     }

src/zig_clang.cpp

@@ -317,6 +317,7 @@ void ZigClang_detect_enum_TypeClass(clang::Type::TypeClass ty) {
         case clang::Type::Enum:
         case clang::Type::Elaborated:
         case clang::Type::Attributed:
+        case clang::Type::BTFTagAttributed:
         case clang::Type::BitInt:
         case clang::Type::TemplateTypeParm:
         case clang::Type::SubstTemplateTypeParm:
@@ -346,6 +347,7 @@ static_assert((clang::Type::TypeClass)ZigClangType_IncompleteArray == clang::Typ
 static_assert((clang::Type::TypeClass)ZigClangType_VariableArray == clang::Type::VariableArray, "");
 static_assert((clang::Type::TypeClass)ZigClangType_Atomic == clang::Type::Atomic, "");
 static_assert((clang::Type::TypeClass)ZigClangType_Attributed == clang::Type::Attributed, "");
+static_assert((clang::Type::TypeClass)ZigClangType_BTFTagAttributed == clang::Type::BTFTagAttributed, "");
 static_assert((clang::Type::TypeClass)ZigClangType_BitInt == clang::Type::BitInt, "");
 static_assert((clang::Type::TypeClass)ZigClangType_BlockPointer == clang::Type::BlockPointer, "");
 static_assert((clang::Type::TypeClass)ZigClangType_Builtin == clang::Type::Builtin, "");
@@ -432,25 +434,33 @@ void ZigClang_detect_enum_StmtClass(clang::Stmt::StmtClass x) {
         case clang::Stmt::OMPForDirectiveClass:
         case clang::Stmt::OMPForSimdDirectiveClass:
         case clang::Stmt::OMPGenericLoopDirectiveClass:
+        case clang::Stmt::OMPMaskedTaskLoopDirectiveClass:
+        case clang::Stmt::OMPMaskedTaskLoopSimdDirectiveClass:
         case clang::Stmt::OMPMasterTaskLoopDirectiveClass:
         case clang::Stmt::OMPMasterTaskLoopSimdDirectiveClass:
         case clang::Stmt::OMPParallelForDirectiveClass:
         case clang::Stmt::OMPParallelForSimdDirectiveClass:
+        case clang::Stmt::OMPParallelGenericLoopDirectiveClass:
+        case clang::Stmt::OMPParallelMaskedTaskLoopDirectiveClass:
+        case clang::Stmt::OMPParallelMaskedTaskLoopSimdDirectiveClass:
         case clang::Stmt::OMPParallelMasterTaskLoopDirectiveClass:
         case clang::Stmt::OMPParallelMasterTaskLoopSimdDirectiveClass:
         case clang::Stmt::OMPSimdDirectiveClass:
         case clang::Stmt::OMPTargetParallelForSimdDirectiveClass:
+        case clang::Stmt::OMPTargetParallelGenericLoopDirectiveClass:
         case clang::Stmt::OMPTargetSimdDirectiveClass:
         case clang::Stmt::OMPTargetTeamsDistributeDirectiveClass:
         case clang::Stmt::OMPTargetTeamsDistributeParallelForDirectiveClass:
         case clang::Stmt::OMPTargetTeamsDistributeParallelForSimdDirectiveClass:
         case clang::Stmt::OMPTargetTeamsDistributeSimdDirectiveClass:
+        case clang::Stmt::OMPTargetTeamsGenericLoopDirectiveClass:
         case clang::Stmt::OMPTaskLoopDirectiveClass:
         case clang::Stmt::OMPTaskLoopSimdDirectiveClass:
         case clang::Stmt::OMPTeamsDistributeDirectiveClass:
         case clang::Stmt::OMPTeamsDistributeParallelForDirectiveClass:
         case clang::Stmt::OMPTeamsDistributeParallelForSimdDirectiveClass:
         case clang::Stmt::OMPTeamsDistributeSimdDirectiveClass:
+        case clang::Stmt::OMPTeamsGenericLoopDirectiveClass:
         case clang::Stmt::OMPTileDirectiveClass:
         case clang::Stmt::OMPUnrollDirectiveClass:
         case clang::Stmt::OMPMaskedDirectiveClass:
@@ -458,6 +468,7 @@ void ZigClang_detect_enum_StmtClass(clang::Stmt::StmtClass x) {
         case clang::Stmt::OMPMetaDirectiveClass:
         case clang::Stmt::OMPOrderedDirectiveClass:
         case clang::Stmt::OMPParallelDirectiveClass:
+        case clang::Stmt::OMPParallelMaskedDirectiveClass:
         case clang::Stmt::OMPParallelMasterDirectiveClass:
         case clang::Stmt::OMPParallelSectionsDirectiveClass:
         case clang::Stmt::OMPScanDirectiveClass:
@@ -659,25 +670,33 @@ static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPDistributeSimdDirectiveCla
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPForDirectiveClass == clang::Stmt::OMPForDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPForSimdDirectiveClass == clang::Stmt::OMPForSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPGenericLoopDirectiveClass == clang::Stmt::OMPGenericLoopDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMaskedTaskLoopDirectiveClass == clang::Stmt::OMPMaskedTaskLoopDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMaskedTaskLoopSimdDirectiveClass == clang::Stmt::OMPMaskedTaskLoopSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMasterTaskLoopDirectiveClass == clang::Stmt::OMPMasterTaskLoopDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMasterTaskLoopSimdDirectiveClass == clang::Stmt::OMPMasterTaskLoopSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelForDirectiveClass == clang::Stmt::OMPParallelForDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelForSimdDirectiveClass == clang::Stmt::OMPParallelForSimdDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelGenericLoopDirectiveClass == clang::Stmt::OMPParallelGenericLoopDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelMaskedTaskLoopDirectiveClass == clang::Stmt::OMPParallelMaskedTaskLoopDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelMaskedTaskLoopSimdDirectiveClass == clang::Stmt::OMPParallelMaskedTaskLoopSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelMasterTaskLoopDirectiveClass == clang::Stmt::OMPParallelMasterTaskLoopDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelMasterTaskLoopSimdDirectiveClass == clang::Stmt::OMPParallelMasterTaskLoopSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPSimdDirectiveClass == clang::Stmt::OMPSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetParallelForSimdDirectiveClass == clang::Stmt::OMPTargetParallelForSimdDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetParallelGenericLoopDirectiveClass == clang::Stmt::OMPTargetParallelGenericLoopDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetSimdDirectiveClass == clang::Stmt::OMPTargetSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetTeamsDistributeDirectiveClass == clang::Stmt::OMPTargetTeamsDistributeDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetTeamsDistributeParallelForDirectiveClass == clang::Stmt::OMPTargetTeamsDistributeParallelForDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetTeamsDistributeParallelForSimdDirectiveClass == clang::Stmt::OMPTargetTeamsDistributeParallelForSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetTeamsDistributeSimdDirectiveClass == clang::Stmt::OMPTargetTeamsDistributeSimdDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTargetTeamsGenericLoopDirectiveClass == clang::Stmt::OMPTargetTeamsGenericLoopDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTaskLoopDirectiveClass == clang::Stmt::OMPTaskLoopDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTaskLoopSimdDirectiveClass == clang::Stmt::OMPTaskLoopSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeDirectiveClass == clang::Stmt::OMPTeamsDistributeDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeParallelForDirectiveClass == clang::Stmt::OMPTeamsDistributeParallelForDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeParallelForSimdDirectiveClass == clang::Stmt::OMPTeamsDistributeParallelForSimdDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeSimdDirectiveClass == clang::Stmt::OMPTeamsDistributeSimdDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsGenericLoopDirectiveClass == clang::Stmt::OMPTeamsGenericLoopDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTileDirectiveClass == clang::Stmt::OMPTileDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPUnrollDirectiveClass == clang::Stmt::OMPUnrollDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMaskedDirectiveClass == clang::Stmt::OMPMaskedDirectiveClass, "");
@@ -685,6 +704,7 @@ static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMasterDirectiveClass == cl
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMetaDirectiveClass == clang::Stmt::OMPMetaDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPOrderedDirectiveClass == clang::Stmt::OMPOrderedDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelDirectiveClass == clang::Stmt::OMPParallelDirectiveClass, "");
+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelMaskedDirectiveClass == clang::Stmt::OMPParallelMaskedDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelMasterDirectiveClass == clang::Stmt::OMPParallelMasterDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelSectionsDirectiveClass == clang::Stmt::OMPParallelSectionsDirectiveClass, "");
 static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPScanDirectiveClass == clang::Stmt::OMPScanDirectiveClass, "");
@@ -958,6 +978,7 @@ void ZigClang_detect_enum_DeclKind(clang::Decl::Kind x) {
         case clang::Decl::OMPDeclareMapper:
         case clang::Decl::OMPDeclareReduction:
         case clang::Decl::TemplateParamObject:
+        case clang::Decl::UnnamedGlobalConstant:
         case clang::Decl::UnresolvedUsingValue:
         case clang::Decl::OMPAllocate:
         case clang::Decl::OMPRequires:
@@ -1046,6 +1067,7 @@ static_assert((clang::Decl::Kind)ZigClangDeclMSGuid == clang::Decl::MSGuid, "");
 static_assert((clang::Decl::Kind)ZigClangDeclOMPDeclareMapper == clang::Decl::OMPDeclareMapper, "");
 static_assert((clang::Decl::Kind)ZigClangDeclOMPDeclareReduction == clang::Decl::OMPDeclareReduction, "");
 static_assert((clang::Decl::Kind)ZigClangDeclTemplateParamObject == clang::Decl::TemplateParamObject, "");
+static_assert((clang::Decl::Kind)ZigClangDeclUnnamedGlobalConstant == clang::Decl::UnnamedGlobalConstant, "");
 static_assert((clang::Decl::Kind)ZigClangDeclUnresolvedUsingValue == clang::Decl::UnresolvedUsingValue, "");
 static_assert((clang::Decl::Kind)ZigClangDeclOMPRequires == clang::Decl::OMPRequires, "");
 static_assert((clang::Decl::Kind)ZigClangDeclOMPThreadPrivate == clang::Decl::OMPThreadPrivate, "");
@@ -1560,6 +1582,8 @@ void ZigClang_detect_enum_CallingConv(clang::CallingConv x) {
         case clang::CC_PreserveMost:
         case clang::CC_PreserveAll:
         case clang::CC_AArch64VectorCall:
+        case clang::CC_AArch64SVEPCS:
+        case clang::CC_AMDGPUKernelCall:
             break;
     }
 }
@@ -1583,6 +1607,8 @@ static_assert((clang::CallingConv)ZigClangCallingConv_SwiftAsync == clang::CC_Sw
 static_assert((clang::CallingConv)ZigClangCallingConv_PreserveMost == clang::CC_PreserveMost, "");
 static_assert((clang::CallingConv)ZigClangCallingConv_PreserveAll == clang::CC_PreserveAll, "");
 static_assert((clang::CallingConv)ZigClangCallingConv_AArch64VectorCall == clang::CC_AArch64VectorCall, "");
+static_assert((clang::CallingConv)ZigClangCallingConv_AArch64SVEPCS == clang::CC_AArch64SVEPCS, "");
+static_assert((clang::CallingConv)ZigClangCallingConv_AMDGPUKernelCall == clang::CC_AMDGPUKernelCall, "");
 
 void ZigClang_detect_enum_StorageClass(clang::StorageClass x) {
     switch (x) {
@@ -1623,22 +1649,6 @@ static_assert((llvm::RoundingMode)ZigClangAPFloat_roundingMode_NearestTiesToAway
 static_assert((llvm::RoundingMode)ZigClangAPFloat_roundingMode_Dynamic == llvm::RoundingMode::Dynamic, "");
 static_assert((llvm::RoundingMode)ZigClangAPFloat_roundingMode_Invalid == llvm::RoundingMode::Invalid, "");
 
-void ZigClang_detect_enum_StringKind(clang::StringLiteral::StringKind x) {
-    switch (x) {
-        case clang::StringLiteral::Ascii:
-        case clang::StringLiteral::Wide:
-        case clang::StringLiteral::UTF8:
-        case clang::StringLiteral::UTF16:
-        case clang::StringLiteral::UTF32:
-            break;
-    }
-}
-static_assert((clang::StringLiteral::StringKind)ZigClangStringLiteral_StringKind_Ascii == clang::StringLiteral::Ascii, "");
-static_assert((clang::StringLiteral::StringKind)ZigClangStringLiteral_StringKind_Wide == clang::StringLiteral::Wide, "");
-static_assert((clang::StringLiteral::StringKind)ZigClangStringLiteral_StringKind_UTF8 == clang::StringLiteral::UTF8, "");
-static_assert((clang::StringLiteral::StringKind)ZigClangStringLiteral_StringKind_UTF16 == clang::StringLiteral::UTF16, "");
-static_assert((clang::StringLiteral::StringKind)ZigClangStringLiteral_StringKind_UTF32 == clang::StringLiteral::UTF32, "");
-
 void ZigClang_detect_enum_CharacterKind(clang::CharacterLiteral::CharacterKind x) {
     switch (x) {
         case clang::CharacterLiteral::Ascii:
@@ -2724,9 +2734,9 @@ ZigClangAPFloatBase_Semantics ZigClangFloatingLiteral_getRawSemantics(const ZigC
     return static_cast<ZigClangAPFloatBase_Semantics>(casted->getRawSemantics());
 }
 
-enum ZigClangStringLiteral_StringKind ZigClangStringLiteral_getKind(const struct ZigClangStringLiteral *self) {
+enum ZigClangCharacterLiteral_CharacterKind ZigClangStringLiteral_getKind(const struct ZigClangStringLiteral *self) {
     auto casted = reinterpret_cast<const clang::StringLiteral *>(self);
-    return (ZigClangStringLiteral_StringKind)casted->getKind();
+    return (ZigClangCharacterLiteral_CharacterKind)casted->getKind();
 }
 
 uint32_t ZigClangStringLiteral_getCodeUnit(const struct ZigClangStringLiteral *self, size_t i) {

src/zig_clang.h

@@ -252,6 +252,7 @@ enum ZigClangTypeClass {
     ZigClangType_VariableArray,
     ZigClangType_Atomic,
     ZigClangType_Attributed,
+    ZigClangType_BTFTagAttributed,
     ZigClangType_BitInt,
     ZigClangType_BlockPointer,
     ZigClangType_Builtin,
@@ -337,25 +338,33 @@ enum ZigClangStmtClass {
     ZigClangStmt_OMPForDirectiveClass,
     ZigClangStmt_OMPForSimdDirectiveClass,
     ZigClangStmt_OMPGenericLoopDirectiveClass,
+    ZigClangStmt_OMPMaskedTaskLoopDirectiveClass,
+    ZigClangStmt_OMPMaskedTaskLoopSimdDirectiveClass,
     ZigClangStmt_OMPMasterTaskLoopDirectiveClass,
     ZigClangStmt_OMPMasterTaskLoopSimdDirectiveClass,
     ZigClangStmt_OMPParallelForDirectiveClass,
     ZigClangStmt_OMPParallelForSimdDirectiveClass,
+    ZigClangStmt_OMPParallelGenericLoopDirectiveClass,
+    ZigClangStmt_OMPParallelMaskedTaskLoopDirectiveClass,
+    ZigClangStmt_OMPParallelMaskedTaskLoopSimdDirectiveClass,
     ZigClangStmt_OMPParallelMasterTaskLoopDirectiveClass,
     ZigClangStmt_OMPParallelMasterTaskLoopSimdDirectiveClass,
     ZigClangStmt_OMPSimdDirectiveClass,
     ZigClangStmt_OMPTargetParallelForSimdDirectiveClass,
+    ZigClangStmt_OMPTargetParallelGenericLoopDirectiveClass,
     ZigClangStmt_OMPTargetSimdDirectiveClass,
     ZigClangStmt_OMPTargetTeamsDistributeDirectiveClass,
     ZigClangStmt_OMPTargetTeamsDistributeParallelForDirectiveClass,
     ZigClangStmt_OMPTargetTeamsDistributeParallelForSimdDirectiveClass,
     ZigClangStmt_OMPTargetTeamsDistributeSimdDirectiveClass,
+    ZigClangStmt_OMPTargetTeamsGenericLoopDirectiveClass,
     ZigClangStmt_OMPTaskLoopDirectiveClass,
     ZigClangStmt_OMPTaskLoopSimdDirectiveClass,
     ZigClangStmt_OMPTeamsDistributeDirectiveClass,
     ZigClangStmt_OMPTeamsDistributeParallelForDirectiveClass,
     ZigClangStmt_OMPTeamsDistributeParallelForSimdDirectiveClass,
     ZigClangStmt_OMPTeamsDistributeSimdDirectiveClass,
+    ZigClangStmt_OMPTeamsGenericLoopDirectiveClass,
     ZigClangStmt_OMPTileDirectiveClass,
     ZigClangStmt_OMPUnrollDirectiveClass,
     ZigClangStmt_OMPMaskedDirectiveClass,
@@ -363,6 +372,7 @@ enum ZigClangStmtClass {
     ZigClangStmt_OMPMetaDirectiveClass,
     ZigClangStmt_OMPOrderedDirectiveClass,
     ZigClangStmt_OMPParallelDirectiveClass,
+    ZigClangStmt_OMPParallelMaskedDirectiveClass,
     ZigClangStmt_OMPParallelMasterDirectiveClass,
     ZigClangStmt_OMPParallelSectionsDirectiveClass,
     ZigClangStmt_OMPScanDirectiveClass,
@@ -667,6 +677,7 @@ enum ZigClangDeclKind {
     ZigClangDeclOMPDeclareMapper,
     ZigClangDeclOMPDeclareReduction,
     ZigClangDeclTemplateParamObject,
+    ZigClangDeclUnnamedGlobalConstant,
     ZigClangDeclUnresolvedUsingValue,
     ZigClangDeclOMPAllocate,
     ZigClangDeclOMPRequires,
@@ -921,25 +932,27 @@ enum ZigClangBuiltinTypeKind {
 };
 
 enum ZigClangCallingConv {
-    ZigClangCallingConv_C,           // __attribute__((cdecl))
+    ZigClangCallingConv_C,
-    ZigClangCallingConv_X86StdCall,  // __attribute__((stdcall))
+    ZigClangCallingConv_X86StdCall,
-    ZigClangCallingConv_X86FastCall, // __attribute__((fastcall))
+    ZigClangCallingConv_X86FastCall,
-    ZigClangCallingConv_X86ThisCall, // __attribute__((thiscall))
+    ZigClangCallingConv_X86ThisCall,
-    ZigClangCallingConv_X86VectorCall, // __attribute__((vectorcall))
+    ZigClangCallingConv_X86VectorCall,
-    ZigClangCallingConv_X86Pascal,   // __attribute__((pascal))
+    ZigClangCallingConv_X86Pascal,
-    ZigClangCallingConv_Win64,       // __attribute__((ms_abi))
+    ZigClangCallingConv_Win64,
-    ZigClangCallingConv_X86_64SysV,  // __attribute__((sysv_abi))
+    ZigClangCallingConv_X86_64SysV,
-    ZigClangCallingConv_X86RegCall, // __attribute__((regcall))
+    ZigClangCallingConv_X86RegCall,
-    ZigClangCallingConv_AAPCS,       // __attribute__((pcs("aapcs")))
+    ZigClangCallingConv_AAPCS,
-    ZigClangCallingConv_AAPCS_VFP,   // __attribute__((pcs("aapcs-vfp")))
+    ZigClangCallingConv_AAPCS_VFP,
-    ZigClangCallingConv_IntelOclBicc, // __attribute__((intel_ocl_bicc))
+    ZigClangCallingConv_IntelOclBicc,
-    ZigClangCallingConv_SpirFunction, // default for OpenCL functions on SPIR target
+    ZigClangCallingConv_SpirFunction,
-    ZigClangCallingConv_OpenCLKernel, // inferred for OpenCL kernels
+    ZigClangCallingConv_OpenCLKernel,
-    ZigClangCallingConv_Swift,        // __attribute__((swiftcall))
+    ZigClangCallingConv_Swift,
-    ZigClangCallingConv_SwiftAsync,   // __attribute__((swiftasynccall))
+    ZigClangCallingConv_SwiftAsync,
-    ZigClangCallingConv_PreserveMost, // __attribute__((preserve_most))
+    ZigClangCallingConv_PreserveMost,
-    ZigClangCallingConv_PreserveAll,  // __attribute__((preserve_all))
+    ZigClangCallingConv_PreserveAll,
-    ZigClangCallingConv_AArch64VectorCall, // __attribute__((aarch64_vector_pcs))
+    ZigClangCallingConv_AArch64VectorCall,
+    ZigClangCallingConv_AArch64SVEPCS,
+    ZigClangCallingConv_AMDGPUKernelCall,
 };
 
 enum ZigClangStorageClass {
@@ -1253,7 +1266,6 @@ ZIG_EXTERN_C double ZigClangFloatingLiteral_getValueAsApproximateDouble(const Zi
 ZIG_EXTERN_C struct ZigClangSourceLocation ZigClangFloatingLiteral_getBeginLoc(const struct ZigClangFloatingLiteral *);
 ZIG_EXTERN_C ZigClangAPFloatBase_Semantics ZigClangFloatingLiteral_getRawSemantics(const ZigClangFloatingLiteral *self);
 
-ZIG_EXTERN_C enum ZigClangStringLiteral_StringKind ZigClangStringLiteral_getKind(const struct ZigClangStringLiteral *self);
 ZIG_EXTERN_C uint32_t ZigClangStringLiteral_getCodeUnit(const struct ZigClangStringLiteral *self, size_t i);
 ZIG_EXTERN_C unsigned ZigClangStringLiteral_getLength(const struct ZigClangStringLiteral *self);
 ZIG_EXTERN_C unsigned ZigClangStringLiteral_getCharByteWidth(const struct ZigClangStringLiteral *self);

src/zig_llvm.h

@@ -324,8 +324,10 @@ ZIG_EXTERN_C void ZigLLVMAddFunctionAttrCold(LLVMValueRef fn);
 ZIG_EXTERN_C void ZigLLVMParseCommandLineOptions(size_t argc, const char *const *argv);
 
 
-// copied from include/llvm/ADT/Triple.h
+// synchronize with llvm/include/ADT/Triple.h::ArchType
-// synchronize with target.cpp::arch_list
+// synchronize with std.Target.Cpu.Arch
+// synchronize with src/stage1/target.cpp::arch_list
+// synchronize with codegen/llvm/bindings.zig::ArchType
 enum ZigLLVM_ArchType {
     ZigLLVM_UnknownArch,
 
@@ -339,7 +341,10 @@ enum ZigLLVM_ArchType {
     ZigLLVM_bpfel,          // eBPF or extended BPF or 64-bit BPF (little endian)
     ZigLLVM_bpfeb,          // eBPF or extended BPF or 64-bit BPF (big endian)
     ZigLLVM_csky,           // CSKY: csky
+    ZigLLVM_dxil,           // DXIL 32-bit DirectX bytecode
     ZigLLVM_hexagon,        // Hexagon: hexagon
+    ZigLLVM_loongarch32,    // LoongArch (32-bit): loongarch32
+    ZigLLVM_loongarch64,    // LoongArch (64-bit): loongarch64
     ZigLLVM_m68k,           // M68k: Motorola 680x0 family
     ZigLLVM_mips,           // MIPS: mips, mipsallegrex, mipsr6
     ZigLLVM_mipsel,         // MIPSEL: mipsel, mipsallegrexe, mipsr6el
@@ -409,6 +414,10 @@ enum ZigLLVM_VendorType {
     ZigLLVM_LastVendorType = ZigLLVM_OpenEmbedded
 };
 
+// synchronize with llvm/include/ADT/Triple.h::OsType
+// synchronize with std.Target.Os.Tag
+// synchronize with codegen/llvm/bindings.zig::OsType
+// synchronize with src/stage1/target.cpp::os_list
 enum ZigLLVM_OSType {
     ZigLLVM_UnknownOS,
 
@@ -437,9 +446,11 @@ enum ZigLLVM_OSType {
     ZigLLVM_NVCL,       // NVIDIA OpenCL
     ZigLLVM_AMDHSA,     // AMD HSA Runtime
     ZigLLVM_PS4,
+    ZigLLVM_PS5,
     ZigLLVM_ELFIAMCU,
     ZigLLVM_TvOS,       // Apple tvOS
     ZigLLVM_WatchOS,    // Apple watchOS
+    ZigLLVM_DriverKit,  // Apple DriverKit
     ZigLLVM_Mesa3D,
     ZigLLVM_Contiki,
     ZigLLVM_AMDPAL,     // AMD PAL Runtime
@@ -447,8 +458,8 @@ enum ZigLLVM_OSType {
     ZigLLVM_Hurd,       // GNU/Hurd
     ZigLLVM_WASI,       // Experimental WebAssembly OS
     ZigLLVM_Emscripten,
-
+    ZigLLVM_ShaderModel, // DirectX ShaderModel
-    ZigLLVM_LastOSType = ZigLLVM_Emscripten
+    ZigLLVM_LastOSType = ZigLLVM_ShaderModel
 };
 
 // Synchronize with target.cpp::abi_list
@@ -477,16 +488,35 @@ enum ZigLLVM_EnvironmentType {
     ZigLLVM_CoreCLR,
     ZigLLVM_Simulator, // Simulator variants of other systems, e.g., Apple's iOS
     ZigLLVM_MacABI, // Mac Catalyst variant of Apple's iOS deployment target.
-    ZigLLVM_LastEnvironmentType = ZigLLVM_MacABI
+
+    ZigLLVM_Pixel,
+    ZigLLVM_Vertex,
+    ZigLLVM_Geometry,
+    ZigLLVM_Hull,
+    ZigLLVM_Domain,
+    ZigLLVM_Compute,
+    ZigLLVM_Library,
+    ZigLLVM_RayGeneration,
+    ZigLLVM_Intersection,
+    ZigLLVM_AnyHit,
+    ZigLLVM_ClosestHit,
+    ZigLLVM_Miss,
+    ZigLLVM_Callable,
+    ZigLLVM_Mesh,
+    ZigLLVM_Amplification,
+
+    ZigLLVM_LastEnvironmentType = ZigLLVM_Amplification
 };
 
 enum ZigLLVM_ObjectFormatType {
     ZigLLVM_UnknownObjectFormat,
 
     ZigLLVM_COFF,
+    ZigLLVM_DXContainer,
     ZigLLVM_ELF,
     ZigLLVM_GOFF,
     ZigLLVM_MachO,
+    ZigLLVM_SPIRV,
     ZigLLVM_Wasm,
     ZigLLVM_XCOFF,
 };