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x64: use new condition codes enum for register with overflow mcv
This commit is contained in:
Jakub Konka
parent
5fb7070642
commit
7000395a7d
@ -128,12 +128,8 @@ pub const MCValue = union(enum) {
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immediate: u64,
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/// The value is in a GP register.
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register: Register,
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/// The value is a tuple { wrapped, overflow } where wrapped value is stored in the GP register,
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/// and the operation is an unsigned operation.
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register_overflow_unsigned: Register,
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/// The value is a tuple { wrapped, overflow } where wrapped value is stored in the GP register,
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/// and the operation is a signed operation.
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register_overflow_signed: Register,
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/// The value is a tuple { wrapped, overflow } where wrapped value is stored in the GP register.
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register_overflow: struct { reg: Register, eflags: Condition },
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/// The value is in memory at a hard-coded address.
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/// If the type is a pointer, it means the pointer address is at this memory location.
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memory: u64,
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@ -183,8 +179,7 @@ pub const MCValue = union(enum) {
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.eflags,
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.ptr_stack_offset,
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.undef,
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.register_overflow_unsigned,
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.register_overflow_signed,
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.register_overflow,
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=> false,
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.register,
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@ -774,8 +769,8 @@ fn processDeath(self: *Self, inst: Air.Inst.Index) void {
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.register => |reg| {
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self.register_manager.freeReg(reg.to64());
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},
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.register_overflow_signed, .register_overflow_unsigned => |reg| {
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self.register_manager.freeReg(reg.to64());
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.register_overflow => |ro| {
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self.register_manager.freeReg(ro.reg.to64());
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self.eflags_inst = null;
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},
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.eflags => {
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@ -809,20 +804,22 @@ fn finishAir(self: *Self, inst: Air.Inst.Index, result: MCValue, operands: [Live
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const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
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branch.inst_table.putAssumeCapacityNoClobber(inst, result);
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// In some cases (such as bitcast), an operand
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// may be the same MCValue as the result. If
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// that operand died and was a register, it
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// was freed by processDeath. We have to
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// "re-allocate" the register.
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switch (result) {
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.register,
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.register_overflow_signed,
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.register_overflow_unsigned,
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=> |reg| {
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// In some cases (such as bitcast), an operand
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// may be the same MCValue as the result. If
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// that operand died and was a register, it
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// was freed by processDeath. We have to
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// "re-allocate" the register.
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.register => |reg| {
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if (self.register_manager.isRegFree(reg)) {
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self.register_manager.getRegAssumeFree(reg, inst);
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}
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},
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.register_overflow => |ro| {
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if (self.register_manager.isRegFree(ro.reg)) {
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self.register_manager.getRegAssumeFree(ro.reg, inst);
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}
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},
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else => {},
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}
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}
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@ -912,12 +909,12 @@ pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void
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log.debug("spilling {d} to stack mcv {any}", .{ inst, stack_mcv });
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const reg_mcv = self.getResolvedInstValue(inst);
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switch (reg_mcv) {
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.register,
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.register_overflow_unsigned,
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.register_overflow_signed,
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=> |other| {
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.register => |other| {
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assert(reg.to64() == other.to64());
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},
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.register_overflow => |ro| {
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assert(reg.to64() == ro.reg.to64());
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},
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else => {},
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}
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const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
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@ -929,9 +926,7 @@ pub fn spillEflagsIfOccupied(self: *Self) !void {
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if (self.eflags_inst) |inst_to_save| {
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const mcv = self.getResolvedInstValue(inst_to_save);
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const new_mcv = switch (mcv) {
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.register_overflow_signed,
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.register_overflow_unsigned,
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=> try self.allocRegOrMem(inst_to_save, false),
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.register_overflow => try self.allocRegOrMem(inst_to_save, false),
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.eflags => try self.allocRegOrMem(inst_to_save, true),
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else => unreachable,
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};
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@ -947,9 +942,7 @@ pub fn spillEflagsIfOccupied(self: *Self) !void {
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// TODO consolidate with register manager and spillInstruction
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// this call should really belong in the register manager!
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switch (mcv) {
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.register_overflow_signed,
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.register_overflow_unsigned,
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=> |reg| self.register_manager.freeReg(reg),
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.register_overflow => |ro| self.register_manager.freeReg(ro.reg),
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else => {},
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}
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}
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@ -1339,11 +1332,14 @@ fn airAddSubShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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if (math.isPowerOfTwo(int_info.bits) and int_info.bits >= 8) {
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self.eflags_inst = inst;
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const result: MCValue = switch (int_info.signedness) {
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.signed => .{ .register_overflow_signed = partial.register },
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.unsigned => .{ .register_overflow_unsigned = partial.register },
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const cc: Condition = switch (int_info.signedness) {
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.unsigned => .c,
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.signed => .o,
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};
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break :result result;
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break :result MCValue{ .register_overflow = .{
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.reg = partial.register,
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.eflags = cc,
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} };
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}
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self.eflags_inst = null;
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@ -1460,10 +1456,14 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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const rhs = try self.resolveInst(bin_op.rhs);
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const partial = try self.genMulDivBinOp(.mul, null, ty, lhs, rhs);
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break :result switch (int_info.signedness) {
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.signed => MCValue{ .register_overflow_signed = partial.register },
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.unsigned => MCValue{ .register_overflow_unsigned = partial.register },
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const cc: Condition = switch (int_info.signedness) {
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.unsigned => .c,
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.signed => .o,
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};
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break :result MCValue{ .register_overflow = .{
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.reg = partial.register,
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.eflags = cc,
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} };
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}
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try self.spillEflagsIfOccupied();
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@ -2486,8 +2486,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
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.unreach => unreachable,
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.dead => unreachable,
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.eflags => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.immediate => |imm| {
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try self.setRegOrMem(elem_ty, dst_mcv, .{ .memory = imm });
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},
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@ -2610,8 +2609,7 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
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.unreach => unreachable,
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.dead => unreachable,
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.eflags => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.immediate => |imm| {
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try self.setRegOrMem(value_ty, .{ .memory = imm }, value);
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},
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@ -2997,31 +2995,24 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
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break :result dst_mcv;
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},
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.register_overflow_unsigned,
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.register_overflow_signed,
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=> |reg| {
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.register_overflow => |ro| {
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switch (index) {
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0 => {
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// Get wrapped value for overflow operation.
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break :result MCValue{ .register = reg };
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break :result MCValue{ .register = ro.reg };
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},
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1 => {
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// Get overflow bit.
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const reg_lock = self.register_manager.lockRegAssumeUnused(reg);
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const reg_lock = self.register_manager.lockRegAssumeUnused(ro.reg);
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defer self.register_manager.unlockReg(reg_lock);
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const dst_reg = try self.register_manager.allocReg(inst, gp);
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const cc: Condition = switch (mcv) {
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.register_overflow_unsigned => .c,
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.register_overflow_signed => .o,
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else => unreachable,
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};
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_ = try self.addInst(.{
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.tag = .cond_set_byte,
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.ops = Mir.Inst.Ops.encode(.{
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.reg1 = dst_reg.to8(),
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}),
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.data = .{ .cc = cc },
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.data = .{ .cc = ro.eflags },
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});
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break :result MCValue{ .register = dst_reg.to8() };
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},
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@ -3449,15 +3440,13 @@ fn genBinOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MCValu
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.undef => unreachable,
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.dead, .unreach, .immediate => unreachable,
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.eflags => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.register => |dst_reg| {
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switch (src_mcv) {
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.none => unreachable,
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.undef => unreachable,
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.dead, .unreach => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.ptr_stack_offset => {
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const dst_reg_lock = self.register_manager.lockReg(dst_reg);
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defer if (dst_reg_lock) |lock| self.register_manager.unlockReg(lock);
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@ -3564,8 +3553,7 @@ fn genBinOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MCValu
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.none => unreachable,
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.undef => unreachable,
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.dead, .unreach => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.register => |src_reg| {
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_ = try self.addInst(.{
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.tag = mir_tag,
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@ -3640,16 +3628,14 @@ fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: M
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.dead, .unreach, .immediate => unreachable,
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.eflags => unreachable,
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.ptr_stack_offset => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.register => |dst_reg| {
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switch (src_mcv) {
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.none => unreachable,
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.undef => try self.genSetReg(dst_ty, dst_reg, .undef),
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.dead, .unreach => unreachable,
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.ptr_stack_offset => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.register => |src_reg| {
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// register, register
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_ = try self.addInst(.{
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@ -3708,8 +3694,7 @@ fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: M
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.undef => return self.genSetStack(dst_ty, off, .undef, .{}),
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.dead, .unreach => unreachable,
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.ptr_stack_offset => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow => unreachable,
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.register => |src_reg| {
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// copy dst to a register
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const dst_reg = try self.copyToTmpRegister(dst_ty, dst_mcv);
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@ -3915,8 +3900,7 @@ fn airCall(self: *Self, inst: Air.Inst.Index, modifier: std.builtin.CallOptions.
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.got_load => unreachable,
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.direct_load => unreachable,
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.eflags => unreachable,
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.register_overflow_signed => unreachable,
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.register_overflow_unsigned => unreachable,
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.register_overflow => unreachable,
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}
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}
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@ -5291,9 +5275,7 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
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.{ .dest_stack_base = .rsp },
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);
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},
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.register_overflow_unsigned,
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.register_overflow_signed,
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=> return self.fail("TODO genSetStackArg for register with overflow bit", .{}),
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.register_overflow => return self.fail("TODO genSetStackArg for register with overflow bit", .{}),
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.eflags => {
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStackArg(ty, stack_offset, .{ .register = reg });
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@ -5429,29 +5411,22 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue, opts: Inl
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),
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}
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},
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.register_overflow_unsigned,
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.register_overflow_signed,
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=> |reg| {
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const reg_lock = self.register_manager.lockReg(reg);
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.register_overflow => |ro| {
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const reg_lock = self.register_manager.lockReg(ro.reg);
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defer if (reg_lock) |lock| self.register_manager.unlockReg(lock);
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const wrapped_ty = ty.structFieldType(0);
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try self.genSetStack(wrapped_ty, stack_offset, .{ .register = reg }, .{});
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try self.genSetStack(wrapped_ty, stack_offset, .{ .register = ro.reg }, .{});
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const overflow_bit_ty = ty.structFieldType(1);
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const overflow_bit_offset = ty.structFieldOffset(1, self.target.*);
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const tmp_reg = try self.register_manager.allocReg(null, gp);
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const cc: Condition = switch (mcv) {
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.register_overflow_unsigned => .c,
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.register_overflow_signed => .o,
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else => unreachable,
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};
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_ = try self.addInst(.{
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.tag = .cond_set_byte,
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.ops = Mir.Inst.Ops.encode(.{
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.reg1 = tmp_reg.to8(),
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}),
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.data = .{ .cc = cc },
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.data = .{ .cc = ro.eflags },
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});
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return self.genSetStack(
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@ -5956,9 +5931,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
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const abi_size = @intCast(u32, ty.abiSize(self.target.*));
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switch (mcv) {
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.dead => unreachable,
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.register_overflow_unsigned,
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.register_overflow_signed,
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=> unreachable,
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.register_overflow => unreachable,
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.ptr_stack_offset => |off| {
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if (off < std.math.minInt(i32) or off > std.math.maxInt(i32)) {
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return self.fail("stack offset too large", .{});
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